Abstract: A light source assembly, a method for making same, and a display device using same are disclosed. The light source assembly includes a circuit substrate, an opaque and light-reflecting colloidal layer on the circuit substrate, micro light-emitting elements electrically connected to the circuit substrate, a base layer, a layer of convex lenses, and a layer of immediately-adjacent concave lenses. The colloidal layer defines grooves. At least two micro light-emitting elements each emitting light of a different color are arranged in each groove. The base layer is infilled into each groove and covers each micro light-emitting element. Each groove is covered by a convex lens which converges the emitted light. Each concave lens, covering one convex lens, substantially corrects optical path deviations of light of different wavelengths (that is, different colors), so reducing chromatic aberrations.

Abstract: A fluid immersion cooling system includes a fluid tank that contains a layer of a dual-phase coolant fluid and one or more layers of single-phase coolant fluids. The dual-phase and single-phase coolant fluids are immiscible, with the dual-phase coolant fluid having a lower boiling point and higher density than a single-phase coolant fluid. A substrate of an electronic system is submerged in the tank such that high heat-generating components are immersed at least in the layer of the dual-phase coolant fluid. Heat from the components is dissipated to the dual-phase coolant fluid to generate vapor bubbles of the dual-phase coolant fluid. The vapor bubbles rise to a layer of a single-phase coolant fluid that is above the layer of the dual-phase coolant fluid. The vapor bubbles condense to droplets of the dual-phase coolant fluid. The droplets fall down into the layer of the dual-phase coolant fluid.

Abstract: A method for performing access management of a memory device in predetermined communications architecture with aid of flexible delay time control and associated apparatus are provided. The method may include: utilizing at least one upper layer controller of a transmission interface circuit within the memory controller to dynamically set a delay parameter regarding transmission from the memory device to a host device, for preventing sleeping in delay time(s) corresponding to the delay parameter; utilizing a physical layer (PHY) circuit of the transmission interface circuit to transmit first data from the memory device to the host device, wherein a first delay time starts from a first time point at which transmitting the first data from the memory device to the host device is completed; and utilizing the PHY circuit to start transmitting second data from the memory device to the host device in the first delay time without restarting from sleeping.

Abstract: The present invention is a display and manufacturing method thereof, including a thin film substrate, a plurality of packaging layers, and a stretch-resistant unit, wherein one side of the thin film substrate has a plurality of pixel areas, each pixel area contains at least one light-emitting element, and each packaging layer respectively covers one of the pixel areas to form an island-shape structure, and there is a spacing between any two adjacent island-shape structures, and each stretch-resistant unit deposed at the spacing and connects the adjacent island-shape structures.

Abstract: A light-emitting diode display and a method for fabricating the same is disclosed. The light-emitting diode display includes a driving backplane and a plurality of pixel units. Each of the plurality of pixel units includes at least one light-emitting diode and a package substrate. The top surface of the package substrate has at least one conductive position and at least one conductive vacant position corresponding to the at least one conductive position. The conductive position is provided with the light-emitting diode. The conductive position is electrically connected to the light-emitting diode. The bottom surface of the package substrate of each pixel unit is arranged on the driving backplane. The driving backplane is electrically connected to the light-emitting diode and the corresponding conductive vacant position of each pixel unit thereon.

Abstract: A micro light-emitting diode (micro LED) display and a package method thereof are described. The micro LED display includes a substrate, various micro LED chips, and an encapsulation film. The substrate includes a wire. The micro LED chips are disposed on a surface of the substrate and are electrically connected to the wire. A light-emitting surface of each of the micro LED chips is set with at least one micro structure, and each micro structure has a top end. The encapsulation film encapsulates the micro LED chips, and covers the surface of the substrate. The top ends of the micro structures are located in a light-emitting surface of the encapsulation film.

Abstract: The present invention relates to a micro light-emitting diode display panel and a method for producing the same. A backplane and a light-emitting diode display layer are subjected to a bonding process to form eutectic structures between the backplane and light-emitting diodes of the light-emitting diode display layer. Then, an adhesive bonding layer including a resin material and conducting materials is formed on a surface of the backplane, and a heating process is performed, thereby causing the conducting materials to form a plurality of metallic bridge connection structures. Therefore, a bonding between the light-emitting diode and the backplane is reinforced, and tensile strength of the micro light-emitting diode display panel is enhanced.

Abstract: A luminescent material includes a particle of an irregular shape. The particle of an irregular shape includes a core of an irregular shape and quantum dots. The quantum dots distribute on the core.

Abstract: A license plate identification method is provided, including the following steps of: obtaining a to-be-processed image; obtaining a plurality of feature maps including target features through a feature map extraction module; obtaining at least one region including the target feature in each feature map and giving each frame of each feature map scores corresponding to the target features through a target location extraction module; classifying each frame in each feature map according to the scores through a target candidate classification module and retaining at least one region that corresponds to character features; and obtaining a license plate identification result according to the region that corresponds to the character feature through a voting/statistics module.

Abstract: A method and apparatus for performing access management of a memory device in a Host Performance Booster (HPB) architecture with aid of device side table information are provided. The method may include: sending internal information of the memory device to a host device, to allow the host device to store the internal information of the memory device in a memory within the host device as host side table information at the host device; generating and storing multiple entries of at least one address mapping control table into a random access memory (RAM) as at least one portion of device side table information at the memory device; determining at least two physical addresses associated with at least two logical addresses according to the at least one address mapping control table; and reading data from the NV memory according to the at least two physical addresses.

Abstract: A gate driving circuit includes a bootstrapping circuit, a pre-charge circuit, and an output control circuit. The bootstrapping circuit is composed of a bootstrapping capacitor and a transistor. A first terminal of the bootstrapping capacitor has a first voltage during a first duration. The pre-charge circuit is connected to the first terminal of the bootstrapping capacitor. The pre-charge circuit boosts the first terminal of the bootstrapping capacitor from the first voltage to a second voltage during a second duration. The bootstrapping circuit boosts the first terminal of the bootstrapping capacitor from the second voltage to a third voltage during a third duration. The output control circuit is connected to the first terminal of the bootstrapping capacitor. The output control circuit boosts the first terminal of the bootstrapping capacitor from the third voltage to a fourth voltage during a fourth duration.

Abstract: In an embodiment, an apparatus comprising: a heater configured to heat a wafer located on a wafer staging area of the heater, the heater comprising a heater shaft extending below the wafer staging area; and a heater lift assembly comprising: a lift shaft configured to move the heater shaft in a vertical direction; a clamp that connects the heater shaft to the lift shaft; and a damper disposed on top of the clamp.

Abstract: A display device includes a light source, a waveguide element, a liquid crystal coupler, a first holographic optical element and a second holographic optical element. The light source is configured to emit light. The waveguide element is located above the light source. The liquid crystal coupler is located between the waveguide element and the light source. The first holographic optical element is located on a top surface of the waveguide element, in which the liquid crystal coupler is configured to change an incident angle that the light emits to the first holographic optical element. The second holographic optical element is located on the top surface of the waveguide element, and there is a first distance in a horizontal direction between the first holographic optical element and the second holographic optical element, in which the second holographic optical element is configured to diffract the light to the waveguide element below.

Abstract: A class-D amplifier with low pop-click noise is shown. A loop filter, a control signal generator, a first power driver, and a first feedback circuit are provided within the class-D amplifier to establish a first loop for signal amplification. The class-D amplifier further has a settling circuit and a pre-charging circuit. The settling circuit is configured to be combined with the loop filer and the control signal generator to establish a second loop to settle the loop filter and the control signal generator before the first loop is enabled. The pre-charging circuit is configured to pre-charge a positive output terminal and a negative output terminal of the first power driver.

Abstract: A method and apparatus for performing access management of a memory device in a Host Performance Booster (HPB) architecture with aid of device side table information are provided. The method may include: sending internal information of the memory device to a host device, to allow the host device to store the internal information of the memory device in a memory within the host device as host side table information at the host device; generating and storing multiple entries of at least one address mapping control table into a random access memory (RAM) as at least one portion of device side table information at the memory device; determining at least two physical addresses associated with at least two logical addresses according to the at least one address mapping control table; and reading data from the NV memory according to the at least two physical addresses.

Abstract: A license plate identification method is provided, including steps of: obtaining a to-be-processed image including all characters on a license plate; extracting several feature maps corresponding to character features of the to-be-processed image through a feature map extraction module; for each of the characters, extracting a block and a coordinate according to the feature maps through a character identification model based on a neural network; and obtaining a license plate identification result according to the respective blocks and the respective coordinates of the characters.

Abstract: An apparatus comprises a processing device that is configured to obtain information about driver installations of a given driver on a plurality of computing devices and to obtain information about system failures from the plurality of computing devices. The processing device is further configured to determine a correlation between the driver installations and the system failures and to determine that the given driver is likely to cause a system failure based at least in part on the determined correlation between the driver installations and the system failures. The processing device is further configured to provide an indication that the given driver is likely to cause a system failure to a given computing device. The indication is configured to cause the given computing device to inhibit a presentation of a recommendation to install the given driver to a user of the given computing device.

Abstract: An operational amplifier includes a single-stage amplifier and a current controller. The single-stage amplifier receives an input signal, and amplifies the input signal to generate an output signal, wherein the single-stage amplifier includes a voltage controlled current source circuit that operates in response to a bias voltage input. The current controller receives the input signal, and generates the bias voltage input according to the input signal. The bias voltage input includes a first bias voltage, a second bias voltage, a third bias voltage, and a fourth bias voltage. None of the first bias voltage, the second bias voltage, the third bias voltage, and the fourth bias voltage is directly set by the input signal of the single-stage amplifier.

Abstract: A gate driving circuit includes a bootstrapping circuit, a pre-charge circuit, and an output control circuit. The bootstrapping circuit is composed of a bootstrapping capacitor and a transistor. A first terminal of the bootstrapping capacitor has a first voltage during a first duration. The pre-charge circuit is connected to the first terminal of the bootstrapping capacitor. The pre-charge circuit boosts the first terminal of the bootstrapping capacitor from the first voltage to a second voltage during a second duration. The bootstrapping circuit boosts the first terminal of the bootstrapping capacitor from the second voltage to a third voltage during a third duration. The output control circuit is connected to the first terminal of the bootstrapping capacitor. The output control circuit boosts the first terminal of the bootstrapping capacitor from the third voltage to a fourth voltage during a fourth duration.

Abstract: A single-stage gate driving circuit with multiple outputs includes a first bootstrapping circuit, a first pre-charge circuit, a first output control circuit, a second bootstrapping circuit, a second pre-charge circuit, and a second output control circuit. During a first duration, the first pre-charge circuit precharges a first node to a first voltage. During a second duration, the first bootstrapping circuit boosts the first node from the first voltage to a second voltage, and the second pre-charge circuit precharges a second node to a fourth voltage. During a third duration, the first output control circuit boosts the first node from the second voltage to a third voltage, and the second bootstrapping circuit boosts the second node from the fourth voltage to a fifth voltage. During a fourth duration, the second output control circuit boosts the second node from the fifth voltage to a sixth voltage.