Patents by Inventor Tadanobu Inoue

Tadanobu Inoue has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020027547
    Abstract: A feature of the present invention includes a device having a display controller for controlling a display position of the pointer on the display screen, a displacement detector for detecting a displacement of the device itself, and a pointer mover for moving the pointer on the display screen based on the detected displacement of the device itself.
    Type: Application
    Filed: July 11, 2001
    Publication date: March 7, 2002
    Inventors: Noboru Kamijo, Tadanobu Inoue, Kohichiro Kishimoto
  • Patent number: 6321341
    Abstract: The present invention comprises the steps of: detecting a change in a power control signal (e.g., a CPU internal clock control signal, a supply clock control signal to a CPU from the outside, an interrupt signal relative to a CPU (e.g., an CPU SMI# signal (CPU system management interrupt signal)), or a low power control signal to each component) and storing the result of the detection in a storage device, wherein the power control signal represents a control instruction associated with the power consumption to a component of a computer; and periodically measuring either a first signal concerning the power consumption by a specific computer component or a second signal concerning power consumed by the entire computer, or both the first and the second signals, and storing the result of the measurement in the storage device. The computer components are internal computer components, including a battery, but are also such externally connected components as a CD-ROM, an FD drive or a docking station.
    Type: Grant
    Filed: December 22, 1998
    Date of Patent: November 20, 2001
    Assignee: International Business Machines Corp.
    Inventors: Noboru Kamijo, Shin Kurogi, Tadanobu Inoue
  • Patent number: 6112309
    Abstract: The object of the present invention is to balance power saving and useability in a computer system. According to a first aspect of the present invention, when predetermined activities of a device in a computer system, each of which occurs within a predetermined period t.sub.1 after the previous predetermined activity, succeed for a predetermined period t.sub.2 or longer, a substantial frequency of a central processing unit is raised. According to a second aspect of the present invention, a substantial frequency of the CPU is raised after a disk drive has been accessed, and if a predetermined activity performed by a device other than the disk drive occurs within a predetermined period t.sub.4 following the raise of the frequency, the substantial frequency of the CPU is lowered when a predetermined period t.sub.3, following the predetermined activity, has passed.
    Type: Grant
    Filed: March 11, 1998
    Date of Patent: August 29, 2000
    Assignee: International Business Machines Corp.
    Inventors: Tadanobu Inoue, Kazuo Sekiya