Abstract: Provided is a wireless power transmitting unit capable of auto-tuning according to impedance change. The wireless power transmitting unit according to an embodiment can stabilize the operation of the amplifier by changing the resonance frequency of the resonator without measuring the phase information about the resonator.

Abstract: The present invention relates to a positive electrode active material for a secondary battery which includes a lithium composite transition metal oxide including nickel (Ni), cobalt (Co), and manganese (Mn), wherein the lithium composite transition metal oxide includes the nickel (Ni) in an amount of 65 mol % or more and the manganese (Mn) in an amount of 5 mol % or more based on a total amount of transition metals, and wherein the electrode positive active material is composed of a single particle, having a crystallite size of 180 nm or more.

Abstract: A semiconductor device including a substrate including an active pattern; a gate electrode crossing the active pattern and extending in a first direction; a source/drain pattern on the active pattern and adjacent to a side of the gate electrode; and an active contact in a contact hole on the source/drain pattern, wherein the active contact includes a first contact in a lower region of the contact hole, the first contact including a barrier pattern and a conductive pattern; a diffusion barrier layer on the first contact; and a second contact on the diffusion barrier layer, and a top surface of the diffusion barrier layer is coplanar with a top surface of the barrier pattern of the first contact.

Abstract: A semiconductor device includes a first and second channel patterns on a substrate, each of the first and second channel patterns including vertically-stacked semiconductor patterns; a first source/drain pattern connected to the first channel pattern; a second source/drain pattern connected to the second channel pattern, the first and second source/drain patterns having different conductivity types from each other; a first contact plug inserted in the first source/drain pattern, and a second contact plug inserted in the second source/drain pattern; a first interface layer interposed between the first source/drain pattern and the first contact plug; and a second interface layer interposed between the second source/drain pattern and the second contact plug, the first and second interface layers including different metallic elements from each other, a bottom portion of the second interface layer being positioned at a level that is lower than a bottom surface of a topmost one of the semiconductor patterns.

Abstract: A semiconductor device including a lower contact pattern including a first metal, an upper contact pattern including a second metal, a first resistivity of first metal being greater than a second resistivity of the second metal, and a metal barrier layer between the lower contact pattern and a lower portion of the upper contact pattern, the metal barrier layer including a third metal, the third metal being different from the first and second metals may be provided. A lower width of the upper contact pattern may be less than an upper width of the lower contact pattern.

Abstract: A booth module for exhibition includes: a frame; a main body dowel; a bolt detachably coupled to the main body dowel; and a cap dowel detachably coupled to the bolt, wherein the main body dowel has: a body having a bolt insertion hole formed therein; a button of which a part is inserted and installed in the body through a button installation hole formed in the body; and a spring installed inside the body and pushing one end of the button, and wherein the cap dowel has: a body having a bolt insertion hole formed therein; a button of which a part is inserted and installed in the body through a button installation hole formed in the body; and a spring installed inside the body and pushing one end of the button, wherein the buttons are provided with bolt through holes communicating with the bolt insertion holes.

Abstract: A memory system includes a first memory and a second memory that share common addresses received from a memory controller, wherein the first memory includes a first scrambling circuit suitable for scrambling a common address to generate a first scrambled address designating a word line to be activated in the first memory, and the second memory includes a second scrambling circuit suitable for scrambling the common address to generate a second scrambled address designating a word line to be activated in the second memory, and the first scrambling circuit and the second scrambling circuit perform a scrambling operation in such a manner that neighboring word lines, adjacent to a word line selected by a first common address, are selected a most in one memory among the first memory and the second memory by a second common address other than the first common address.

Abstract: Disclosed is a 1D nanofibers quasi-aligned, grid structure cross-laminated, and pore distribution and size controlled 3D polymer nanofiber membrane, and manufacturing method thereof. A 3D polymer nanofiber membrane controlled in pore size and porosity is formed by employing an electrospinning pattern forming apparatus that includes double insulating blocks quasi-aligns nanofibers in a specific direction by transforming an electric field and includes a current collector rotatable in 90°. Additionally, the 3D polymer nanofiber membrane may be used for air filters, separator, water filters, cell culture membranes, and so on by allowing various properties thereto through a functional surface coating.

Abstract: An apparatus for removing foreign substances in a container includes a conveying device for conveying a container having an opening portion, and a first nozzle for ejecting a gas toward the opening portion of the container, in which the first nozzle is disposed to be spaced apart from an imaginary vertical surface that runs through a center of the container, towards a first side, at a first spacing distance.

Abstract: Semiconductor device having less defects in a gate insulating film and improved reliability and methods of forming the semiconductor devices are provided. The semiconductor devices may include a gate insulating film on a substrate and a gate electrode structure on the gate insulating film. The gate electrode structure may include a lower conductive film, a silicon oxide film, and an upper conductive film sequentially stacked on the gate insulating film. The lower conductive film may include a barrier metal layer.

Abstract: A positive electrode active material includes a lithium transition metal oxide, which is doped with doping element M2, wherein M2 is at least one selected from the group consisting of Al, Ti, Mg, Zr, W, Y, Sr, Co, F, Si, Na, Cu, Fe, Ca, S, and B, and contains nickel in an amount of 60 mol % or more based on a total number of moles of transition metals excluding lithium, wherein the lithium transition metal oxide has a single particle form, and includes a center portion having a layered structure and a surface portion having a rock-salt structure, and the doping element M2 is included in an amount of 3,580 ppm to 7,620 ppm based on a total weight of the positive electrode active material.

Abstract: A semiconductor device for monitoring a reverse voltage is provided. The semiconductor device includes an intellectual property having an input node and an output node; a passive component connected between the output node and a potential; a monitoring circuit connected to the input node and the output node and powered by a driving power, the monitoring circuit monitoring a difference between an input level at the input node and an output level at the output node to detect a reverse voltage across the intellectual property. The driving power is provided by the output node.

Abstract: A storage device includes at least one nonvolatile memory device including a plurality of memory blocks, the nonvolatile memory device configured to store user data and meta data in the plurality of memory blocks, and a device controller configured to control the nonvolatile memory device, to calculate a user cost corresponding to a time of memory accesses to the user data to be performed at garbage collection with respect to each of the plurality of memory blocks, to calculate a meta cost corresponding to a time of memory accesses to the meta data to be performed at the garbage collection with respect to each of the plurality of memory blocks, to select a victim block among the plurality of memory blocks based on the user cost and the meta cost, and to perform the garbage collection on the victim block.

Abstract: A semiconductor package includes a package substrate, a first semiconductor device arranged on the package substrate, at least one second semiconductor device on the first semiconductor device to partially cover the first semiconductor device from a top down view, a heat dissipating insulation layer coated on the first semiconductor device and the at least one second semiconductor device, a conductive heat dissipation structure arranged on the heat dissipating insulation layer on a portion of the first semiconductor device not covered by the second semiconductor device, and a molding layer on the package substrate to cover the first semiconductor device and the at least one second semiconductor device. The heat dissipating insulation layer is formed of an electrically insulating and thermally conductive material, and the conductive heat dissipation structure formed of an electrically and thermally conductive material.

Abstract: Semiconductor device having less defects in a gate insulating film and improved reliability and methods of forming the semiconductor devices are provided. The semiconductor devices may include a gate insulating film on a substrate and a gate electrode structure on the gate insulating film. The gate electrode structure may include a lower conductive film, a silicon oxide film, and an upper conductive film sequentially stacked on the gate insulating film. The lower conductive film may include a barrier metal layer.

Abstract: A memory module includes: a plurality of memories, wherein each of the memories comprises: an encryption key storage circuit suitable for storing an encryption key; an address encryption circuit suitable for generating an encrypted address by encrypting an address transferred from a memory controller by using the encryption key stored in the encryption key storage circuit; and a cell array accessed by the encrypted address, wherein the encryption key storage circuits of the memories store different encryption keys.

Abstract: A method for preparing a lithium cobalt-based positive electrode active material and a positive electrode active material prepared by the method are provided. The method includes dry-mixing and then heat treating a lithium cobalt oxide particle represented by Formula 1 and one or more lithium metal oxide particle selected from the group consisting of lithium aluminum oxide, lithium zirconium oxide, and lithium titanium oxide.

Abstract: A ceria-carbon-sulfur (CeO2—C—S) composite including a ceria-carbon (CeO2—C) composite in which cylindrical carbon materials having ceria (CeO2) particles bonded to surfaces thereof are entangled and interconnected to each other in three dimensions; and sulfur introduced into at least a portion of an outer surface and an inside of the ceria-carbon composite, a method for preparing the same, and positive electrode for a lithium-sulfur battery and a lithium-sulfur battery including the same.

Abstract: Provided are elements for an ion implanter and an ion generating device including the same. The elements include a repeller, a cathode, a chamber wall, and a slit member constituting an arc chamber of an ion generating device for ion implantation used in the fabrication of a semiconductor device. A coating structure including a semicarbide layer is provided to each of the elements in order to stabilize the element against thermal deformation, protect the element from wear, and prevent a deposition product from being peeled off. The coating structure enables precise ion implantation without a change in the position of ion generation or distortion of the equipment. The coating structure allows electrons to be uniformly reflected into the arc chamber to increase the uniformity of plasma, resulting in an improvement in the dissociation efficiency of an ion source gas. The coating structure significantly improves the service life of the element compared to those of existing elements.

Abstract: Provided are a touch screen controller, a touch screen system including the touch screen controller, and a method of operating the touch screen controller. The touch screen controller includes a driving circuit configured to output a first driving signal in a first touch mode and a second driving signal in a second touch mode, the first touch mode including a driving period and a subsequent sensing period; and a boosting circuit configured, in the first touch mode, to generate a first voltage by performing an internal switching operation based on an input voltage and a first switching signal, and configured to provide the first voltage to the driving circuit, wherein the first switching signal has a first frequency in the driving period and a second frequency different from the first frequency in the subsequent sensing period.