Patents by Inventor Tae-Jin Hwang

Tae-Jin Hwang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9479170
    Abstract: A buffer circuit includes an amplification unit suitable for sensing and amplifying an input signal and a reference voltage, a buffer enable unit suitable for enabling the amplification unit based on a buffer enable signal, and a buffer enable signal generation unit suitable for generating the buffer enable signal based on a first or second operation control signal, selected according to a high voltage detection signal.
    Type: Grant
    Filed: November 21, 2014
    Date of Patent: October 25, 2016
    Assignee: SK Hynix Inc.
    Inventor: Tae Jin Hwang
  • Publication number: 20160149575
    Abstract: A buffer circuit includes an amplification unit suitable for sensing and amplifying an input signal and a reference voltage, a buffer enable unit suitable for enabling the amplification unit based on a buffer enable signal, and a buffer enable signal generation unit suitable for generating the buffer enable signal based on a first or second operation control signal, selected according to a high voltage detection signal.
    Type: Application
    Filed: November 21, 2014
    Publication date: May 26, 2016
    Inventor: Tae Jin HWANG
  • Patent number: 9317052
    Abstract: A calibration circuit of a semiconductor apparatus may include: a reference voltage generator suitable for generating first and second pull-up reference voltages based on a pull-up control signal, and generating first and second pull-down reference voltages based on a pull-down control signal; and a calibrator suitable for generating a pull-up resistor code corresponding to an external reference resistor based on the first and second pull-up reference voltages, and generating a pull-down resistor code corresponding to the external reference resistor based on the first and second pull-down reference voltages and the pull-up resistor code.
    Type: Grant
    Filed: November 24, 2014
    Date of Patent: April 19, 2016
    Assignee: SK Hynix Inc.
    Inventor: Tae Jin Hwang
  • Publication number: 20160104684
    Abstract: A semiconductor memory device includes a semiconductor circuit substrate having a chip pad forming region. A pair of data lines are formed on the semiconductor circuit substrate at one side of the chip pad region. The pair of data lines extend along a direction that the chip pad region of the semiconductor circuit substrate extends. The pair of data lines are arranged to be adjacent to each other and receive a pair of differential data signals. A power supply line is formed on the semiconductor circuit substrate at the other side of the chip pad region. The power supply line extends along the direction that the chip pad region of the semiconductor circuit substrate extends, and the power supply line receives power.
    Type: Application
    Filed: December 7, 2015
    Publication date: April 14, 2016
    Inventors: Chang Kun PARK, Seong Hwi SONG, Yong Ju KIM, Sung Woo HAN, Hee Woong SONG, Ic Su OH, Hyung Soo KIM, Tae Jin HWANG, Hae Rang CHOI, Ji Wang LEE, Jae Min JANG
  • Patent number: 9299504
    Abstract: The present invention relates to a method for preparing titanium dioxide paste for dye sensitized solar cell, and more specifically a method for preparing titanium dioxide paste fir dye sensitized solar cell, which is curable at a low temperature and is able to form a uniform coating layer and exhibits relatively high energy conversion efficiency. The present invention also relates to a method for preparing low temperature curable paste which requires no separate dye adsorption process or can improve energy conversion efficiency by adding dye or metal precursor in advance.
    Type: Grant
    Filed: March 7, 2013
    Date of Patent: March 29, 2016
    Assignee: Korea Institute of Industrial Technology
    Inventors: Tae Jin Hwang, Ho Hyeong Kim, Jae Young Park
  • Patent number: 9209145
    Abstract: A semiconductor memory device includes a semiconductor circuit substrate having a chip pad forming region. A pair of data lines are formed on the semiconductor circuit substrate at one side of the chip pad region. The pair of data lines extend along a direction that the chip pad region of the semiconductor circuit substrate extends. The pair of data lines are arranged to be adjacent to each other and receive a pair of differential data signals. A power supply line is formed on the semiconductor circuit substrate at the other side of the chip pad region. The power supply line extends along the direction that the chip pad region of the semiconductor circuit substrate extends, and the power supply line receives power.
    Type: Grant
    Filed: November 21, 2014
    Date of Patent: December 8, 2015
    Assignee: SK Hynix Inc.
    Inventors: Chang Kun Park, Seong Hwi Song, Yong Ju Kim, Sung Woo Han, Hee Woong Song, Ic Su Oh, Hyung Soo Kim, Tae Jin Hwang, Hae Rang Choi, Ji Wang Lee, Jae Min Jang
  • Patent number: 9190372
    Abstract: A semiconductor memory device includes a semiconductor circuit substrate having a chip pad forming region. A pair of data lines are formed on the semiconductor circuit substrate at one side of the chip pad region. The pair of data lines extend along a direction that the chip pad region of the semiconductor circuit substrate extends. The pair of data lines are arranged to be adjacent to each other and receive a pair of differential data signals. A power supply line is formed on the semiconductor circuit substrate at the other side of the chip pad region. The power supply line extends along the direction that the chip pad region of the semiconductor circuit substrate extends, and the power supply line receives power.
    Type: Grant
    Filed: November 21, 2014
    Date of Patent: November 17, 2015
    Assignee: SK Hynix Inc.
    Inventors: Chang Kun Park, Seong Hwi Song, Yong Ju Kim, Sung Woo Han, Hee Woong Song, Ic Su Oh, Hyung Soo Kim, Tae Jin Hwang, Hae Rang Choi, Ji Wang Lee, Jae Min Jang
  • Patent number: 9160324
    Abstract: A buffer circuit includes a buffering unit suitable for buffering an input signal and outputting an output signal and a feedback control unit suitable for adjusting a slew rate of the input signal in response to the output signal.
    Type: Grant
    Filed: November 18, 2013
    Date of Patent: October 13, 2015
    Assignee: SK Hynix Inc.
    Inventor: Tae-Jin Hwang
  • Publication number: 20150229300
    Abstract: A receiver circuit includes a first amplification unit, a second amplification unit, a first equalizing unit, and a second equalizing unit. The first amplification unit is configured to differentially amplify an input signal and a reference signal and generate a positive intermediate output signal and a negative intermediate output signal. The second amplification unit is configured to receive the positive intermediate output signal as a positive input signal and the negative intermediate signal as a negative input signal, differentially amplify the positive and negative input signals and generate a positive output signal and a negative output signal. The first equalizing unit is configured to control the level of the negative intermediate output signal in response to the positive output signal.
    Type: Application
    Filed: April 22, 2015
    Publication date: August 13, 2015
    Inventor: Tae Jin HWANG
  • Patent number: 9094244
    Abstract: A receiver circuit includes a first differential amplification unit including a variable load section, and configured to receive first and second input signals, and to generate first and second output signals, which are amplified based on an impedance value of the variable load section and a voltage difference between the first and second input signals, a second differential amplification unit configured to receive the first and second output signals and to generate a third output signal based on a voltage difference between the first and second output signals, and a signal generating unit configured to generate an equalization signal for controlling the variable load section based on the third output signal.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: July 28, 2015
    Assignee: SK Hynix Inc.
    Inventor: Tae-Jin Hwang
  • Patent number: 9041447
    Abstract: A receiver circuit includes a first amplification unit, a second amplification unit, a first equalizing unit, and a second equalizing unit. The first amplification unit is configured to differentially amplify an input signal and a reference signal and generate a first intermediate output signal and a second intermediate output signal. The second amplification unit is configured to differentially amplify the first and second intermediate output signals and generate an output signal. The first equalizing unit is configured to control the level of the second intermediate output signal in response to the output signal. And the second equalizing unit is configured to control the level of the first intermediate output signal in response to the output signal.
    Type: Grant
    Filed: December 19, 2012
    Date of Patent: May 26, 2015
    Assignee: SK Hynix Inc.
    Inventor: Tae Jin Hwang
  • Publication number: 20150076614
    Abstract: A semiconductor memory device includes a semiconductor circuit substrate having a chip pad forming region. A pair of data lines are formed on the semiconductor circuit substrate at one side of the chip pad region. The pair of data lines extend along a direction that the chip pad region of the semiconductor circuit substrate extends. The pair of data lines are arranged to be adjacent to each other and receive a pair of differential data signals. A power supply line is formed on the semiconductor circuit substrate at the other side of the chip pad region. The power supply line extends along the direction that the chip pad region of the semiconductor circuit substrate extends, and the power supply line receives power.
    Type: Application
    Filed: November 21, 2014
    Publication date: March 19, 2015
    Inventors: Chang Kun PARK, Seong Hwi SONG, Yong Ju KIM, Sung Woo HAN, Hee Woong SONG, Ic Su OH, Hyung Soo KIM, Tae Jin HWANG, Hae Rang CHOI, Ji Wang LEE, Jae Min JANG
  • Publication number: 20150076703
    Abstract: A semiconductor memory device includes a semiconductor circuit substrate having a chip pad forming region. A pair of data lines are formed on the semiconductor circuit substrate at one side of the chip pad region. The pair of data lines extend along a direction that the chip pad region of the semiconductor circuit substrate extends. The pair of data lines are arranged to be adjacent to each other and receive a pair of differential data signals. A power supply line is formed on the semiconductor circuit substrate at the other side of the chip pad region. The power supply line extends along the direction that the chip pad region of the semiconductor circuit substrate extends, and the power supply line receives power.
    Type: Application
    Filed: November 21, 2014
    Publication date: March 19, 2015
    Inventors: Chang Kun PARK, Seong Hwi SONG, Yong Ju KIM, Sung Woo HAN, Hee Woong SONG, Ic Su OH, Hyung Soo KIM, Tae Jin HWANG, Hae Rang CHOI, Ji Wang LEE, Jae Min JANG
  • Publication number: 20150042394
    Abstract: A buffer circuit includes a buffering unit suitable for buffering an input signal and outputting an output signal and a feedback control unit suitable for adjusting a slew rate of the input signal in response to the output signal.
    Type: Application
    Filed: November 18, 2013
    Publication date: February 12, 2015
    Applicant: SK hynix Inc.
    Inventor: Tae-Jin HWANG
  • Patent number: 8916975
    Abstract: A semiconductor memory device includes a semiconductor circuit substrate having a chip pad forming region. A pair of data lines are formed on the semiconductor circuit substrate at one side of the chip pad region. The pair of data lines extend along a direction that the chip pad region of the semiconductor circuit substrate extends. The pair of data lines are arranged to be adjacent to each other and receive a pair of differential data signals. A power supply line is formed on the semiconductor circuit substrate at the other side of the chip pad region. The power supply line extends along the direction that the chip pad region of the semiconductor circuit substrate extends, and the power supply line receives power.
    Type: Grant
    Filed: June 29, 2009
    Date of Patent: December 23, 2014
    Assignee: Hynix Semiconductor Inc.
    Inventors: Chang Kun Park, Seong Hwi Song, Yong Ju Kim, Sung Woo Han, Hee Woong Song, Ic Su Oh, Hyung Soo Kim, Tae Jin Hwang, Hae Rang Choi, Ji Wang Lee, Jae Min Jang
  • Publication number: 20140345677
    Abstract: The present invention relates to an exclusive alloy substrate material for CIGS solar cells. Particularly, the present invention provides a substrate material having a thermal expansion coefficient similar to that of a CIGS layer. The substrate material according to the present invention may prevent damage such as interlayer separation due to differing thermal expansion coefficients from occurring because the substrate material has a thermal expansion coefficient similar to that of the CIGS layer.
    Type: Application
    Filed: December 28, 2011
    Publication date: November 27, 2014
    Applicant: KOREA INSTITUTE OF INDUSTRIAL TECHNOLOGY
    Inventors: Tai Hong Yim, Heung Yeol Lee, Tae Jin Hwang, Young Sik Song, Yong Ki Cho, Min Su Lee, Yoon Ho Han
  • Patent number: 8890613
    Abstract: A signal amplification circuit includes a differential amplifier configured to receive a first signal and a second signal and generate an output signal, a differential amplifier configured to receive first and second signals and generate an output signal; and a controller configured to control an amount of current flowing in the differential amplifier using the output signal.
    Type: Grant
    Filed: December 18, 2012
    Date of Patent: November 18, 2014
    Assignee: SK Hynix Inc.
    Inventor: Tae-Jin Hwang
  • Publication number: 20140177696
    Abstract: A receiver circuit includes a first differential amplification unit including a variable load section, and configured to receive first and second input signals, and to generate first and second output signals, which are amplified based on an impedance value of the variable load section and a voltage difference between the first and second input signals, a second differential amplification unit configured to receive the first and second output signals and to generate a third output signal based on a voltage difference between the first and second output signals, and a signal generating unit configured to generate an equalization signal for controlling the variable load section based on the third output signal.
    Type: Application
    Filed: March 15, 2013
    Publication date: June 26, 2014
    Applicant: SK hynix Inc.
    Inventor: Tae-Jin HWANG
  • Publication number: 20140117243
    Abstract: In an aspect, a method and device of inspecting an electromagnetic radiation sensing panel and a method of manufacturing an electromagnetic radiation detector are provided. The method includes generating converted electromagnetic radiation by irradiating incident electromagnetic radiation onto an electromagnetic radiation conversion layer, measuring the generated converted electromagnetic radiation and evaluating data regarding the converted electromagnetic radiation, generating converted electromagnetic radiation based on the data regarding the converted electromagnetic radiation, and irradiating the generated converted electromagnetic radiation onto an electromagnetic radiation sensing panel.
    Type: Application
    Filed: June 19, 2013
    Publication date: May 1, 2014
    Applicant: Samsung Display Co., Ltd.
    Inventor: Tae Jin Hwang
  • Patent number: 8686763
    Abstract: A receiver circuit includes a buffering unit configured to buffer an input signal and generate a buffering signal; a variation detection unit configured to generate a control signal according to a level of a reference voltage; a driving unit configured to drive the buffering signal and generate an output signal; and a compensation unit configured to control a slew rate of the output signal in response to the control signal.
    Type: Grant
    Filed: September 3, 2012
    Date of Patent: April 1, 2014
    Assignee: SK Hynix Inc.
    Inventor: Tae Jin Hwang