Patents by Inventor Tae Jin Kang
Tae Jin Kang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20130114347Abstract: A semiconductor system includes a semiconductor memory device configured to, during a test mode, store received data in a memory cell in response to a write command, read the stored data as information data in response to a read command, and internally store the information data, in response to the read command, in synchronization with a pulse generated when a level of the information data changes.Type: ApplicationFiled: December 23, 2011Publication date: May 9, 2013Applicant: HYNIX SEMICONDUCTOR INC.Inventor: Tae Jin KANG
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Publication number: 20130059067Abstract: Disclosed herein is a novel gluconacetobacter strain having cellulose producing activity. Specifically, the present invention relates to a novel gluconacetobacter strain producing nano-structured cellulose in a highly efficient manner. The cellulose produced by the strain, due to its superb thermodynamic properties, can be characterized as nano-structured bacterial cellulose and therefore utilized as a bio-nano-fiber. Particularly, the cellulose can be impregnated with a resin to form a cellulose-based resin which can be effectively adapted for a substrate for a liquid crystal display (LCD).Type: ApplicationFiled: October 29, 2012Publication date: March 7, 2013Inventors: Jong-Seong KIM, Woo-jae LEE, Nam-Seok ROH, Sang-IL KIM, Min-Ho YOON, Young Tak SONG, Tae Jin KANG, Suk Heung OH, Seung-Jae LEE, Hye Jin KIM, Jin Ju YU, Dong Hyun YU, Young Sik YOON, Jong Hwan LEE
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Patent number: 8379475Abstract: A clock control circuit is presented for reducing unnecessary current consumption. The clock control circuit includes a write enable signal generation unit and a clock enable signal generation unit. The write enable signal generation unit is configured to generate a first write enable signal, which is enabled during a predetermined time period after a write command is inputted, in response to first and second burst signals and a write signal including a pulse generated in response to the write command. The clock enable signal generation unit is configured to generate a clock enable signal, which is enabled during a write operation period, in response to the first write signal and the first write enable signal.Type: GrantFiled: June 28, 2010Date of Patent: February 19, 2013Assignee: Hynix Semiconductor Inc.Inventor: Tae Jin Kang
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Patent number: 8304215Abstract: Disclosed herein is a novel gluconacetobacter strain having cellulose producing activity. Specifically, the present invention relates to a novel gluconacetobacter strain producing nano-structured cellulose in a highly efficient manner. The cellulose produced by the strain, due to its superb thermodynamic properties, can be characterized as nano-structured bacterial cellulose and therefore utilized as a bio-nano-fiber. Particularly, the cellulose can be impregnated with a resin to form a cellulose-based resin which can be effectively adapted for a substrate for a liquid crystal display (LCD).Type: GrantFiled: March 2, 2011Date of Patent: November 6, 2012Assignee: Samsung Electronics Co., Ltd.Inventors: Jong-Seong Kim, Woo-jae Lee, Nam-Seok Roh, Sang-IL Kim, Min-Ho Yoon, Young Tak Song, Tae Jin Kang, Suk Heung Oh, Seung-Jae Lee, Hye Jin Kim, Jin Ju Yu, Dong Hyun Yu, Young Sik Yoon, Jong Hwan Lee
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Publication number: 20120195134Abstract: A data alignment circuit includes: a select transmission unit configured to selectively transmit a first pulse or ground voltage as a first control pulse and selectively transmit a second pulse or ground voltage as a second control pulse, in response to a control signal; and a data latch unit configured to latch data in response to the first and second pulses and the first and second control pulses, and generate first to fourth data.Type: ApplicationFiled: January 24, 2012Publication date: August 2, 2012Applicant: Hynix Semiconductor Inc.Inventor: Tae Jin KANG
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Publication number: 20120169380Abstract: A semiconductor integrated circuit includes a first output driver configured to drive a first comparison signal, which is generated by comparing a voltage of a pad coupled to an external resistor with an upper-limit reference voltage, according to drivability determined by a pull-up code and a pull-down code, and output the driven signal as first output data; and a second output driver configured to drive a second comparison signal, which is generated by comparing the voltage of the pad with a lower-limit reference voltage, according to the drivability determined by the pull-up code and the pull-down code, and output the driven signal as second output data.Type: ApplicationFiled: September 23, 2011Publication date: July 5, 2012Applicant: HYNIX SEMICONDUCTOR INC.Inventor: Tae Jin KANG
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Publication number: 20120113728Abstract: A data input circuit includes a clock sampling unit, a final clock generation unit, and a write latch signal generation unit. The sampling unit is configured to generate a shifting signal including a pulse generated after a write latency is elapsed, and generate a sampling clock by sampling an internal clock during a burst period from substantially a time when the pulse of the shifting signal is generated. The final clock generation unit is configured to generate a level signal by latching the shifting signal in synchronization with the sampling clock and generate a final clock from the level signal in response to a burst signal. The write latch signal generation unit is configured to generate an enable signal by latching the final clock and generate a write latch signal for latching and outputting aligned data in response to the enable signal.Type: ApplicationFiled: April 28, 2011Publication date: May 10, 2012Applicant: HYNIX SEMICONDUCTOR INC.Inventors: Kyoung Hwan KWON, Tae Jin KANG, Sang Kwon LEE
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Patent number: 8139423Abstract: A write driving device includes a buffer unit, a duration signal generation unit, and a data input clock pulse generation unit. The buffer unit is configured to generate an alignment signal in response to a transition timing of a data strobe signal. The duration signal generation unit is configured to generate a duration signal which is enabled during a predetermined duration in response to a write command. The data input clock pulse generation unit is configured to generate a data input clock pulse for transferring data to a global line in response to the alignment signal within an enable duration of the duration signal.Type: GrantFiled: November 4, 2010Date of Patent: March 20, 2012Assignee: Hynix Semiconductor Inc.Inventor: Tae Jin Kang
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Patent number: 8054709Abstract: A semiconductor memory device comprises a power control circuit for outputting a power voltage in a read operation period and a write operation period, and an internal circuit operating by the power voltage supplied thereto.Type: GrantFiled: June 30, 2009Date of Patent: November 8, 2011Assignee: Hynix Semiconductor Inc.Inventor: Tae Jin Kang
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Publication number: 20110216911Abstract: An ear-microphone for connection to a portable apparatus and use as a Frequency Modulation (FM) radio broadcast receiving antenna is provided. The ear-microphone includes an ear plug, a cable, a microphone, and a filtering unit. The ear plug is for connection to an earjack. The cable has a predefined length, has an earphone line whose one end is electrically connected to the ear plug and whose other end is electrically connected to at least one earphone. The microphone intervenes in an intermediate portion of the cable and is connected to the ear plug via a microphone line inside the cable. The filtering unit intervenes in the cable and is installed to have an Electro Static Discharge (ESD) protection function.Type: ApplicationFiled: February 25, 2011Publication date: September 8, 2011Applicant: SAMSUNG ELECTRONICS CO. LTD.Inventor: Tae-Jin KANG
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Publication number: 20110218297Abstract: Disclosed herein is a novel gluconacetobacter strain having cellulose producing activity. Specifically, the present invention relates to a novel gluconacetobacter strain producing nano-structured cellulose in a highly efficient manner. The cellulose produced by the strain, due to its superb thermodynamic properties, can be characterized as nano-structured bacterial cellulose and therefore utilized as a bio-nano-fiber. Particularly, the cellulose can be impregnated with a resin to form a cellulose-based resin which can be effectively adapted for a substrate for a liquid crystal display (LCD).Type: ApplicationFiled: March 2, 2011Publication date: September 8, 2011Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jong-Seong KIM, Woo-Jae LEE, Nam-Seok ROH, Sang-IL KIM, Min-Ho YOON, Young Tak SONG, Tae Jin KANG, Suk Heung OH, Seung-Jae LEE, Hye Jin KIM, Jin Ju YU, Dong Hyun YU, Young Sik YOON, Jong Hwan LEE
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Patent number: 7990784Abstract: A semiconductor memory device having a clock signal generating circuit which is capable of controlling a data output in compliance with PVT fluctuation by controlling a output timing of rising and falling clock signal based on a fuse cutting is described. The clock signal generating circuit includes a fuse unit for generating first and second fuse signals based on fuse cutting of fuses, a control signal generating unit for generating first and second fuse signals in response to the fuse signals, a clock signal delaying unit for generating a delayed clock signal by delaying the external clock signal by a delay section specified by the control signals, and a clock generating unit for generating a first internal clock signal in synchronization with a rising edge of the delayed clock signal and for generating a second internal clock signal in synchronization with a falling edge of the delayed clock signal.Type: GrantFiled: June 5, 2008Date of Patent: August 2, 2011Assignee: Hynix Semiconductor Inc.Inventor: Tae Jin Kang
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Publication number: 20110171015Abstract: Provided is a centrifugal compressor. In the centrifugal compressor, a plurality of sub-compressors each of which includes an impeller are connected in parallel to increase a compression capacity, the plurality of sub-compressors are each assembled to a single common shaft that is rotated by a driving unit, and the impellers of the plurality of sub-compressors are disposed in opposing directions. The centrifugal compressor reduces a production cost, and cancels thrusts during driving so as to reduce a loss of a bearing, thereby increasing efficiency of the compressor.Type: ApplicationFiled: December 14, 2010Publication date: July 14, 2011Inventor: Tae Jin KANG
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Publication number: 20110158032Abstract: A clock control circuit is presented for reducing unnecessary current consumption. The clock control circuit includes a write enable signal generation unit and a clock enable signal generation unit. The write enable signal generation unit is configured to generate a first write enable signal, which is enabled during a predetermined time period after a write command is inputted, in response to first and second burst signals and a write signal including a pulse generated in response to the write command. The clock enable signal generation unit is configured to generate a clock enable signal, which is enabled during a write operation period, in response to the first write signal and the first write enable signal.Type: ApplicationFiled: June 28, 2010Publication date: June 30, 2011Applicant: Hynix Semiconductor Inc.Inventor: Tae Jin KANG
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Publication number: 20110128049Abstract: A write driving device includes a buffer unit, a duration signal generation unit, and a data input clock pulse generation unit. The buffer unit is configured to generate an alignment signal in response to a transition timing of a data strobe signal. The duration signal generation unit is configured to generate a duration signal which is enabled during a predetermined duration in response to a write command. The data input clock pulse generation unit is configured to generate a data input clock pulse for transferring data to a global line in response to the alignment signal within an enable duration of the duration signal.Type: ApplicationFiled: November 4, 2010Publication date: June 2, 2011Applicant: HYNIX SEMICONDUCTOR INC.Inventor: Tae Jin KANG
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Patent number: 7952957Abstract: A circuit for generating a read end signal includes a clock transferring unit which receives a clock signal, a write/read status signal and an all bank precharge signal and outputs a delayed clock signal, a read signal detecting unit which receives a read pulse signal and the delayed clock signal and generates a read detection signal having a pulse width corresponding to a certain clock, and a read end signal generating unit which receives a first signal, the delayed clock signal and the read detection signal and generates a read end signal.Type: GrantFiled: June 4, 2009Date of Patent: May 31, 2011Assignee: Hynix Semiconductor Inc.Inventor: Tae Jin Kang
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Publication number: 20110094251Abstract: A dual turbo centrifugal chiller includes: first and second evaporators connected in series or in parallel; first and second condensers connected in series or in parallel; and first and second compressors including impellers, wherein cold water passes through the second evaporator after passing through the first evaporator, and cooling water passes through the second condenser after passing through the first condenser, the first compressor containing a refrigerant connects the first condenser to the second evaporator, and the second compressor containing a refrigerant connects the second condenser to the first evaporator, and the impellers of the first compressor and second compressor are rotated simultaneously using a single driving unit.Type: ApplicationFiled: June 8, 2010Publication date: April 28, 2011Inventors: Kil Young Kim, Jin Sung Kim, Tae Jin Kang
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Patent number: 7924634Abstract: A repeater of a global input/output line includes a data transmitter including first and second drivers for outputting data signals of the global input/output line through different transmission routes in response to a transmission direction control signal, and a third driver for driving the global input/output line in response to an output signal of the data transmitter.Type: GrantFiled: July 1, 2008Date of Patent: April 12, 2011Assignee: Hynix Semiconductor Inc.Inventors: Tae Jin Kang, Seung Hyun Ryu
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Publication number: 20100317677Abstract: The invention relates to methods and compositions for treating a microbial infection. In the present invention, RNase-L activity has been shown to play an integral role in innate immunity and for defense against invading microbes. The present invention is drawn to exploiting the role of RNase-L in innate immunity for methods of treating a microbial infection. The present invention is also drawn to exploiting the role of RNase-L in innate immunity for methods of treating an immune related disease or disorder.Type: ApplicationFiled: September 10, 2008Publication date: December 16, 2010Inventors: Bret A. Hassel, Alan S. Cross, Xiao-Ling Li, Tae Jin Kang
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Patent number: RE44230Abstract: A clock signal generation apparatus for generating a reference clock signal for outputting data in synchronization with an external clock signal from a semiconductor memory device, including: a clock signal generation unit for receiving an internal clock signal to generate the reference clock signal according to a control signal; and a control unit for generating the control signal based on a read command, a write command and an external address.Type: GrantFiled: February 6, 2012Date of Patent: May 21, 2013Assignee: 658868 N.B. Inc.Inventor: Tae-Jin Kang