Patents by Inventor Tae Joo

Tae Joo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7560374
    Abstract: A mold for forming a conductive bump, a method of fabricating the mold, and a method of forming a bump on a wafer using the mold are provided. The bump can be formed by employing various materials, the mold can be repeatedly used several times because the mold is not damaged, and due to a high precision, the pitch of the bumps is not limited. The mold for forming a conductive bump comprises a first substrate having a groove to form a bump; a second substrate for vacuum adsorption formed below the first substrate, and having a through-hole in communication with the groove; and a mask layer formed on the first substrate, and used to form the groove.
    Type: Grant
    Filed: June 14, 2007
    Date of Patent: July 14, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Tae-Joo Hwang
  • Publication number: 20090149016
    Abstract: Provided is a semiconductor device and a method of fabricating the same. The method of fabricating the semiconductor device includes forming a mask pattern having an opening corresponding to an electrode pad formed on a semiconductor substrate; forming a bump by filling the opening with a conductive first material; forming a sidewall film on sidewalls of the bump using a second material; forming a connection member between an upper surface of the bump and a wire substrate using a conductive third material in order to electrically connect the bump and the wire substrate; and forming an underfill resin between the wire substrate and the semiconductor substrate, wherein a wetting angle between the second material and the third material is greater than that between the first material and the third material.
    Type: Application
    Filed: December 8, 2008
    Publication date: June 11, 2009
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jin-Woo PARK, Tae-Joo HWANG, Nam-Seog KIM
  • Publication number: 20090147946
    Abstract: Provided is an apparatus for computing a T-function based Stream Cipher (TSC)-4 stream cipher. The apparatus includes: two T-function units; and a nonlinear filter for receiving bits output from the two T-function units and generating an 8-bit output sequence per clock. Each of the T-function units includes: a first register for storing an internal state value of the lower N bits; an N-bit internal state updater for updating the internal state value of the lower N-bits stored in the first register; an intermediate result register for storing an intermediate result value output from the N-bit internal state updater; a second register for storing an internal state value of the upper M bits; and an M-bit internal state updater for updating the internal state value of the upper M bits stored in the second register using the value stored in the intermediate result register.
    Type: Application
    Filed: November 13, 2008
    Publication date: June 11, 2009
    Inventors: Gwon Ho RYU, Dong Wook LEE, Bon Seok KOO, Tae Joo CHANG
  • Publication number: 20090113220
    Abstract: An encrypted backup data storage device and a storage system using the same are provided. A backup memory stores at least one of plain-text data and a secret key. A leakage current blocking circuit includes at least one inverter and a complementary metal oxide semiconductor (CMOS) NAND gate circuit and cuts off leakage current paths formed by the lines connected to the battery backup memory.
    Type: Application
    Filed: October 24, 2008
    Publication date: April 30, 2009
    Inventors: Sang Han LEE, Hae Yong YANG, Tae Joo CHANG, Choon Soo KIM
  • Patent number: 7474414
    Abstract: A system and a method of guiding a real-time inspection using a 3D scanner are provided. The system and the method of guiding a real-time inspection using a 3D scanner allow an operator to perform an accurate and swift inspection of an object to be measured so as to meet a designer's design intentions. For that purpose, 3D shape information of an object to be measured is detected using a scanner and shape information and inspection guide information of the object stored in a data storage unit, and inspection information of the object for judging the validity of the measurement information detected from the scanner is checked through a display unit. After that, the scanner is operated to compare the measurement information detected by the scanner with the inspection information so as to judge the validity of the measurement. Therefore, an operator can accurately understand a designer's intentions for inspection to perform measurement.
    Type: Grant
    Filed: November 21, 2005
    Date of Patent: January 6, 2009
    Assignee: Inus Technology, Inc.
    Inventors: Seock Hoon Bae, Tae Joo Kim
  • Publication number: 20080277800
    Abstract: Example embodiments relate to semiconductor packages and methods of forming the same. A semiconductor package according to example embodiments may include a printed circuit board (PCB), a first semiconductor chip mounted on the PCB, and a chip package mounted on the first semiconductor chip. The chip package may be in direct contact with the first semiconductor chip.
    Type: Application
    Filed: May 7, 2008
    Publication date: November 13, 2008
    Inventors: Tae-Joo Hwang, Tae-Gyeong Chung, Eun-Chul Ahn
  • Publication number: 20080268579
    Abstract: A semiconductor chip package capable of improving reliability at a chip interconnection portion and improving reliability in a solder joint by reducing thermal and mechanical stresses at an external portion of the package including a solder ball land, and a method of fabricating the package are provided. The method of fabricating a semiconductor chip package includes providing a substrate; forming a first underfill on a first portion of the substrate; forming a second underfill at a chip interconnection portion of the substrate; and mounting a semiconductor chip on the chip interconnection portion using conductive bumps. In the method, the second underfill is formed of a material having a modulus higher than the first underfill.
    Type: Application
    Filed: April 25, 2008
    Publication date: October 30, 2008
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hae-Jung YU, Mu-Seob SHIN, Tae-Joo HWANG, Tae-Gyeong CHUNG, Eun-Chul AHN
  • Publication number: 20080258288
    Abstract: In a semiconductor device stack package and a method of forming the same, the package comprises: a substrate; a plurality of lower chips stacked on the substrate and having an active surface oriented in a direction toward the substrate; and at least one upper chip disposed on the lower chips and connected to the substrate via a bump disposed between the lower chips. As no wire loops are formed, there is no increase in the height of the stack package, and the electrical path is shortened, thereby improving the electric performance of the stack package. Also, the semiconductor device stack package has a flip chip structure, and thus a plurality of semiconductor chips can be stacked in various manners.
    Type: Application
    Filed: April 18, 2008
    Publication date: October 23, 2008
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jin-woo Park, Cha-je Jo, Eun-chul Ahn, Tae-joo Hwang, Hae-jung Yu, Chan Park
  • Publication number: 20080122084
    Abstract: A flip-chip assembly comprises a semiconductor chip, a substrate, a first buffer layer, a second buffer layer and a conductive bump. The semiconductor chip includes a first region and a second region adjacent to the first region. The substrate is disposed under the semiconductor chip. The first buffer layer is disposed between the first region of the semiconductor chip and the substrate. The second buffer layer is disposed between the second region of the semiconductor chip and the substrate. The conductive bump is formed through the second buffer layer and electrically connects the semiconductor chip to the substrate.
    Type: Application
    Filed: November 28, 2007
    Publication date: May 29, 2008
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Tae-Joo HWANG, Eun-Chul AHN, Tae-Gyeong CHUNG
  • Publication number: 20080112560
    Abstract: Provided are an arithmetic method and apparatus for supporting Advanced Encryption Standard (AES) and Academy, Research Institute and Agency (ARIA) encryption/decryption functions. The apparatus includes: a key scheduler for generating a round key using an input key; and a round function calculator for generating encrypted/decrypted data using input data and the round key. Here, the round function calculator includes an integrated substitution layer and an integrated diffusion layer capable of performing both AES and ARIA algorithms.
    Type: Application
    Filed: October 25, 2007
    Publication date: May 15, 2008
    Inventors: Bon Seok KOO, Gwon Ho RYU, Sang Woon YANG, Tae Joo CHANG
  • Publication number: 20080006949
    Abstract: Provided are a semiconductor package and a method of fabricating the same. The semiconductor package includes a semiconductor chip, and a plurality of conductive balls, e.g., solder balls formed on a joint surface of the semiconductor chip. A dummy board includes openings aligned with the solder balls and is bonded to the joint surface of the semiconductor chip. An adhesive material is interposed between the semiconductor chip and the dummy board to adhere the dummy board to the semiconductor chip. The adhesive material is applied on an adhesion surface of the dummy board adhered to a joint surface of the semiconductor chip. The dummy board is adhered to the joint surface of the semiconductor chip such that the solder balls are aligned with the openings. Cheap underfill materials can be selectively used, and a process time for reflow and curing of the adhesive material can be greatly reduced.
    Type: Application
    Filed: June 19, 2007
    Publication date: January 10, 2008
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jong-Gi LEE, Tae-Joo HWANG
  • Patent number: 7315583
    Abstract: The present invention provides asymmetric digital subscriber line (ADSL) modems including a discrete multitone (DMT) modem module. The DMT modem module includes a digital signal processor (DSP) configured to process control signals for initializing the ADSL modem during installation associated with a host device and transmit the processed control signals to a host controller of the host device.
    Type: Grant
    Filed: April 7, 2003
    Date of Patent: January 1, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Jin-Tae Joo
  • Publication number: 20070290367
    Abstract: A mold for forming a conductive bump, a method of fabricating the mold, and a method of forming a bump on a wafer using the mold are provided. The bump can be formed by employing various materials, the mold can be repeatedly used several times because the mold is not damaged, and due to a high precision, the pitch of the bumps is not limited. The mold for forming a conductive bump comprises a first substrate having a groove to form a bump; a second substrate for vacuum adsorption formed below the first substrate, and having a through-hole in communication with the groove; and a mask layer formed on the first substrate, and used to form the groove.
    Type: Application
    Filed: June 14, 2007
    Publication date: December 20, 2007
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Tae-Joo Hwang
  • Publication number: 20070209895
    Abstract: A cord reel assembly according to the present disclosure includes a power cord; and a cord reel around which the power cord is automatically wound when the power cord is separated from an electric power source, the cord reel from which the power cord is automatically unwound when the power cord connected to the electric power source.
    Type: Application
    Filed: November 20, 2006
    Publication date: September 13, 2007
    Inventors: Jang-keun Oh, Sung-tae Joo
  • Publication number: 20070094837
    Abstract: A vacuum cleaner is provided that comprises a dust collection unit mounted to a mounting portion of a cleaner body. The dust collection unit separates dust from outside air being drawn in. The dust collection unit has a handle and a locking unit for detachably fixing the dust collection unit to the cleaner body. Here, the locking unit comprises a locking member moving between a connecting position and a releasing position, the connecting position for being engaged with a connection recess formed on the cleaner body and the releasing position for being released from the connection recess; and a button member formed on an outer surface of the dust collection unit for pressing operation.
    Type: Application
    Filed: April 13, 2006
    Publication date: May 3, 2007
    Inventors: Kyong-hui Jeon, Ki-man Kim, Sung-tae Joo
  • Publication number: 20060229679
    Abstract: In a method of operating an external defibrillator configured to provide a defibrillation shock to a patient, physiological data is gathered from the patient. Next, the physiological data is analyzed using a first algorithm to determine whether to initiate a shock. Then, if it is determined that a defibrillation shock should be provided, the physiological data is analyzed using a second algorithm to verify the determination to shock.
    Type: Application
    Filed: March 31, 2005
    Publication date: October 12, 2006
    Inventor: Tae Joo
  • Publication number: 20060184847
    Abstract: The present invention provides semiconductor devices capable of being tested using one test pin and using an input/output pin without any test pins, and methods of testing the same. One semiconductor device comprises a test pin for inputting/outputting test data, an operation mode controller for activating an enable signal in response to an external reset signal and a clock signal, an operation mode storage for receiving serial data synchronized with the clock signal through the test pin in response to the enable signal, and an operation mode decoder for generating operation mode selection signals in response to the serial data stored in the operation mode storage.
    Type: Application
    Filed: February 2, 2006
    Publication date: August 17, 2006
    Applicant: Samsung Electronics Co., LTD.
    Inventors: Hae-Jin Song, Jin-Tae Joo
  • Publication number: 20060167515
    Abstract: Signal data obtained from a piezoelectric sensor placed on a patient's body is used to detect the presence of a cardiac pulse. The piezoelectric sensor has a transducing element adapted to sense movement due to a cardiac pulse and produce piezoelectric signal data in response thereto. Processing circuitry analyzes the piezoelectric signal data for a feature indicative of a cardiac pulse and determines whether a cardiac pulse is present in the patient based on the feature. In one aspect, the feature may be a temporal feature such as a relative change in energy. In another aspect, the feature may be a spectral feature such as the energy or frequency of a peak in the energy spectrum of the signal. In yet another aspect, the feature may be obtained by comparing the piezoelectric signal data with a previously-identified pattern known to predict the presence of a cardiac pulse. Multiple features may also be obtained from the piezoelectric signal data and classified to determine the presence of a cardiac pulse.
    Type: Application
    Filed: July 22, 2005
    Publication date: July 27, 2006
    Applicant: Medtronic Emergency Response
    Inventors: Ronald Stickney, Cynthia Jayne, Paula Lank, Patricia O'Hearn, Tae Joo, David Hampton, Richard Nova, Patrick Kelly, William Saltzstein
  • Publication number: 20060060039
    Abstract: Disclosed herein is a workpiece ejecting device for a machine tool, in which the ejecting bar cannot be rotatably driven at the time of high velocity rotation of the spindle to thereby prevent occurrence of vibration, noise and frictional heat owing to the movement of the spindle, so that the machined workpiece can be ejected smoothly.
    Type: Application
    Filed: September 19, 2005
    Publication date: March 23, 2006
    Inventors: Tae Joo, Kyeong Kwon
  • Publication number: 20050240234
    Abstract: The presence of a cardiac pulse in a patient is determined by evaluating physiological signals in the patient. In one embodiment, a medical device evaluates two or more different physiological signals, such as phonocardiogram (PCG) signals, electrocardiogram (ECG) signals, patient impedance signals, piezoelectric signals, and accelerometer signals for features indicative of the presence of a cardiac pulse. Using these features, the medical device determines whether a cardiac pulse is present in the patient. The medical device may also be configured to report whether the patient is in a VF, VT, asystole, or PEA condition, in addition to being in a pulseless condition, and prompt different therapies, such as chest compressions, rescue breathing, defibrillation, and PEA-specific electrotherapy, depending on the analysis of the physiological signals. Auto-capture of a cardiac pulse using pacing stimuli is further provided.
    Type: Application
    Filed: June 27, 2005
    Publication date: October 27, 2005
    Applicants: Medtronic Emergency Response Systems, Inc.
    Inventors: Tae Joo, Ronald Stickney, Cynthia Jayne, Paula Lank, Patricia O'Hearn, David Hampton, James Taylor, William Crone, Daniel Yerkovich