Abstract: Provided are a semiconductor integrated device and a method for fabricating the same. The semiconductor integrated circuit includes a semiconductor substrate including a first dopant, a first conductive layer pattern formed on the semiconductor substrate, an interlayer dielectric layer formed on the first conductive layer pattern, a second conductive layer pattern formed on the interlayer dielectric layer, and a first vacuum ultraviolet (VUV) blocking layer which blocks a VUV ray radiated to the semiconductor substrate.

Abstract: Disclosed herein is an apparatus for cleaning a lubricant for dry-type wire drawing. The apparatus comprises a case provided with a cover and piercing holes at opposite sides of the case such that a steel wire can pass through the case, a plurality of driving motors provided at one side of the exterior of the case, rotating members located at an inside of the case and connected to the driving motors, respectively, by belts serving to rotate them, support plates for supporting the rotating members, and cleaning members coupled to the rotating member and adapted to provide a path through which the steel wire passes. The dry lubricant on the surface of the steel wire can be effectively cleaned by friction between the lubricant on the steel wire and the cleaning members.

Abstract: A dual port semiconductor memory device, including PMOS scan transistors, is provided. The dual port semiconductor memory device includes two PMOS transistors, two NMOS pull-down transistors, two NMOS pass transistors, and a PMOS scan transistor. The scan transistor being PMOS, noise margins can be improved. In addition, these seven transistors are arranged in two n-wells and 2 p-wells, while n-wells and p-wells are arranged in series and in alternating fashion. Therefore, the length of a memory cell along the minor axis of the memory cell is relatively short. This memory cell layout helps shorten the length of a bit line by arranging a pair of bitlines in parallel with well boundaries, i.e., in the direction of the short axis of the memory cell, and makes it possible to prevent crosstalk between a bitline and a complementary bitline by arranging conductive lines between the bitline and the complementary bitline.

Abstract: An apparatus for manufacturing a trapezoidal wire using two-set shaping rollers has a body rotating about a central axis at a predetermined speed, a plurality of first shaping roller sets installed along an outer circumference of the body, each first shaping roller set including an upper roller and a lower roller and a shaping portion, into which a wire is inserted to be processed, between the upper roller and the lower roller, and a plurality of second shaping roller sets arranged after the first shaping roller sets along the outer circumference of the body and in a direction in which the wire moves, each second shaping roller set comprising an upper roller and a lower roller and a shaping portion, into which the wire is inserted to be processed again, between the upper roller and the lower roller, wherein wires processed by the first and second shaping roller sets while passing therethrough are stranded by the rotating body.

Abstract: Provided are a semiconductor integrated device and a method for fabricating the same. The semiconductor integrated circuit includes a semiconductor substrate including a first dopant, a first conductive layer pattern formed on the semiconductor substrate, an interlayer dielectric layer formed on the first conductive layer pattern, a second conductive layer pattern formed on the interlayer dielectric layer, and a first vacuum ultraviolet (VUV) blocking layer which blocks a VUV ray radiated to the semiconductor substrate.

Abstract: The present invention provides a lyocell dipped cord prepared by dipping a lyocell raw cord comprising at least 2-ply lyocell multifilament in a dipping solution and curing the dipped cord, which gives a stress-strain curve exhibiting that (a) the lyocell dipped cord has an elongation of 1.2% or less at an initial stress of 1.0 g/d, and an initial modulus value of 80 to 200 g/d; (b) has an elongation of 6% or less in a stress region of 1.0 g/d to 4.0 g/d; and (c) has an elongation of 1% or more at a tensile strength of 4.0 g/d to the breaking point, as measured in the dried state. The lyocell dipped cord prepared according to the present invention can be used as industrial fibers, in particular, fibers for tire cords.

Abstract: The present invention provides a lyocell raw cord prepared from at least 2-ply lyocell multifilaments, which gives a stress-strain curve exhibiting that (a) the lyocell raw cord has an elongation of 1.5% or less at an initial stress of 1.0 g/d, and an initial modulus value of 50 to 100 g/d; (b) has an elongation of 7% or less in a stress region of 1.0 g/d to 4.0 g/d; and (c) has an elongation of 1% or more at a tensile strength of 4.0 g/d to the breaking point, as measured in the dried state. The lyocell raw cord prepared according to the present invention can be used as industrial fibers, in particular, fibers for tire cords.

Abstract: A continuous butt welding method using plasma and laser, and a method for fabricating a metal tube using the butt welding method are disclosed. The butt welding method conducts a laser welding and a plasma welding together against an object to be welded, which has a very narrow butt space. In particular, the plasma is prior to the laser so that the object is preheated by the plasma, and then a preform is melted by a laser beam in order to accomplish the major welding. In addition, a metal sheet is bent to have a circular section so that its both ends are faced with each other, and then the faced both ends are welded using the aforementioned butt welding method, thereby fabricating a metal tube. The butt welding method and the metal tube fabricating method mentioned above remarkably improve a welding speed and productivity of metal tube.

Abstract: The present invention relates to cellulose fiber containing 500 to 2000 of filaments and having homogeneous physical properties and the multi-filaments according to the present invention is characterized in that the strength and the breaking elongation of the multi-filaments are 4 to 9 g/d and 4 to 15%, respectively. In particular, the present invention is characterized in that each mono-filament selected 100 strands from every three part divided from multi-filaments has properties as following: (a) 3 to 9 g/d in average strength, 7 to 15% in average breaking elongation and 0.035 to 0.055 in by birefringence, (b) the differences of the above three parts are below 1.0 g/d in average strength, 1.5% in breaking elongation and 0.7 denier in denier, (c) the CV (%)(coefficient of variation) of the above three parts are below 10%, and (d) the birefringence differences of the above three parts are below 0.004.

Abstract: An apparatus for manufacturing a trapezoidal wire using two-set shaping rollers has a body rotating about a central axis at a predetermined speed, a plurality of first shaping roller sets installed along an outer circumference of the body, each first shaping roller set including an upper roller and a lower roller and a shaping portion, into which a wire is inserted to be processed, between the upper roller and the lower roller, and a plurality of second shaping roller sets arranged after the first shaping roller sets along the outer circumference of the body and in a direction in which the wire moves, each second shaping roller set comprising an upper roller and a lower roller and a shaping portion, into which the wire is inserted to be processed again, between the upper roller and the lower roller, wherein wires processed by the first and second shaping roller sets while passing therethrough are stranded by the rotating body.

Abstract: There is provided with a cellulose fiber suitable for industrial material which is produced by a process comprising following steps: producing NMMO solution made in a manner to dissolve 0.1 wt % to 10 wt % of salt and polyvinyl alcohol in concentrated N-Methyl Morpholine N-oxide (NMMO) in liquid state; producing cellulose solution in a manner that said NMMO solution is mixed with cellulose powder and then said cellulose powder is swelled to produce cellulose solution; obtaining multifilament by solidifying said cellulose solution reached at a coagulation bath through air layer after extruded-sprayed with spraying nozzle having orifices of 500 to 2000; and winding said multifilament for storing after in turn washing, drying and treating with organic solvent, and the cellulose fiber according to the present invention is suitable for industrial materials due to excellent mechanical strength.

Abstract: In one aspect, an electrically erasable and programmable read-only memory (EEPROM) is provided. The EEPROM includes a semiconductor substrate including spaced apart first, second and third active regions, a common floating gate traversing over the first through third active regions, source/drain regions formed in the third active region on opposite sides of the floating gate, a first interconnect connected to the first active region, a second interconnect connected to the second active region, and a third interconnect connected to either one of the source/drain regions.

Abstract: A field effect transistor includes a gate that is formed in a channel region of an active region defined on a substrate. A source is formed at a first surface portion of the active region that is adjacently disposed at a first side face of the gate. A drain is formed at a second surface portion of the active region that is opposite to the first surface portion with respect to the gate. The drain has a protruded portion that is protruded from a surface portion of the substrate.

Abstract: A field effect transistor includes a gate that is formed in a channel region of an active region defined on a substrate. A source is formed at a first surface portion of the active region that is adjacently disposed at a first side face of the gate. A drain is formed at a second surface portion of the active region that is opposite to the first surface portion with respect to the gate. The drain has a protruded portion that is protruded from a surface portion of the substrate.

Abstract: This invention relates to a method of preparing cellulose solution which is homogeneous at relatively low temperature, in which a small amount of cellulose powder or polyvinylalcohol is dissolved in the liquid-state, concentrated N-methylmorpholine-N-oxide (hereinafter, referred to as ‘NMMO’) so as to lower the solidifying temperature of NMMO, and then, the resulting solution and cellulose powder are fed into an extruder so as to be mixed, swollen and melted in the extruder.

Abstract: This invention relates to a method of preparing cellulose solution which is homogeneous at relatively low temperature, in which a small amount of cellulose powder or polyvinylalcohol is dissolved in the liquid-state, concentrated N-methylmorpholine-N-oxide (hereinafter, referred to as ‘NMMO’) so as to lower the solidifying temperature of NMMO, and then, the resulting solution and cellulose powder are fed into an extruder so as to be mixed, swollen and melted in the extruder.

Abstract: The present invention relates to an expansion tube that has a plurality of expansion slits on the outer peripheral surface thereof long a longitudinal direction, each of the expansion slits having a predetermined width and a relatively larger length than the predetermined width, and an apparatus for manufacturing a heat shrinkable tube, having the expansion tube, that can regularly and fast expand the heat shrinkable tube, and after the expansion, regularly and fast cool the heat shrinkable tube by the cooling water sprayed through the slits, thereby rapidly and stably manufacturing the heat shrinkable.

Abstract: A field effect transistor includes a gate that is formed in a channel region of an active region defined on a substrate. A source is formed at a first surface portion of the active region that is adjacently disposed at a first side face of the gate. A drain is formed at a second surface portion of the active region that is opposite to the first surface portion with respect to the gate. The drain has a protruded portion that is protruded from a surface portion of the substrate.

Abstract: A dual port semiconductor memory device, including PMOS scan transistors, is provided. The dual port semiconductor memory device includes two PMOS transistors, two NMOS pull-down transistors, two NMOS pass transistors, and a PMOS scan transistor. The scan transistor being PMOS, noise margins can be improved. In addition, these seven transistors are arranged in two n-wells and 2 p-wells, while n-wells and p-wells are arranged in series and in alternating fashion. Therefore, the length of a memory cell along the minor axis of the memory cell is relatively short. This memory cell layout helps shorten the length of a bit line by arranging a pair of bitlines in parallel with well boundaries, i.e., in the direction of the short axis of the memory cell, and makes it possible to prevent crosstalk between a bitline and a complementary bitline by arranging conductive lines between the bitline and the complementary bitline.

Abstract: A semiconductor integrated circuit device is provided. The semiconductor integrated circuit device includes a semiconductor substrate, a transistor having a gate interconnection that extends in one direction on the semiconductor substrate and source/drain regions aligned in the gate interconnection and formed in the semiconductor substrate, and a diffusion-preventing metallic pattern extending on the gate interconnection in the same direction as the gate interconnection and which prevents ions from being diffused into the semiconductor substrate.