Abstract: A plasma display panel. A first substrate and a second substrate are provided opposing one another with a predetermined gap therebetween. Address electrodes are formed on the second substrate. Barrier ribs are mounted between the first substrate and the second substrate defining a plurality of discharge cells. Phosphor layers are formed within the discharge cells. Discharge sustain electrodes are formed on the first substrate. The discharge sustain electrodes include bus electrodes that extend such that a pair of the bus electrodes is provided for each of the discharge cells, and protrusion electrodes extending from each of the bus electrodes such that a pair of opposing protrusion electrodes is formed within an area corresponding to each discharge cell. A distal end of each protrusion electrode includes an indentation such that a gap is formed between the pair of opposing protrusion electrodes, and an aperture is formed in each protrusion electrode.

Abstract: A plasma display panel including a first panel, address electrodes formed on the first panel in a predetermined pattern, a first dielectric layer formed on the first panel and covering the address electrodes, a partition structure having unit partitions discontinuously formed on the first dielectric layer to partition a discharge space, the unit partitions being parallel to the address electrodes and each having auxiliary partitions, red, green and blue phosphor layers coated in the partitioned discharge space, a second panel, which is coupled to the first panel to form the discharge space and which is transparent, a plurality of pairs of sustaining electrodes formed on an inner surface of the second panel and having sets of first and second electrodes at a predetermined angle with respect to the address electrodes, and a second dielectric layer formed on the second panel and covering the sustaining electrodes.

Abstract: A plasma display panel including a first panel, address electrodes formed on the first panel in a predetermined pattern, a first dielectric layer formed on the first panel and covering the address electrodes, a partition structure having unit partitions discontinuously formed on the first dielectric layer to partition a discharge space, the unit partitions being parallel to the address electrodes and each having auxiliary partitions, red, green and blue phosphor layers coated in the partitioned discharge space, a second panel, which is coupled to the first panel to form the discharge space and which is transparent, a plurality of pairs of sustaining electrodes formed on an inner surface of the second panel and having sets of first and second electrodes at a predetermined angle with respect to the address electrodes, and a second dielectric layer formed on the second panel and covering the sustaining electrodes.

Abstract: A plasma display panel includes a front glass substrate and a rear glass substrate coupled to each other by a sealing material coated at edges of the front and rear glass substrates, first and second electrodes disposed perpendicular to each other on opposing inner surfaces of the front and rear glass substrates facing each other, a dielectric layer formed on each of the opposing inner surfaces of the front and rear glass substrates to cover the first and second electrodes, partitions formed on an upper surface of the dielectric layer of the rear glass substrate, red, green and blue fluorescent substances coated between the partitions, and a non-light emitting zone filling portion formed by filling a non-light emitting zone existing between the outermost one of the partitions and the sealing material with a material used for one of the partitions.

Abstract: A PDP address data processor, a method thereof, and a recording medium for storing a program used to perform the method. The address data processor generates subfield data corresponding to RGB input video data, divides them into two sets of subfield data, and stores them in a frame memory using rising and falling edges of a reference clock signal of a frame memory. The address data processor reads and arranges the stored subfield data using the rising and falling edges to generate address data for representing gray on the PDP. The address data processor uses an RGB mixing algorithm for selecting two different video data from among the RGB input video data to select video data, and generates the subfield data corresponding to the selected video data.

Abstract: A plasma display device includes a plasma display panel (PDP). A chassis base supports the PDP from a surface of the same opposite a surface that displays images, and a plurality of driving circuit boards are mounted on the chassis base. A front cabinet is positioned adjacent to the surface of the plasma display panel that displays images. Also, a back cover is positioned adjacent to a surface of the chassis base opposite the surface adjacent to the PDP and is integrally assembled to the front cabinet with the chassis base and the plasma display panel interposed therebetween. The plasma display device also includes thermoelectric semiconductor devices that are mounted within the back cover. The thermoelectric semiconductor devices act to discharge heat generated by the PDP and the driving circuit boards to outside the back cover.

Abstract: A plasma display panel includes first and second substrates spaced apart from each other at a distance while proceeding substantially parallel to each other. The first and the second substrates have a display area and a non-display area. A plurality of address electrodes are formed on the first substrate, and covered by a dielectric layer. Main barrier ribs are arranged between the substrates to form discharge cells. Phosphor layer is formed with the discharge cells. A plurality of discharge sustain electrodes are formed on the surface of the second substrate facing the first substrate, and covered by a dielectric layer. Reinforcing barrier ribs are arranged at the non-display area while surrounding the display area, and connected to the main barrier ribs with an outer structure curved toward the outside of the substrates.

Abstract: A plasma display panel includes a substrate, a dielectric layer formed on a top surface of the substrate, and partitions spaced a predetermined distance apart from each other and having a snaking or meandering shape. The partitions form channels having main discharge spaces and auxiliary discharge spaces alternately arranged and connected to each other. Red (R), green (G) and blue (B) phosphors are coated on the main discharge spaces in a triangular shape and where G and R phosphors are aligned with each other in a horizontal direction. The thicknesses of partitions forming the main discharge spaces where the R and G phosphors are coated are greater than thicknesses of the partitions forming the main discharge spaces where the B phosphor is coated.

Abstract: A plasma display panel reduces noise caused by the formation of minute gaps between the first substrate and the second substrate. The plasma display panel includes a first substrate and a second substrate opposing one another with a predetermined gap therebetween, and a sealant formed on opposing surfaces of the first substrate and the second substrate. The sealant is formed around outer circumferential areas of the first substrate and the second substrate to seal the first substrate and the second substrate together. The sealant is formed of regions having a first width of substantially the same size and of regions having a second width greater than the size of the first width.

Abstract: A plasma display device assembled with a base of a chassis, a plasma display panel mounted on a front side of the chassis' base substantially in parallel to the chassis' base, and a drive circuit panel mounted on the reverse side of the chassis' base opposite from the plasma display panel is provided. A front cover is positioned around the exposed front side of the plasma display panel opposite from the chassis base, and a back cover is positioned on the rear side of the chassis base opposite from the plasma display panel while completely covering the chassis base. The back cover may be constructed with separate and discrete covering elements formed by a main cover having an opening that exposes circuitry for the drive circuit panel, and at least one sub-cover removably attached to the main cover to close an access opening in the main cover.

Abstract: Noise exiting from a plasma display device is effectively reduced and a degree of freedom of design is increased according to a plasma display device that includes a base chassis, a PDP adhered to the base chassis, a PDP driving circuit board adhered to the base chassis opposite to the PDP, a front cover disposed in front of the PDP, a rear cover having a plurality of ventilation holes for heat radiation, the rear cover being disposed at the rear of the base chassis and covering the base chassis, and a noise-shielding member for covering the plurality of ventilation holes from front or rear thereof, such that noise generated inside of the device is reflected or diffracted.

Abstract: A plasma display panel includes a front glass substrate and a rear glass substrate coupled to each other by a sealing material coated at edges of the front and rear glass substrates, first and second electrodes disposed perpendicular to each other on opposing inner surfaces of the front and rear glass substrates facing each other, a dielectric layer formed on each of the opposing inner surfaces of the front and rear glass substrates to cover the first and second electrodes, partitions formed on an upper surface of the dielectric layer of the rear glass substrate, red, green and blue fluorescent substances coated between the partitions, and a non-light emitting zone filling portion formed by filling a non-light emitting zone existing between the outermost one of the partitions and the sealing material with a material used for one of the partitions.

Abstract: A plasma display device which improves the adhesion rate of a thermal conductive medium. A chassis base is disposed substantially parallel to a plasma display panel. A thermally conductive medium is disposed between the plasma display panel and the chassis base and is closely adhered to both the plasma display panel and the chassis base. An adhesive pad is interposed between the plasma display panel and the chassis base along the edge of the thermally conductive medium and is adhered to both the plasma display panel and the chassis base. The thermally conductive medium includes a plurality of thermally conductive particles of high thermal conductivity.

Abstract: A plasma display panel includes a rear substrate, a front substrate spaced from the rear substrate and forming a discharge space between the substrates, partition walls between the front and rear substrates sectioning the discharge space into red, green, and blue discharge cells including red, green, and blue light-producing fluorescent substances, so that the areas of the discharge cells are different from one another depending on a ratio of efficiencies of light radiation by the fluorescent substances. Address electrodes are located on the rear substrate, and discharge maintenance electrodes, having pairs of first and second electrodes, are located on the front substrate and extend in a direction crossing the address electrodes. First, second, and third transparent electrodes extend from the first and second electrodes over parts of the red, green, and blue discharge cells.

Abstract: A plasma display panel includes a substrate, a dielectric layer formed on a top surface of the substrate, and partitions spaced a predetermined distance apart from each other and having a snaking or meandering shape. The partitions form channels having main discharge spaces and auxiliary discharge spaces alternately arranged and connected to each other. Red (R), green (G) and blue (B) phosphors are coated on the main discharge spaces in a triangular shape and where G and R phosphors are aligned with each other in a horizontal direction. The thicknesses of partitions forming the main discharge spaces where the R and G phosphors are coated are greater than thicknesses of the partitions forming the main discharge spaces where the B phosphor is coated.

Abstract: An AC type plasma display panel including a front substrate, strip-shaped common and scan electrodes on a bottom surface of the front substrate, bus electrodes along one edge of a side of respective the common and scan electrodes, a first dielectric layer on the bottom surface of the front substrate to cover the electrodes, a protective layer on a bottom surface of the first dielectric layer, a rear substrate opposite to and facing the front substrate, address electrodes on a top surface of the rear substrate to be perpendicular with the common and scan electrodes, a second dielectric layer on the rear substrate to cover the address electrodes, partitions comprising strip-shaped main partitions formed on the second dielectric layer, and auxiliary partitions connected to the main partitions to partition a discharge space, and R, G and B phosphor layers formed on the inner walls of the partitions.

Abstract: An AC type plasma display panel including a front substrate, strip-shaped common and scan electrodes on a bottom surface of the front substrate, bus electrodes along one edge of a side of respective the common and scan electrodes, a first dielectric layer on the bottom surface of the front substrate to cover the electrodes, a protective layer on a bottom surface of the first dielectric layer, a rear substrate opposite to and facing the front substrate, address electrodes on a top surface of the rear substrate to be perpendicular with the common and scan electrodes, a second dielectric layer on the rear substrate to cover the address electrodes, partitions comprising strip-shaped main partitions formed on the second dielectric layer, and auxiliary partitions connected to the main partitions to partition a discharge space, and R, G and B phosphor layers formed on the inner walls of the partitions.

Abstract: A plasma display panel including a first panel, address electrodes formed on the first panel in a predetermined pattern, a first dielectric layer formed on the first panel and covering the address electrodes, a partition structure having unit partitions discontinuously formed on the first dielectric layer to partition a discharge space, the unit partitions being parallel to the address electrodes and each having auxiliary partitions, red, green and blue phosphor layers coated in the partitioned discharge space, a second panel, which is coupled to the first panel to form the discharge space and which is transparent, a plurality of pairs of sustaining electrodes formed on an inner surface of the second panel and having sets of first and second electrodes at a predetermined angle with respect to the address electrodes, and a second dielectric layer formed on the second panel and covering the sustaining electrodes.

Abstract: A plasma display panel includes a front glass substrate and a rear glass substrate coupled to each other by a sealing material coated at edges of the front and rear glass substrates, first and second electrodes disposed perpendicular to each other on opposing inner surfaces of the front and rear glass substrates facing each other, a dielectric layer formed on each of the opposing inner surfaces of the front and rear glass substrates to cover the first and second electrodes, partitions formed on an upper surface of the dielectric layer of the rear glass substrate, red, green and blue fluorescent substances coated between the partitions, and a non-light emitting zone filling portion formed by filling a non-light emitting zone existing between the outermost one of the partitions and the sealing material with a material used for one of the partitions.