Abstract: Breakage of an IC included in a plasma display device can be prevented by a plasma display device including: a Plasma Display Panel (PDP); a chassis base attached the PDP on one side thereof and attached to a printed circuit board assembly on another side thereof; an Integrated Circuit (IC) package including an IC coupled between an electrode from the PDP and the printed circuit board assembly; and a cover plate attached to a chassis base interposing the IC package; and at least one of the chassis base and the cover plate includes at least one slit arranged in a vicinity of a portion corresponding to the IC.

Abstract: A plasma display panel includes a first substrate and second substrate opposing each other, address electrodes arranged on the first substrate along a first direction, barrier ribs arranged between the first substrate and the second substrate to define a plurality of discharge cells, and display electrodes arranged on the second substrate along the second direction intersecting the first direction. The barrier ribs include dummy barrier ribs arranged in a non-display region provided in the first substrate and the second substrate, the dummy barrier ribs satisfying the following formula: 2.4?(h/l)×100?6.0 where l is a length of a dummy barrier rib measured in the first direction, and h is a height of a barrier rib measured in a thickness direction of the panel.

Abstract: An exemplary plasma display panel according to one embodiment includes a first substrate and a second substrate, a barrier rib, address electrodes, a phosphor layer, display electrodes, and a first dielectric layer. The first and second substrates are disposed facing each other. The barrier rib is disposed between the first and second substrates and forms discharge cells. The address electrode is formed in one direction on the first substrate corresponding to the discharge cells. The phosphor layer is formed in each discharge cell. A display electrode is formed in a direction that crosses the address electrode on the second substrate. A first dielectric layer covers the address electrode. The first dielectric layer is formed, in the direction of the length of the address electrode, up to at least one of the edges of the first substrate.

Abstract: A plasma display device comprises a plasma display panel, a chassis base for supporting the plasma display panel, and a circuit board assembly mounted on the chassis base with circuit elements for applying electrical signals required for driving the plasma display panel. The chassis base is bent with a curvature such that the curvature of the chassis base compensates for a curvature of the bent plasma display panel.

Abstract: A plasma display for applying a voltage Vs and a voltage ?Vs to the scan electrodes and for applying a ground voltage to the sustain electrodes during a sustain period. The voltage ?Vs is applied to the scan electrodes after the voltage of the scan electrodes is reduced from the voltage Vs to a voltage Vs1 which is higher than the ground voltage and is reduced from the voltage Vs1 to the voltage ?Vs. The voltage Vs is applied to the scan electrodes after the voltage of the scan electrodes is increased from the voltage ?Vs to a voltage Vs2 which is lower than the ground voltage and is increased from the voltage Vs2 to the voltage Vs.

Abstract: A plasma display panel design having a display area and a peripheral area surrounding the display area. Within the display area are discharge cells, and within the peripheral area are dummy cells that serve as a location where fluorescent paste is injected onto in an early stage of making the display, enabling the injection amount and injection speed from a nozzle to stabilize before the fluorescent material is deposited into the discharge cells. A surface area that the fluorescent material is deposited on in the peripheral area is increased to provide for a more rapid stabilization of the injection pressure and injection amount of the paste in the making of the display. A sufficient gap is present between a sealant and the dummy structure so that air and foreign matter can be expelled.

Abstract: A plasma display panel (PDP) is provided capable of improving luminous efficiency by enlarging a discharge space, and lowering a discharge firing voltage. The plasma display panel includes a first dielectric layer next to a discharge cell in which a plurality of grooves are formed such that each groove is formed between an X electrode and a Y electrode of the discharge cell and covering the sustain electrode pairs and the intermediate electrodes.

Abstract: A method of driving a plasma display panel (PDP) and an apparatus for carrying out the method. The PDP includes address electrodes with first electrodes and second electrodes intersecting the address electrodes. Gray-scale levels being represented by combinations of sub-fields, each sub-field having a reset period, an address period, and a sustain-discharge period. The different gray scales are achieved not only by modifying the voltage waveforms in the sustain-discharge period but also by modifying the voltage waveforms in the reset period, allowing for better control over gray scales and better contrast. Different sub-fields can have different voltages applied during the reset period which affects the luminance of the image displayed. A circuit for making the above voltage waveforms is also presented.

Abstract: A plasma display panel (PDP) having a simple manufacturing process, and improved discharge stability, brightness, and light emission efficiency is disclosed. In one embodiment, the PDP includes i) an upper substrate and a lower substrate facing each other, ii) a plurality of barrier ribs disposed between the upper substrate and the lower substrate to define a plurality of discharge cells together with the upper substrate and the lower substrate, iii) at least one pair of discharge electrodes that generate a discharge and extend across the discharge cells consecutively disposed in one direction, iv) a plurality of address electrodes disposed to cross the discharge electrodes across the discharge cells consecutively disposed in another direction v) an upper dielectric layer and a lower dielectric layer respectively covering at least one pair of discharge electrodes and the address electrodes; a fluorescent layer disposed in the discharge cells, and vi) a discharge gas filled in the discharge cells.

Abstract: A plasma display panel capable of preventing faulty discharge and non-uniform discharge by applying a uniform address voltage to all subpixels. This is done by neutralizing the negative surface potential of a zinc silicate green fluorescent material using YBO3:Tb as a positive surface potential material on the partition walls between the electrodes. Also, the thickness of this YBO3:Tb material and a lateral spacing between a scan electrode and the positive surface potential material are carefully selected to arrive at a design resulting in no faulty pixels. Grooves can also be formed in the tops of the partition walls so that the positive surface potential material filled therein does not mix with the neighboring flourescent material.

Abstract: A plasma display panel (PDP) is characterized such that the strength of barrier ribs can be maintained, impurity gases can be easily exhausted, and a discharge gas can be smoothly filled in the discharge cells when manufacturing the PDP. The PDP includes: a transparent front substrate; a rear substrate disposed facing the front substrate; a plurality of discharge electrodes disposed between the front substrate and the rear substrate; a plurality of barrier ribs disposed between the front substrate and the rear substrate, and defining a plurality of discharge cells which are spaces for generating a discharge, the barrier ribs having side walls that define an exhaust channel formed in at least a portion between the discharge cells, at least one of the side walls having an arc-like shape; a phosphor layer disposed in each of the discharge cells; and a discharge gas filled in the discharge cells.

Abstract: A plasma display panel including a rear substrate, a front substrate disposed separated from the rear substrate, partition walls disposed between the front substrate and the rear substrate to define discharge cells together with the front and rear substrates, sustain electrode pairs extending across the discharge cells, and address electrodes extending in a direction substantially perpendicular to the sustain electrode pairs. A sustain electrode comprises a bus electrode and a transparent electrode. The bus electrode extends across the discharge cells, and the transparent electrode comprises a body portion disposed apart from the bus electrode in a direction towards a center of a discharge cell and a connection portion electrically connecting the body portion to the bus electrode. A ratio of a width of the body portion to a length of the connection portion is in a range of 1.2 to 2.2.

Abstract: A PDP includes a barrier rib formed between an upper substrate and a lower substrate to define discharge regions, and a phosphor layer including red, green, and blue phosphor layers corresponding to the discharge regions. A height of the green phosphor layer is lower than a height of the barrier rib.

Abstract: The present invention relates to a plasma display panel including a first substrate having a plurality of address electrodes and a dielectric layer, a second substrate, which is opposed to the first substrate, having a plurality of display electrodes, a dielectric layer, and a protection layer, barrier ribs formed on the first substrate to partition a plurality of discharge cells between the first substrate and the second substrate, a red, a green, and a blue phosphor layer formed inside of each discharge cell partitioned by the barrier ribs, and a layer for decreasing reflective brightness, which is formed on the upper-end surface of the barrier ribs, and comprises calcium magnesium silicate based blue phosphor.

Abstract: A plasma display panel is provided having a plurality of scan electrodes and sustain electrodes formed parallel to each other in pairs on a first substrate, and a plurality of address electrodes formed on a second substrate that cross the plurality of first and second electrode pairs. A reset waveform is applied to a scan electrode during a reset period, and a scan pulse that falls from a first voltage level to a second voltage level is applied to the can electrode during an address period. A pre-scan pulse of a third voltage level, which is higher than the first voltage level, is applied to a scan electrode between the reset and address periods, and either a magnitude of the third voltage level or a width of the pre-scan pulse is adjusted according to patterns of subfield data.

Abstract: A display apparatus having a heat dissipating structure for a driver integrated circuit is provided. The display apparatus may be a plasma display apparatus including a chassis base, a plasma display panel (PDP) adjacent to a first side of the chassis base, and a driving circuit board attached on a second side of the chassis base, the second side being opposite to the first side where the PDP is attached. The plasma display apparatus also includes a driver integrated circuit (IC) electrically connected to electrodes of the PDP and the driving circuit board at a position therebetween, the driver IC selectively providing a voltage to the electrodes of the PDP in accordance with signals controlled by the driving circuit board. The plasma display apparatus also has a heat dissipation unit positioned at the edge of the PDP wherein the heat dissipation unit dissipates heat from the driver IC.

Abstract: A plasma display panel (PDP) designed to reduce the amount of external light that is reflected. This is accomplished by having some phosphor material on portions of the tops of the barrier ribs outside the discharge cells. Since the reflectance of the barrier rib material is higher than that of phosphor material, such a design will reduce the amount of external light reflected off the screen of a plasma display panel. By reducing external light reflection, the contrast of the image is improved. This can be achieved while still preventing crosstalk between neighboring discharge cells.

Abstract: A driving method of a plasma display panel including a discharge space defined by a plurality of scan electrodes, a plurality of sustain electrodes and a plurality of address electrodes for preventing or reducing a misfiring address discharge. In the driving method, a low scan pulse voltage, which is lower than a low scan pulse voltage applied to a previously addressed scan electrode, is applied to a scan electrode which is scanned later in an address period. A low scan pulse voltage applied in an address period of a subfield having a sub-reset period is established to be lower than a low scan pulse voltage applied in an address period of a subfield having a main reset period.

Abstract: A plasma display panel that includes a front substrate, and a sustain electrode formed on the front substrate. The sustain electrode comprises a transparent electrode and a bus electrode coupled to each other, and the bus electrode comprises conductive particles and adhesive particles. An average diameter of the conductive particles and an average diameter of the adhesive particles are less than 5 ?m.

Abstract: A plasma display device having a structure that reduces the probability of breakdown of the signal transmitting unit. The plasma display device includes a chassis base, a PDP supported in front of the chassis base, a driving circuit board that drives the PDP and is supported on a rear side of the chassis base, and a signal transmitting unit that couples the driving circuit board and the PDP by detouring the chassis base, wherein the ratio of H/W of a separation distance H with respect to a distance W between a connection portion and a vertical portion of the signal transmitting unit is 0.075?H/W?0.500.