Patents by Inventor Tae-kyung Kim

Tae-kyung Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210177945
    Abstract: Provided is a method for administering a recombinant human growth hormone GX-H9 for treating growth hormone deficiency. Particularly, the present disclosure relates to a pharmaceutical composition for treating growth hormone deficiency, containing a recombinant hGH GX-H9 and a pharmaceutically acceptable carrier, in which the recombinant GX-H9 is administered once a week with a dosage of 0.1 to 0.3 mg per weight kg of a patient or twice-monthly with a dosage of 0.1 to 0.4 mg per weight kg of the patient. Further, the present disclosure relates to a method for treating growth hormone deficiency including administering an recombinant hGH GX-H9 to a patient with growth hormone deficiency once a week with a dosage of 0.1 to 0.3 mg per weight kg of the patient or twice-monthly with a dosage of 0.1 to 0.4 mg per weight kg of the patient.
    Type: Application
    Filed: February 16, 2017
    Publication date: June 17, 2021
    Inventors: Tae Kyung Kim, Young_Joo Ahn, Jung Won Woo, Ji-Eun Cha, Joan Yoon Ji Lee, Woo Ick Jang
  • Patent number: 11016799
    Abstract: Methods and systems for resource usage tracking are disclosed. In one embodiment, an exemplary method comprises maintaining, in a data store, a configuration file associated with a virtual server instance; instantiating a virtual server based on the virtual server instance by: locating, in the data store, the configuration file; determining required virtual server resources based on the contents of the configuration file; configuring at least one resource of the virtual server based on the contents of the configuration file; and spinning up the virtual server. The method may also comprise determining that an instantiated virtual server has reached an error state; and based on the determination that the instantiated virtual server has reached an error state, determining a configuration file associated with the instantiated virtual server; and instantiating a new virtual server using the determined configuration file.
    Type: Grant
    Filed: January 30, 2020
    Date of Patent: May 25, 2021
    Assignee: COUPANG CORP.
    Inventor: Tae Kyung Kim
  • Patent number: 11010707
    Abstract: A system for interconnecting network devices based on queuing and servicing responses includes one or more processors configured to receive, from a first computer system, an order request for a product or service associated with a second computer system of a plurality of second computer systems. Instantiate an order messaging queue associated with the order request and add an identifier of the first computer system to the order messaging queue. Add an identifier of the second computer system and one of the third computer systems to the order messaging queue. Determine the contents of the communication and based on determining contents of the communication, consult a response rule table to determine a response to the communication. Access the order messaging queue to identify server devices corresponding with servicing the determined response and publish, to the identified server devices.
    Type: Grant
    Filed: March 2, 2020
    Date of Patent: May 18, 2021
    Assignee: Coupang Corp.
    Inventor: Tae Kyung Kim
  • Publication number: 20210090994
    Abstract: There are provided a semiconductor device and a manufacturing method thereof. The semiconductor device includes: a stack structure including a plurality of interlayer insulating layers and a plurality of gate conductive layers, which are stacked in an alternating manner; at least one support structure penetrating the stack structure in a substantially vertical manner, the at least one support structure being formed in a contact region; and a contact plug penetrating the stack structure in a substantially vertical manner, the contact plug being formed in the contact region, the contact plug being connected to a contact pad that is disposed on the bottom of the stack structure. The at least one support structure is formed of an oxide layer.
    Type: Application
    Filed: May 1, 2020
    Publication date: March 25, 2021
    Applicant: SK hynix Inc.
    Inventors: Jae Yoon NOH, Tae Kyung KIM, Hyo Sub YEOM, Jeong Yun LEE
  • Patent number: 10937800
    Abstract: A three-dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers located over a substrate, memory openings vertically extending through the alternating stack, and memory stack structures located within a respective one of the memory openings. A multi-pillared dielectric isolation structure extends through upper sections of a neighboring pair of memory openings. The multi-pillared dielectric isolation structure includes a plurality of dielectric pillar portions located within a respective one of the memory openings, and at least one horizontally-extending portion adjoining each of the plurality of dielectric pillar portions and located between a vertically neighboring pair of insulating layers within the alternating stack. The at least one horizontally-extending portion laterally separates laterally neighboring strips of at least one electrically conductive layer within the alternating stack.
    Type: Grant
    Filed: March 13, 2019
    Date of Patent: March 2, 2021
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Tae-Kyung Kim, Johann Alsmeier
  • Patent number: 10936098
    Abstract: Disclosed is a display apparatus with integrated touch screen, which prevents short circuit from occurring between bridge electrodes and first and second touch electrodes. The display apparatus includes a light emitting device layer disposed on a first substrate, an encapsulation layer disposed on the light emitting device layer, and a touch sensing layer disposed on the light emitting device layer, the touch sensing layer including a plurality of first touch electrodes, a plurality of second touch electrodes, a plurality of bridge electrodes, and a step height cover layer covering a step height caused by at least one of the plurality of first touch electrodes, the plurality of second touch electrodes, and the plurality of bridge electrodes.
    Type: Grant
    Filed: December 11, 2018
    Date of Patent: March 2, 2021
    Assignee: LG DISPLAY CO., LTD.
    Inventors: Tae-Kyung Kim, KwangSu Lim, HyoSeon Kim, Sangheun Lee
  • Patent number: 10911903
    Abstract: Disclosed are systems and methods for multi-point destination arrival time analysis. In one aspect, the system may include a memory storing instructions and at least one processor configured to execute the instructions to. The processor performs operations including receiving a request for an order, receiving an acceptance of an order associated with the first external system, determining, upon receiving the acceptance, a first arrival estimate, determining, upon assigning a delivery worker to fulfill the order, a second arrival estimate, and determining, upon receiving confirmation that the delivery worker has retrieved the order from the merchant, a third arrival estimate. Additionally, the operations may include and forwarding, upon their determination, the first, second, and third arrival estimates to the customer.
    Type: Grant
    Filed: January 29, 2020
    Date of Patent: February 2, 2021
    Assignee: Coupang Corp.
    Inventors: Tae Kyung Kim, Chee Hyung Yoon
  • Publication number: 20200350258
    Abstract: A method of manufacturing a semiconductor memory device includes processing a first substrate including a first align mark and a first structure, processing a second substrate including a second align mark and a second structure, orientating the first substrate and the second substrate such that the first structure and the second structure face each other, and controlling alignment between the first structure and the second structure by using the first align mark and the second align mark to couple the first structure with the second structure.
    Type: Application
    Filed: October 24, 2019
    Publication date: November 5, 2020
    Applicant: SK hynix Inc.
    Inventors: Kun Young LEE, Tae Kyung KIM
  • Patent number: 10825826
    Abstract: Three-dimensional memory devices in the form of a memory die includes an alternating stack of insulating layers and electrically conductive layers located over a substrate, and memory stack structures extending through the alternating stack, in which each of the memory stack structures includes a memory film and a vertical semiconductor channel contacting an inner sidewall of the memory film. Bit lines are electrically connected to an end portion of a respective one of the vertical semiconductor channels. Bump connection via structures contact a top surface of a respective one of the bit lines, in which each of the bump connection via structures has a greater lateral dimension along a lengthwise direction of the bit lines than along a widthwise direction of the bit lines. Metallic bump structures of another semiconductor die contact respective ones of the bump connection via structures to make respective electrical connections between the two dies.
    Type: Grant
    Filed: June 1, 2020
    Date of Patent: November 3, 2020
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Jixin Yu, Tae-Kyung Kim, Johann Alsmeier, Yan Li, Jian Chen
  • Publication number: 20200340713
    Abstract: The present invention relates to a gas heat pump system. A gas heat pump system according to one embodiment of the present invention comprises: a compressor for compressing a refrigerant; a gas engine for driving the compressor; a mixer for mixing air and fuel to generate a mixed gas to be supplied to the gas engine; a mixed gas supply line connected between the mixer and the gas engine; and a supercharger for supercharging the mixed gas supplied to the gas engine through the mixed gas supply line, wherein the supercharger comprises a sealed housing formed by sealing the remaining parts thereof other than an inlet port and an outlet port through which the mixed gas moves into and out of the housing, and a bypass line is provided between the sealed housing and the inlet port of the supercharger so as to resupply a mixed gas in the sealed housing to the inlet port of the supercharger.
    Type: Application
    Filed: December 10, 2018
    Publication date: October 29, 2020
    Inventors: Joongkeun CHOI, Tae Kyung KIM, Sung Bae SONG, Young Gyu JUNG
  • Patent number: 10817328
    Abstract: Methods and systems for resource usage metric grading are disclosed. In one embodiment, an exemplary method comprises receiving a request to assign a first role to at least one virtual server; configuring the virtual server to associate the first role with a first resource of the virtual server; modifying a database to include an identifier associated with the virtual server and an identifier of the first role assigned to the virtual server; receiving, from the virtual server, indications of resource usage for a plurality of roles; calculating an efficiency metric associated with the first role, the efficiency based on resource usage associated with the first role and resource usage associated with the plurality of roles; modifying a user interface element for presentation on a web page to include the calculated efficiency metric for the first role; receiving a request from a user; and delivering the web page.
    Type: Grant
    Filed: January 30, 2020
    Date of Patent: October 27, 2020
    Assignee: Coupang Corp.
    Inventor: Tae Kyung Kim
  • Patent number: 10817329
    Abstract: Methods and systems for diagnosis of live virtual server performance data are disclosed. In one embodiment, an exemplary method comprises receiving a request to assign a first role to at least one virtual server; configuring the virtual server to associate the first role with a first resource of the virtual server; modifying a database to include an identifier associated with the virtual server and an identifier of the first role assigned to the virtual server; receiving indications of first resource usage; mapping the first resource usage to the first role; storing the indications of first resource usage; associating a change in first resource usage with a corresponding first resource operation; modifying a user interface element for presentation on a web page to include the first resource usage; receiving a request for the web page from a user; and delivering the web page to a user interface.
    Type: Grant
    Filed: February 7, 2020
    Date of Patent: October 27, 2020
    Assignee: COUPANG CORP.
    Inventor: Tae Kyung Kim
  • Patent number: 10798761
    Abstract: A method for establishing a plurality of protocol data unit (PDU) sessions between a user equipment (UE) and a data network (DN) by the UE may comprise transmitting a message to establish the plurality of PDU sessions to at least one network function (NF) of a plurality of NFs, exchanging a signal to establish the plurality of PDU sessions among the UE, a radio access network (RAN), and the plurality of NFs based on the message, and establishing the plurality of PDU sessions between the UE and the DN according to predetermined priority and based on the signal, wherein each of the plurality of PDU sessions corresponds to a network slice (NS) for a particular service, wherein the message includes information about the particular service corresponding to the plurality of PDU sessions, and wherein the priority is determined based on the information about the particular service.
    Type: Grant
    Filed: June 8, 2018
    Date of Patent: October 6, 2020
    Assignees: Samsung Electronics Co., Ltd., Korea University Research and Business Foundation
    Inventors: Young-Kyo Baek, Jung-Je Son, Sung-Hoon Kim, Sang-Heon Pack, Ho-Yeon Lee, Han-Eul Ko, Won-Jun Lee, Cheng Long Shao, Jae-Wook Lee, Hee-Jun Roh, Tae-Kyung Kim, Sun-Jae Kim
  • Publication number: 20200295030
    Abstract: A three-dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers located over a substrate, memory openings vertically extending through the alternating stack, and memory stack structures located within a respective one of the memory openings. A multi-pillared dielectric isolation structure extends through upper sections of a neighboring pair of memory openings. The multi-pillared dielectric isolation structure includes a plurality of dielectric pillar portions located within a respective one of the memory openings, and at least one horizontally-extending portion adjoining each of the plurality of dielectric pillar portions and located between a vertically neighboring pair of insulating layers within the alternating stack. The at least one horizontally-extending portion laterally separates laterally neighboring strips of at least one electrically conductive layer within the alternating stack.
    Type: Application
    Filed: March 13, 2019
    Publication date: September 17, 2020
    Inventors: Tae-Kyung KIM, Johann ALSMEIER
  • Publication number: 20200295029
    Abstract: Three-dimensional memory devices in the form of a memory die includes an alternating stack of insulating layers and electrically conductive layers located over a substrate, and memory stack structures extending through the alternating stack, in which each of the memory stack structures includes a memory film and a vertical semiconductor channel contacting an inner sidewall of the memory film. Bit lines are electrically connected to an end portion of a respective one of the vertical semiconductor channels. Bump connection via structures contact a top surface of a respective one of the bit lines, in which each of the bump connection via structures has a greater lateral dimension along a lengthwise direction of the bit lines than along a widthwise direction of the bit lines. Metallic bump structures of another semiconductor die contact respective ones of the bump connection via structures to make respective electrical connections between the two dies.
    Type: Application
    Filed: June 1, 2020
    Publication date: September 17, 2020
    Inventors: Jixin Yu, Tae-Kyung Kim, Johann Alsmeier, Yan Li, Jian Chen
  • Publication number: 20200280714
    Abstract: An example camera and a method for extracting depth information by the camera having a first lens and a second lens are provided. The method includes photographing, by the first lens, a first image; photographing, by the second lens, a second image of a same scene; down-sampling the first image to a resolution of the second image if the first image is an image having a higher resolution than a resolution of the second image; correcting the down-sampled first image to match the down-sampled first image to the second image; and extracting the depth information from the corrected down-sampled first image and the second image.
    Type: Application
    Filed: May 1, 2020
    Publication date: September 3, 2020
    Inventors: Jin-Kyung LEE, Tae-Kyung KIM, Taek-Seong JEONG
  • Publication number: 20200243499
    Abstract: There are provided a semiconductor memory device and a method for manufacturing the same. The semiconductor memory device includes: a first substrate including a peripheral circuit, first conductive contact patterns connected to the peripheral circuit, and a first upper insulating layer having grooves exposing the first conductive contact patterns; a second substrate including a memory cell array, a second upper insulating layer disposed on the memory cell array, the second upper insulating layer formed between the memory cell array and the first upper insulating layer, a second conductive contact patterns protruding through the second upper insulating layer into an opening of the grooves; and conductive adhesive patterns filling the grooves to connect the second conductive contact patterns to the first conductive contact patterns.
    Type: Application
    Filed: October 14, 2019
    Publication date: July 30, 2020
    Applicant: SK hynix Inc.
    Inventors: Kun Young LEE, Tae Kyung KIM
  • Patent number: 10720605
    Abstract: A device with light emitting elements can prevent interfacial peeling of a plurality of layers. The device with light emitting elements includes: a substrate including an emission area in which the light emitting elements are arranged and a non-emission area that surrounds the emission area; a first organic film that covers the emission area and has a first modulus of elasticity; a second organic film that is disposed on the first organic film and has a second modulus of elasticity which is greater than the first modulus of elasticity; and a metal film that is disposed on the second organic film and has a third modulus of elasticity which is greater than the second modulus of elasticity.
    Type: Grant
    Filed: August 29, 2019
    Date of Patent: July 21, 2020
    Assignee: LG Display Co., Ltd.
    Inventor: Tae-Kyung Kim
  • Patent number: 10707228
    Abstract: Three-dimensional memory devices in the form of a memory die includes an alternating stack of insulating layers and electrically conductive layers located over a substrate, and memory stack structures extending through the alternating stack, in which each of the memory stack structures includes a memory film and a vertical semiconductor channel contacting an inner sidewall of the memory film. Bit lines are electrically connected to an end portion of a respective one of the vertical semiconductor channels. Bump connection via structures contact a top surface of a respective one of the bit lines, in which each of the bump connection via structures has a greater lateral dimension along a lengthwise direction of the bit lines than along a widthwise direction of the bit lines. Metallic bump structures of another semiconductor die contact respective ones of the bump connection via structures to make respective electrical connections between the two dies.
    Type: Grant
    Filed: February 25, 2019
    Date of Patent: July 7, 2020
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Jixin Yu, Tae-Kyung Kim, Johann Alsmeier, Yan Li, Jian Chen
  • Patent number: 10684428
    Abstract: A front light unit of an embodiment comprises: a light source unit for an image display device; a light guide unit for guiding light incident from the light source unit and outputting the guided light to a display unit; and a holographic optical element unit being opposite to the display unit and disposed on the light guide unit. Therefore, the present invention can adjust the direction of light output from the light source unit and increase the quantity of light transferred to the display unit, using a pattern formed in the holographical optical element unit, thereby improving the efficiency of light supplied from the light source unit and reducing the sizes of the light unit and the display device including the same.
    Type: Grant
    Filed: February 26, 2016
    Date of Patent: June 16, 2020
    Assignee: LG INNOTEK CO., LTD.
    Inventors: Sang Hun Lee, Min Kim, Tae Kyung Kim, Jung In Jang