Patents by Inventor Tae Lim
Tae Lim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250138232Abstract: A polarizing plate and an optical display apparatus are disclosed. The polarizing plate includes a polarizer; and a retardation layer stack formed on one surface of the polarizer, wherein the retardation layer stack includes a second retardation layer, a first adhesive layer, and a first retardation layer sequentially stacked from the one surface of the polarizer, the first adhesive layer has a modulus of 1×105 Pa to 1×106 Pa at 25° C., and the second retardation layer and the first adhesive layer satisfy Relation 1.Type: ApplicationFiled: October 28, 2024Publication date: May 1, 2025Inventors: Seon Gyeong JEONG, Seong Hoon LEE, Hyoung Tae LIM, Kyung Jun MIN, Se Hyun PARK, Jun Mo KOO, Beom Deok LEE
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Publication number: 20250087546Abstract: In one example, an electronic device includes a substrate, an electronic component disposed over the substrate, and an encapsulant disposed over the substrate and the electronic component. A molded heat spreader can be disposed over the encapsulant and can comprise a heat spreader and a mold compound disposed around a lateral side of the heat spreader. A lateral side of the mold compound is coplanar with a lateral side of the encapsulant. Other examples and related methods are also disclosed herein.Type: ApplicationFiled: September 12, 2023Publication date: March 13, 2025Applicant: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Joon Dong Kim, Gi Tae Lim, Gi Jeong Kim, Min Hwa Chang, Gyu Wan Han, Hwi Won Yun
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Publication number: 20250031049Abstract: A system and method providing Proof of Location or Proof of Location and Velocity consensus in a blockchain network using radio frequency (RF) signals. Nodes validate the location of other nodes in the network using PING-PONG round trip signal propagation time to determine maximum distances to other nodes. These maximum distances are then shared between nodes, whereupon the nodes use computational techniques to resolve validated, geospatial location of the other nodes. The sharing of measured maximum distances to local nodes is a form of Proof of Location consensus. The validated geospatial locations (and velocities) of local nodes are then written to the blockchain, creating a time history for each node. This information may be used by the blockchain operating rules to implement any number of security and other operational functions. The ability of the invention to operate without need for time synchronization between nodes is an advantage of the system.Type: ApplicationFiled: June 17, 2024Publication date: January 23, 2025Inventors: Scott Hasbrouck, Tae Lim Oh
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Publication number: 20250031529Abstract: Disclosed is a light-emitting display device including a light-transmitting portion between a plurality of light-emitting portions, a first bank exposing each of the light-emitting portions and the light-transmitting portion, and an intermediate layer on the plurality of light-emitting portions and the first bank. The first bank has a first side surface adjacent to the light-emitting portion and a second side surface adjacent to the light-transmitting portion, and the second side surface has a reverse taper shape.Type: ApplicationFiled: July 15, 2024Publication date: January 23, 2025Inventors: Hee Tae LIM, Woo Young LEE, Sung Min JO, Myeong Seon CHO
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Publication number: 20250022784Abstract: A method of manufacturing a semiconductor device having a semiconductor die within an extended substrate and a bottom substrate may include bonding a bottom surface of a semiconductor die to a top surface of a bottom substrate, forming an adhering member to a top surface of the semiconductor die, bonding an extended substrate to the semiconductor die and to the top surface of the bottom substrate utilizing the adhering member and a conductive bump on a bottom surface of the extended substrate and a conductive bump on the bottom substrate. The semiconductor die and the conductive bumps may be encapsulated utilizing a mold member. The conductive bump on the bottom surface of the extended substrate may be electrically connected to a terminal on the top surface of the extended substrate. The adhering member may include a laminate film, a non-conductive film adhesive, or a thermal hardening liquid adhesive.Type: ApplicationFiled: September 27, 2024Publication date: January 16, 2025Inventors: Jae Yun Kim, Gi Tae Lim, Woon Kab Jung, Ju Hoon Yoon, Dong Joo Park, Byong Woo Cho, Gyu Wan Han, Ji Young Chung, Jin Seong Kim, Do Hyun Na
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Patent number: 12201026Abstract: Provided is a low frequency vibrating actuator device including an actuator configured to generate a vibration by receiving a voltage, a spring structure disposed on the actuator, and a vibrating mass part disposed on the spring structure. Here, the spring structure includes a first thin-film, a first spacer disposed between the first thin-film and the actuator, and a second spacer disposed between the first thin-film and the vibrating mass part. Also, the first spacer and the second spacer are horizontally offset from each other.Type: GrantFiled: October 4, 2021Date of Patent: January 14, 2025Assignee: Electronics and Telecommunications Research InstituteInventors: Kang-Ho Park, Jong Tae Lim, Seung Youl Kang, Bock Soon Na, Chan Woo Park, Wooseup Youm, Ji-Young Oh
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Publication number: 20250014975Abstract: In one example, an electronic device can comprise a first substrate, an electronic component disposed over a side of the first substrate, and a vertical interconnect coupled to the side of the first substrate. The vertical interconnect can comprise a first metallic core ball proximate the first substrate, a second metallic core ball disposed above the first metallic core ball and distal from the first substrate, and a fusible material coupling the first metallic core ball with the second metallic core ball. The fusible material can be coupled to the first substrate. A second substrate can be disposed over the electronic component and the vertical interconnect. The fusible material of the vertical interconnect can be coupled to the second substrate. Other examples and related methods are also disclosed herein.Type: ApplicationFiled: July 6, 2023Publication date: January 9, 2025Applicant: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Gi Tae Lim, Wook Choi, Seul Bee Lee
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Publication number: 20240400760Abstract: The present invention provides a polyamic acid aqueous solution composition capable of polymerizing polyamic acid in water rather than in an organic solvent, as well as achieving a high imidization rate during low-temperature curing.Type: ApplicationFiled: May 27, 2022Publication date: December 5, 2024Inventors: Jong Chan WON, Yun Ho KIM, No Kyun PARK, Yu Jin SO, Jin Soo KIM, Jong Min PARK, Sung Mi YOO, Yi Young KANG, Hyun Jin PARK, Yu Mi HA, Ji Yun CHUNG, Hyun Tae LIM, Eun Byeol SEO, Ji Won LEE, Hyun Jeong AHN
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Patent number: 12161010Abstract: An electroluminescent display device includes: a substrate, a first electrode on the substrate, a connection pattern on the substrate, the connection pattern including a same material as the first electrode, a bank covering edges of the first electrode and the connection pattern, a light-emitting layer on the first electrode, a second electrode on the light-emitting layer, the bank, and the connection pattern, and an auxiliary pattern between the connection pattern and the second electrode, the auxiliary pattern including one or more of: a metal oxide, conductive nanoparticles, and a work function-modifying polymer.Type: GrantFiled: November 1, 2021Date of Patent: December 3, 2024Assignee: LG Display Co., Ltd.Inventors: Heume-Il Baek, Jun-Ho Youn, Jeong-Mook Choi, Hee-Tae Lim, Ji-Ho Kang, Kyoung-Ji Bae, Jin-Ah Kwak, Sang-Bin Lee
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Publication number: 20240395725Abstract: In one example, an electronic device, comprises a first substrate comprising a first conductive structure, a second substrate comprising a second conductive structure, wherein the first substrate is over the second substrate, a first electronic component between the first substrate and the second substrate, a vertical interconnect between the first substrate and the second substrate, wherein the vertical interconnect is coupled with the first conductive structure and the second conductive structure, and an encapsulant between the first substrate and the second substrate and covering the vertical interconnect. A vertical port on the first electronic component is exposed by an aperture of the first substrate. Other examples and related methods are also disclosed herein.Type: ApplicationFiled: May 28, 2024Publication date: November 28, 2024Applicant: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Myung Jea Choi, Gyu Wan Han, Gi Tae Lim, Dong Joo Park, Ji Hun Yi, Jin Young Khim
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Patent number: 12142618Abstract: An image sensing device is provided to include a first photoelectric conversion element and a second photoelectric conversion element that are arranged adjacent to each other; a first isolation region located between the first and second photoelectric conversion elements and configured to receive a voltage to generate an electric field to attract photocharges from the first or second photoelectric conversion element; and a second isolation region separated from the first isolation region, the second isolation region located between the first and second photoelectric conversion elements and structured to include an insulation material to block photocharges from moving between the first and second photoelectric conversion elements.Type: GrantFiled: November 13, 2020Date of Patent: November 12, 2024Assignee: SK HYNIX INC.Inventor: Tae Lim Gu
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Patent number: 12107035Abstract: A method of manufacturing a semiconductor device having a semiconductor die within an extended substrate and a bottom substrate may include bonding a bottom surface of a semiconductor die to a top surface of a bottom substrate, forming an adhering member to a top surface of the semiconductor die, bonding an extended substrate to the semiconductor die and to the top surface of the bottom substrate utilizing the adhering member and a conductive bump on a bottom surface of the extended substrate and a conductive bump on the bottom substrate. The semiconductor die and the conductive bumps may be encapsulated utilizing a mold member. The conductive bump on the bottom surface of the extended substrate may be electrically connected to a terminal on the top surface of the extended substrate. The adhering member may include a laminate film, a non-conductive film adhesive, or a thermal hardening liquid adhesive.Type: GrantFiled: August 29, 2022Date of Patent: October 1, 2024Assignee: Amkor Technology Singapore Holdings Pte. Ltd.Inventors: Jae Yun Kim, Gi Tae Lim, Woon Kab Jung, Ju Hoon Yoon, Dong Joo Park, Byong Woo Cho, Gyu Wan Han, Ji Young Chung, Jin Seong Kim, Do Hyun Na
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Publication number: 20240302582Abstract: A polarizing plate and an optical display apparatus are disclosed. A polarizing plate includes a polarizer and a stack of retardation layers on a surface of the polarizer, and the stack of retardation layers includes a second retardation layer and a first retardation layer stacked on the polarizer in sequence from the surface of the polarizer, the second retardation layer being a non-liquid crystal layer, and the stack of retardation layers has an out-of-plane retardation of ?40 nm or more to less than 0 nm at a wavelength of 550 nm and satisfies Relation 1.Type: ApplicationFiled: February 26, 2024Publication date: September 12, 2024Inventors: Jun Mo KOO, Seong Hoon LEE, Dae Seob SHIM, Seon Gyeong JEONG, Boem Deok LEE, Hyoung Tae LIM, Seung Mi SHIN, Kyung Min CHO, Ki Beom KIM, Sang Hum LEE, Jung Hun YOU, Dong Ho WEE
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Publication number: 20240258182Abstract: In one example, a semiconductor device can comprise a substrate, a device stack, first and second internal interconnects, and an encapsulant. The substrate can comprise a first and second substrate sides opposite each other, a substrate outer sidewall between the first substrate side and the second substrate side, and a substrate inner sidewall defining a cavity between the first substrate side and the second substrate side. The device stack can be in the cavity and can comprise a first electronic device, and a second electronic device stacked on the first electronic device. The first internal interconnect can be coupled to the substrate and the device stack. The encapsulant can cover the substrate inner sidewall and the device stack and can fill the cavity. Other examples and related methods are disclosed herein.Type: ApplicationFiled: April 12, 2024Publication date: August 1, 2024Applicant: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Gyu Wan Han, Won Bae Bang, Ju Hyung Lee, Min Hwa Chang, Dong Joo Park, Jin Young Khim, Jae Yun Kim, Se Hwan Hong, Seung Jae Yu, Shaun Bowers, Gi Tae Lim, Byoung Woo Cho, Myung Jea Choi, Seul Bee Lee, Sang Goo Kang, Kyung Rok Park
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Patent number: 12036175Abstract: Provided is a vibratory stimulation device including a first substrate, a connection band connected to both sides of the first substrate, and a vibration element array including a plurality of vibration elements provided on the first substrate, wherein each of the vibration elements includes a stand provided on the first substrate, a vibration film provided on the stand and in contact with the stand at an edge, a vibrator provided on an upper or lower surface of the vibration film, and an electrode wire connected to the vibrator, wherein the vibration film includes a material that is more flexible and stretchable than the stand.Type: GrantFiled: May 24, 2021Date of Patent: July 16, 2024Assignee: Electronics and Telecommunications Research InstituteInventors: Kang-Ho Park, Jong Tae Lim, Seung Youl Kang, Bock Soon Na, Chan Woo Park, Seongdeok Ahn, Wooseup Youm, Ji-Young Oh
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Patent number: 11996369Abstract: In one example, an electronic device, comprises a first substrate comprising a first conductive structure, a second substrate comprising a second conductive structure, wherein the first substrate is over the second substrate, a first electronic component between the first substrate and the second substrate, a vertical interconnect between the first substrate and the second substrate, wherein the vertical interconnect is coupled with the first conductive structure and the second conductive structure, and an encapsulant between the first substrate and the second substrate and covering the vertical interconnect. A vertical port on the first electronic component is exposed by an aperture of the first substrate. Other examples and related methods are also disclosed herein.Type: GrantFiled: October 25, 2022Date of Patent: May 28, 2024Assignee: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Myung Jea Choi, Gyu Wan Han, Gi Tae Lim, Dong Joo Park, Ji Hun Yi, Jin Young Khim
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Patent number: 11961775Abstract: In one example, a semiconductor device can comprise a substrate, a device stack, first and second internal interconnects, and an encapsulant. The substrate can comprise a first and second substrate sides opposite each other, a substrate outer sidewall between the first substrate side and the second substrate side, and a substrate inner sidewall defining a cavity between the first substrate side and the second substrate side. The device stack can be in the cavity and can comprise a first electronic device, and a second electronic device stacked on the first electronic device. The first internal interconnect can be coupled to the substrate and the device stack. The encapsulant can cover the substrate inner sidewall and the device stack and can fill the cavity. Other examples and related methods are disclosed herein.Type: GrantFiled: November 8, 2022Date of Patent: April 16, 2024Assignee: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Gyu Wan Han, Won Bae Bang, Ju Hyung Lee, Min Hwa Chang, Dong Joo Park, Jin Young Khim, Jae Yun Kim, Se Hwan Hong, Seung Jae Yu, Shaun Bowers, Gi Tae Lim, Byoung Woo Cho, Myung Jea Choi, Seul Bee Lee, Sang Goo Kang, Kyung Rok Park
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Patent number: 11864440Abstract: An electroluminescent display device includes a substrate having an emission area and a transparent portion, the emission area including a sub-pixel, and the transparent portion being adjacent to the sub-pixel; a first electrode in the emission area and over the substrate; a transparent connection pattern in the transparent portion and over the substrate, the transparent connection pattern being spaced apart from the first electrode; a first bank covering an edge of the first electrode and exposing the transparent connection pattern in the transparent portion; and a second bank on the first bank and covering the transparent connection pattern in the transparent portion, wherein the second bank includes a transparent conductive material.Type: GrantFiled: November 4, 2021Date of Patent: January 2, 2024Assignee: LG DISPLAY CO., LTD.Inventors: Hee-Tae Lim, Ji-Ho Kang, Hak-Min Lee, Hyuk-Chan Gee
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Publication number: 20230376055Abstract: The present invention relates to a substrate support unit and a temperature control method of the substrate support unit, and more specifically, to a substrate support unit and a temperature control method of the substrate support unit, which can accurately measure and adjust the temperature of each zone when the substrate support unit that supports and heats a substrate is divided into a plurality of zones.Type: ApplicationFiled: May 2, 2023Publication date: November 23, 2023Applicant: TES CO., LTDInventor: Kyung-Tae LIM
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Patent number: 11784200Abstract: An image sensing device includes a photoelectric conversion element configured to generate photocharges in response to incident light, a floating diffusion configured to temporarily store the photocharges generated by the photoelectric conversion element, and a transfer gate configured to transmit the photocharges generated by the photoelectric conversion element to the floating diffusion region. The transfer gate includes a main transfer gate disposed to overlap a center section of the photoelectric conversion element and configured to operate in response to a first transmission signal, and a sub transfer gate disposed to overlap a boundary region of the photoelectric conversion element and configured to operate in response to a second potential level different from the first potential level.Type: GrantFiled: October 9, 2019Date of Patent: October 10, 2023Assignee: SK HYNIX INC.Inventors: Tae Lim Gu, Yun Hui Yang