Patents by Inventor Tae Lim
Tae Lim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 11650541Abstract: A method of manufacturing a full-color holographic optical element in a full-color holographic optical element manufacturing apparatus including a lens and a holographic recording medium located farther away than a focal length of the lens, the method including: allowing a signal beam including a mixture of laser beams having wavelengths of R (Red), G (Green), and B (Blue) to be incident on the lens; and recording a hologram in such a manner that a reference beam including a mixture of laser beams having wavelengths of R, G, and B is allowed to be incident on the holographic recording medium, wherein the holographic recording medium is configured with a single medium.Type: GrantFiled: December 20, 2018Date of Patent: May 16, 2023Assignee: CHUNGBUK NATIONAL UNIVERSITY INDUSTRY-ACADEMIC COOPERATION FOUNDATIONInventors: Nam Kim, Young Tae Lim, Chang Won Shin, Ki Chul Kwon
-
Publication number: 20230110213Abstract: In one example, an electronic device, comprises a first substrate comprising a first conductive structure, a second substrate comprising a second conductive structure, wherein the first substrate is over the second substrate, a first electronic component between the first substrate and the second substrate, a vertical interconnect between the first substrate and the second substrate, wherein the vertical interconnect is coupled with the first conductive structure and the second conductive structure, and an encapsulant between the first substrate and the second substrate and covering the vertical interconnect. A vertical port on the first electronic component is exposed by an aperture of the first substrate. Other examples and related methods are also disclosed herein.Type: ApplicationFiled: October 25, 2022Publication date: April 13, 2023Applicant: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Myung Jea Choi, Gyu Wan Han, Gi Tae Lim, Dong Joo Park, Ji Hun Yi, Jin Young Khim
-
Patent number: 11621389Abstract: Provided is a low frequency vibrating actuator device. The low frequency vibrating actuator device includes a substrate including a pair of connection electrodes, an actuator provided on the pair of connection electrodes to generate vibration, a support provided on the actuator, a vibration membrane provided on the support to vibrate according to the actuator, and a vibrating mass provided on the vibration membrane to vibrate according to the vibration membrane. The actuator includes a plurality of laminated insulating layers and internal electrodes that are alternately laminated between the insulating layers adjacent to each other, and a top surface of the support, which contacts the vibration membrane, has an area that is equal to or less than that of a bottom surface of the support, which contacts the actuator.Type: GrantFiled: September 17, 2020Date of Patent: April 4, 2023Assignee: Electronics and Telecommunications Research InstituteInventors: Kang-Ho Park, Seongdeok Ahn, Jong Tae Lim, Chan Woo Park, Ji-Young Oh
-
Publication number: 20230101713Abstract: A reel-to-reel circuit board manufacturing apparatus according to an embodiment of the present disclosure includes: a material which is moved while being wound and unwound by an uncoiler and a recoiler, and a clamp that is arranged so that a width direction of the material matches a lengthwise direction thereof, and is configured to fix the material, wherein the clamp includes a first clamp and a second clamp formed on opposite ends thereof, and a first-and-second clamp linkage formed between the first and second clamps.Type: ApplicationFiled: September 8, 2022Publication date: March 30, 2023Inventor: Hyun Tae LIM
-
Publication number: 20230070922Abstract: In one example, a semiconductor device can comprise a substrate, a device stack, first and second internal interconnects, and an encapsulant. The substrate can comprise a first and second substrate sides opposite each other, a substrate outer sidewall between the first substrate side and the second substrate side, and a substrate inner sidewall defining a cavity between the first substrate side and the second substrate side. The device stack can be in the cavity and can comprise a first electronic device, and a second electronic device stacked on the first electronic device. The first internal interconnect can be coupled to the substrate and the device stack. The encapsulant can cover the substrate inner sidewall and the device stack and can fill the cavity. Other examples and related methods are disclosed herein.Type: ApplicationFiled: November 8, 2022Publication date: March 9, 2023Applicant: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Gyu Wan Han, Won Bae Bang, Ju Hyung Lee, Min Hwa Chang, Dong Joo Park, Jin Young Khim, Jae Yun Kim, Se Hwan Hong, Seung Jae Yu, Shaun Bowers, Gi Tae Lim, Byoung Woo Cho, Myung Jea Choi, Seul Bee Lee, Sang Goo Kang, Kyung Rok Park
-
Publication number: 20230039362Abstract: Disclosed is a vibration stimulation device. The vibration stimulation device includes a box having a cavity, vibrators disposed in the cavity; light emitting elements disposed between the vibrators or disposed on the vibrators, an upper vibration layer configured to connect the vibrators and the light emitting elements to edges of the box on the cavity, and bumps disposed on the vibrators.Type: ApplicationFiled: June 6, 2022Publication date: February 9, 2023Inventors: Kang-Ho PARK, Jong Tae LIM, Seung Youl KANG, Sujung KIM, Bock Soon NA, Chan Woo PARK
-
Patent number: 11572426Abstract: The present disclosure relates to a 2-dimensional polymer nanosheet, a device including the nanosheet and a method of morphologically tunable preparing the nanosheet. Two-dimensional (2D) polymer nanosheets have been attracting immense attention owing to their potential applications in optical devices, membranes, and catalysis. A new crystalline polyacetylene is described that contains fluorenes and triisopropylsilyl side chains, which could self-assemble into sharp-edged 5-nm-thick square nanosheets with a narrow length dispersity of 1.01, by simple heating and aging in dichloromethane (DCM). The addition of tetrahydrofuran (THF) or chloroform to the heated polymer solution in DCM changed the morphology from square to rectangle. The aspect ratios increased linearly, from 1.0 to 10.6, according to the amount of THF or chloroform added, while maintaining narrow length dispersities less than 1.06.Type: GrantFiled: January 6, 2021Date of Patent: February 7, 2023Assignee: SNU R&DB FOUNDATIONInventors: Tae-Lim Choi, Sanghee Yang, Sung-Yun Kang
-
Patent number: 11560664Abstract: Disclosed herein is a washing machine. The washing machine includes a main body having a laundry inlet on the front portion, a tub provided inside the main body to store water, a drum rotatably installed inside the tub, a pulsator provided inside the drum and configured to be rotatable with respect to the drum, a first driving motor to provide power to the pulsator, and a second driving motor to provide power to the drum.Type: GrantFiled: May 26, 2021Date of Patent: January 24, 2023Assignee: Samsung Electronics Co., Ltd.Inventors: Jeoung Kyo Jeoung, Doo Young Rou, Yong Jong Park, Hee Tae Lim, Gyu Dong Jeon
-
Publication number: 20220415769Abstract: A method of manufacturing a semiconductor device having a semiconductor die within an extended substrate and a bottom substrate may include bonding a bottom surface of a semiconductor die to a top surface of a bottom substrate, forming an adhering member to a top surface of the semiconductor die, bonding an extended substrate to the semiconductor die and to the top surface of the bottom substrate utilizing the adhering member and a conductive bump on a bottom surface of the extended substrate and a conductive bump on the bottom substrate. The semiconductor die and the conductive bumps may be encapsulated utilizing a mold member. The conductive bump on the bottom surface of the extended substrate may be electrically connected to a terminal on the top surface of the extended substrate. The adhering member may include a laminate film, a non-conductive film adhesive, or a thermal hardening liquid adhesive.Type: ApplicationFiled: August 29, 2022Publication date: December 29, 2022Inventors: Jae Yun Kim, Gi Tae Lim, Woon Kab Jung, Ju Hoon Yoon, Dong Joo Park, Byong Woo Cho, Gyu Wan Han, Ji Young Chung, Jin Seong Kim, Do Hyun Na
-
Patent number: 11495505Abstract: In one example, a semiconductor device can comprise a substrate, a device stack, first and second internal interconnects, and an encapsulant. The substrate can comprise a first and second substrate sides opposite each other, a substrate outer sidewall between the first substrate side and the second substrate side, and a substrate inner sidewall defining a cavity between the first substrate side and the second substrate side. The device stack can be in the cavity and can comprise a first electronic device, and a second electronic device stacked on the first electronic device. The first internal interconnect can be coupled to the substrate and the device stack. The encapsulant can cover the substrate inner sidewall and the device stack and can fill the cavity. Other examples and related methods are disclosed herein.Type: GrantFiled: September 11, 2020Date of Patent: November 8, 2022Assignee: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Gyu Wan Han, Won Bae Bang, Ju Hyung Lee, Min Hwa Chang, Dong Joo Park, Jin Young Khim, Jae Yun Kim, Se Hwan Hong, Seung Jae Yu, Shaun Bowers, Gi Tae Lim, Byoung Woo Cho, Myung Jea Choi, Seul Bee Lee, Sang Goo Kang, Kyung Rok Park
-
Publication number: 20220352129Abstract: In one example, a semiconductor structure comprises a frontside substrate comprising a conductive structure, a backside substrate comprising a base substrate and a cavity substrate contacting the base substrate, wherein the backside substrate is over a top side of the frontside substrate and has a cavity and an internal interconnect contacting the frontside substrate, and a first electronic component over the top side of the frontside substrate and in the cavity. The first electronic component is coupled with the conductive structure, and an encapsulant is in the cavity and on the top side of the frontside substrate, contacting a lateral side of the first electronic component, a lateral side of the cavity, and a lateral side of the internal interconnect. Other examples and related methods are also disclosed herein.Type: ApplicationFiled: July 14, 2022Publication date: November 3, 2022Applicant: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Gi Tae Lim, Jae Yun Kim, Myung Jae Choi, Min Hwa Chang, Mi Kyoung Choi
-
Patent number: 11482496Abstract: In one example, an electronic device, comprises a first substrate comprising a first conductive structure, a second substrate comprising a second conductive structure, wherein the first substrate is over the second substrate, a first electronic component between the first substrate and the second substrate, a vertical interconnect between the first substrate and the second substrate, wherein the vertical interconnect is coupled with the first conductive structure and the second conductive structure, and an encapsulant between the first substrate and the second substrate and covering the vertical interconnect. A vertical port on the first electronic component is exposed by an aperture of the first substrate. Other examples and related methods are also disclosed herein.Type: GrantFiled: October 16, 2020Date of Patent: October 25, 2022Assignee: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Myung Jea Choi, Gyu Wan Han, Gi Tae Lim, Dong Joo Park, Ji Hun Yi, Jin Young Khim
-
Patent number: 11430723Abstract: A method of manufacturing a semiconductor device having a semiconductor die within an extended substrate and a bottom substrate may include bonding a bottom surface of a semiconductor die to a top surface of a bottom substrate, forming an adhering member to a top surface of the semiconductor die, bonding an extended substrate to the semiconductor die and to the top surface of the bottom substrate utilizing the adhering member and a conductive bump on a bottom surface of the extended substrate and a conductive bump on the bottom substrate. The semiconductor die and the conductive bumps may be encapsulated utilizing a mold member. The conductive bump on the bottom surface of the extended substrate may be electrically connected to a terminal on the top surface of the extended substrate. The adhering member may include a laminate film, a non-conductive film adhesive, or a thermal hardening liquid adhesive.Type: GrantFiled: October 1, 2018Date of Patent: August 30, 2022Assignee: AMKOR TECHNOLOGY SINGAPORE HOLDING PTE. LTD.Inventors: Jae Yun Kim, Gi Tae Lim, Woon Kab Jung, Ju Hoon Yoon, Dong Joo Park, Byong Woo Cho, Gyu Wan Han, Ji Young Chung, Jin Seong Kim, Do Hyun Na
-
Publication number: 20220249493Abstract: A pharmaceutical composition comprising udenafil is disclosed.Type: ApplicationFiled: July 24, 2020Publication date: August 11, 2022Inventors: Sang Wook KIM, Hyun Tae LIM, Young Lae KIM, Jeong Tae KIM
-
Patent number: 11398455Abstract: In one example, a semiconductor device can comprise a substrate, a device stack, first and second internal interconnects, and an encapsulant. The substrate can comprise a first and second substrate sides opposite each other, a substrate outer sidewall between the first substrate side and the second substrate side, and a substrate inner sidewall defining a cavity between the first substrate side and the second substrate side. The device stack can be in the cavity and can comprise a first electronic device, and a second electronic device stacked on the first electronic device. The first internal interconnect can be coupled to the substrate and the device stack. The second internal interconnect can be coupled to the second electronic device and the first electronic device. The encapsulant can cover the substrate inner sidewall and the device stack, and can fill the cavity. Other examples and related methods are disclosed herein.Type: GrantFiled: June 3, 2019Date of Patent: July 26, 2022Assignee: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Gyu Wan Han, Won Bae Bang, Ju Hyung Lee, Min Hwa Chang, Dong Joo Park, Jin Young Khim, Jae Yun Kim, Se Hwan Hong, Seung Jae Yu, Shaun Bowers, Gi Tae Lim, Byoung Woo Cho, Myung Jea Choi, Seul Bee Lee
-
Publication number: 20220226803Abstract: Provided is an SCR catalyst for removing nitrogen oxides (NOx) from exhaust gas, comprising: 0.01-70 wt % of zeolite having an average pore size of 5 ? or more; 25-90 wt % of titanium dioxide (TiO2); and 4-10 wt % of vanadium pentoxide (V2O5). The SCR catalyst according to the present invention exhibits denitrification performance in a low-temperature area that is superior to that of a conventional SCR catalyst, has improved tolerance for a sulfur compound, and also has an excellent regeneration rate.Type: ApplicationFiled: September 28, 2020Publication date: July 21, 2022Inventors: Joon-Woo KIM, Dong-Jun KOH, Young-Chul BYUN, Do-Heui KIM, Jong-Tae LIM, In-Hak SONG, Hwang-Ho LEE, Se-Won JEON
-
Patent number: 11377548Abstract: Semi-conducting two-dimensional (2D) nanoobjects, prepared by self-assembly of conjugated polymers, are promising materials for optoelectronic applications. However, there has been no example of 2D nanosheets with controlled lengths and aspect ratios at the same time via self-assembly. Herein, the inventors successfully prepared uniform semi-conducting 2D sheets using a conjugated poly(cyclopentenylene vinylene) homopolymer and its block copolymer by blending and heating. Using these as 2D seeds, living crystallization-driven self-assembly (CDSA) was achieved by adding the homopolymer as a unimer. Interestingly, unlike typical 2D CDSA examples showing radial growth, this homopolymer assembled only in one direction. Owing to this uniaxial growth, the lengths of the 2D nanosheets could be precisely tuned with narrow dispersity according to the unimer-to-seed ratio. The inventors also studied the growth kinetics of the living 2D CDSA and confirmed first-order kinetics.Type: GrantFiled: April 16, 2021Date of Patent: July 5, 2022Assignee: SNU R&DB FOUNDATIONInventors: Tae-Lim Choi, Sanghee Yang, Sung-Yun Kang
-
Patent number: 11378844Abstract: Provided are a viewer-side polarizing plate for a liquid crystal display device, and a liquid crystal display device comprising the same, the polarizing plate comprising a polarizer and a protective film formed on a light exit surface of the polarizer, wherein the protective film includes a first primer layer, a protective film substrate, a second primer layer, and a coating layer, which are sequentially laminated on the polarizer, a first protective film satisfies a relation of Equation 1, and the protective film substrate has an in-plane phase difference of 500 nm or less at a wavelength of 550 nm in Equation 2.Type: GrantFiled: September 18, 2017Date of Patent: July 5, 2022Assignee: Samsung SDI Co., Ltd.Inventors: Dae Seob Shim, Hyoung Tae Lim, Seong Heun Cho, Se Hyun Park, Bu Keun Oh
-
Patent number: 11355006Abstract: Disclosed is a crosswalk system according to various embodiments comprising an infrastructure including a communication device, a vehicle communicating with the infrastructure, and an indicating device electrically connected to the infrastructure. The infrastructure may detect an external object within a predetermined area through at least one sensor, obtain a location of the vehicle through the communication device, and based on the detected external object and the obtained position of the vehicle, transmit to the indicating device a signal requesting provision of information related to whether it is possible to cross the predetermined area from the external object or the vehicle. Other various embodiment may be implemented.Type: GrantFiled: August 12, 2021Date of Patent: June 7, 2022Assignee: KOREA AUTOMOTIVE TECHNOLOGY INSTITUTEInventors: Hyun Woo Cho, Ho Joon Kang, Tae Lim Kim, Seong-Jin Kwon, Seok-San Shin, Ju Yeon Hwang
-
Publication number: 20220173206Abstract: An electroluminescent display device includes a substrate having an emission area and a transparent portion, the emission area including a sub-pixel, and the transparent portion being adjacent to the sub-pixel; a first electrode in the emission area and over the substrate; a transparent connection pattern in the transparent portion and over the substrate, the transparent connection pattern being spaced apart from the first electrode; a first bank covering an edge of the first electrode and exposing the transparent connection pattern in the transparent portion; and a second bank on the first bank and covering the transparent connection pattern in the transparent portion, wherein the second bank includes a transparent conductive material.Type: ApplicationFiled: November 4, 2021Publication date: June 2, 2022Applicant: LG Display Co., Ltd.Inventors: Hee-Tae LIM, Ji-Ho KANG, Hak-Min LEE, Hyuk-Chan GEE