Patents by Inventor Tae Seung Kim

Tae Seung Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240106415
    Abstract: Provided is a surface acoustic wave filter with improved attenuation characteristics.
    Type: Application
    Filed: September 21, 2023
    Publication date: March 28, 2024
    Inventors: Hyung Gon KIM, Tae Hyeong KWON, Jae Seung CHOI
  • Patent number: 11921456
    Abstract: An example image forming apparatus includes a frame, a first shaft supported by the frame, and a first coupler. The first coupler includes a body coupled to one end of the first shaft and a first protrusion protruding from the body in an axial direction of the first shaft, the first protrusion having a first surface and a second protrusion protruding from the first surface. The second protrusion is to lock with a groove to mount a cartridge on the frame, the first shaft is to provide a rotational force in a first rotational direction to rotate the second protrusion of the first coupler and to insert the second protrusion into the groove to lock with the cartridge, and the first surface of the first protrusion of the first coupler is to contact a second surface to transmit the rotational force to the second coupler in the first rotational direction.
    Type: Grant
    Filed: February 22, 2023
    Date of Patent: March 5, 2024
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Pil-Seung Oh, Taeil Jung, Tae-Hee Kim, Chang-Woo Lee
  • Patent number: 11915911
    Abstract: An apparatus for distributing plasma products includes first and second electrodes that each include planar surfaces. The first electrode forms first apertures from a first planar surface to a second planar surface; the second electrode forms second apertures from the third planar surface to the fourth planar surface. The electrodes couple through one or more adjustable couplers such that the third planar surface is disposed adjacent to the second planar surface with a gap therebetween, the gap having a gap distance. Each of the adjustable couplers has a range of adjustment. The first and second apertures are arranged such that for at least one position within the ranges of adjustment, none of the first apertures aligns with any of the second apertures to form an open straight-line path extending through both the first and second electrodes.
    Type: Grant
    Filed: June 29, 2020
    Date of Patent: February 27, 2024
    Assignee: Applied Materials, Inc.
    Inventors: Tien Fak Tan, Saravjeet Singh, Dmitry Lubomirsky, Tae Wan Kim, Kenneth D. Schatz, Tae Seung Cho, Lok Kee Loh
  • Patent number: 11522043
    Abstract: A method of fabricating an integrated circuit (IC) includes forming a dielectric layer on a substrate having a plurality of the IC. A thin-film resistor (TFR) layer is deposited on the dielectric layer, and an underlayer (UL) including carbon is formed on the TFR layer. A hard mask layer including silicon is formed on the UL. Masked etching of the hard mask layer transfers a pattern of a photoresist layer onto the hard mask layer to form a hard mask layer pattern. Masked etching of the UL transfers the hard mask layer pattern onto the UL to form a UL pattern. Masked etching of the TFR layer transfers the UL pattern onto the TFR layer to form a TFR layer pattern including a matched pair of TFRs. The matched pair of TFRs are generally included in circuitry configured together for implementing at least one function.
    Type: Grant
    Filed: October 30, 2020
    Date of Patent: December 6, 2022
    Assignee: Texas Instruments Incorporated
    Inventors: Scott William Jessen, Tae Seung Kim, Steven Lee Prins, Can Duan, Abbas Ali, Erich Wesley Kinder
  • Publication number: 20210134939
    Abstract: A method of fabricating an integrated circuit (IC) includes forming a dielectric layer on a substrate having a plurality of the IC. A thin-film resistor (TFR) layer is deposited on the dielectric layer, and an underlayer (UL) including carbon is formed on the TFR layer. A hard mask layer including silicon is formed on the UL. Masked etching of the hard mask layer transfers a pattern of a photoresist layer onto the hard mask layer to form a hard mask layer pattern. Masked etching of the UL transfers the hard mask layer pattern onto the UL to form a UL pattern. Masked etching of the TFR layer transfers the UL pattern onto the TFR layer to form a TFR layer pattern including a matched pair of TFRs. The matched pair of TFRs are generally included in circuitry configured together for implementing at least one function.
    Type: Application
    Filed: October 30, 2020
    Publication date: May 6, 2021
    Inventors: Scott William Jessen, Tae Seung Kim, Steven Lee Prins, Can Duan, Abbas Ali, Erich Wesley Kinder
  • Patent number: 10759811
    Abstract: The present invention provides a method for preparing anhydrosugar alcohol, in which the reaction temperature in a vacuum reaction that converts sugar alcohol into anhydrosugar alcohol is controlled to two steps of temperature that is, a first-step low reaction temperature of 100 to 150° C. and a second-step high reaction temperature of 151 to 240° C., so that the selectivity for the intermediate product 1,4-sorbitan can be increased, thereby increasing the yield of anhydrosugar alcohol.
    Type: Grant
    Filed: August 25, 2016
    Date of Patent: September 1, 2020
    Assignee: SK Innovation Co., Ltd.
    Inventors: In Hyoup Song, Tae Seung Kim, Sung Real Son, Yoon Jae Yim, Suk Joon Hong
  • Patent number: 9926331
    Abstract: The present invention relates to a method for producing anhydrosugar alcohol using an organic additive having one hydroxyl group. The present invention makes it possible to prevent oligomers and polymers from being produced by polymerization of isosorbide during dehydration of sorbitol molecules, and thus solves problems, including a reduction in fluidity in a dehydration reactor, interference with the flow of fluids in the reactor and pipelines, and interference with stirrer operation, which occur due to the oligomers and polymers.
    Type: Grant
    Filed: January 13, 2017
    Date of Patent: March 27, 2018
    Assignee: SK Innovation Co., Ltd.
    Inventors: Sung Real Son, Sang Hye Shin, In Hyoup Song, Suk Joon Hong, Tae Seung Kim, Yoon Jae Yim
  • Publication number: 20170204115
    Abstract: The present invention relates to a method for producing anhydrosugar alcohol using an organic additive having one hydroxyl group. The present invention makes it possible to prevent oligomers and polymers from being produced by polymerization of isosorbide during dehydration of sorbitol molecules, and thus solves problems, including a reduction in fluidity in a dehydration reactor, interference with the flow of fluids in the reactor and pipelines, and interference with stirrer operation, which occur due to the oligomers and polymers.
    Type: Application
    Filed: January 13, 2017
    Publication date: July 20, 2017
    Inventors: Sung Real Son, Sang Hye Shin, In Hyoup Song, Suk Joon Hong, Tae Seung Kim, Yoon Jae Yim
  • Publication number: 20170057974
    Abstract: The present invention provides a method for preparing anhydrosugar alcohol, in which the reaction temperature in a vacuum reaction that converts sugar alcohol into anhydrosugar alcohol is controlled to two steps of temperature that is, a first-step low reaction temperature of 100 to 150° C. and a second-step high reaction temperature of 151 to 240° C., so that the selectivity for the intermediate product 1,4-sorbitan can be increased, thereby increasing the yield of anhydrosugar alcohol.
    Type: Application
    Filed: August 25, 2016
    Publication date: March 2, 2017
    Inventors: In Hyoup Song, Tae Seung Kim, Sung Real Son, Yoon Jae Yim, Suk Joon Hong
  • Patent number: 9490162
    Abstract: An integrated circuit may include dual damascene interconnects formed using a via-first dual damascene process or a trench-first dual damascene process. The via-first process may be a partial-via-first process or a full-via-first process. A trench mask for a wide interconnect line which is at least twice as wide as a dual damascene via in the wide interconnect line may have a dielectric slot adjacent to the dual damascene via. The dual damascene via is laterally separated from the dielectric slot by no more than half a width of the dual damascene via.
    Type: Grant
    Filed: June 16, 2015
    Date of Patent: November 8, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Tae Seung Kim
  • Publication number: 20150287631
    Abstract: An integrated circuit may include dual damascene interconnects formed using a via-first dual damascene process or a trench-first dual damascene process. The via-first process may be a partial-via-first process or a full-via-first process. A trench mask for a wide interconnect line which is at least twice as wide as a dual damascene via in the wide interconnect line may have a dielectric slot adjacent to the dual damascene via. The dual damascene via is laterally separated from the dielectric slot by no more than half a width of the dual damascene via.
    Type: Application
    Filed: June 16, 2015
    Publication date: October 8, 2015
    Inventor: Tae Seung KIM
  • Patent number: 9087824
    Abstract: An integrated circuit may include dual damascene interconnects formed using a via-first dual damascene process or a trench-first dual damascene process. The via-first process may be a partial-via-first process or a full-via-first process. A trench mask for a wide interconnect line which is at least twice as wide as a dual damascene via in the wide interconnect line may have a dielectric slot adjacent to the dual damascene via. The dual damascene via is laterally separated from the dielectric slot by no more than half a width of the dual damascene via.
    Type: Grant
    Filed: September 30, 2014
    Date of Patent: July 21, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Tae Seung Kim
  • Publication number: 20150170998
    Abstract: An integrated circuit may include dual damascene interconnects formed using a via-first dual damascene process or a trench-first dual damascene process. The via-first process may be a partial-via-first process or a full-via-first process. A trench mask for a wide interconnect line which is at least twice as wide as a dual damascene via in the wide interconnect line may have a dielectric slot adjacent to the dual damascene via. The dual damascene via is laterally separated from the dielectric slot by no more than half a width of the dual damascene via.
    Type: Application
    Filed: September 30, 2014
    Publication date: June 18, 2015
    Inventor: Tae Seung KIM
  • Patent number: 8974858
    Abstract: An apparatus for depositing an organic material and a depositing method thereof, wherein a deposition process is performed with respect to a second substrate while transfer and alignment processes are performed with respect to a first substrate in a chamber, so that loss of an organic material wasted in the transfer and alignment processes can be reduced, thereby maximizing material efficiency and minimizing a processing tack time. The apparatus includes a chamber having an interior divided into a first substrate deposition area and a second substrate deposition area, an organic material deposition source transferred to within ones of the first and second substrate deposition areas to spray particles of an organic material onto respective ones of first and second substrates and a first transferring unit to rotate the organic material deposition source in a first direction from one of the first and second substrate deposition areas to an other of the first and second substrate deposition areas.
    Type: Grant
    Filed: July 17, 2013
    Date of Patent: March 10, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Jae-Wan Park, You-Min Cha, Won-Seok Cho, Jae-Mork Park, Jae-Hong Ahn, Min-Jeong Hwang, Tae-Wook Kim, Jong-Woo Lee, Tae-Seung Kim
  • Patent number: 8968477
    Abstract: A deposition mask for manufacturing an organic light emitting display (OLED) using the same are provided. The deposition mask is intended for preventing an organic film from being damaged due to touching of a blocked-off portion of the mask to an emission layer (EML), or chemical transition from being generated at the organic film. For that purpose, the deposition mask stuck to a substrate of the OLED to deposit an organic EML includes an opening and an indentation. The opening is opened so as to deposit the organic EML. The indentation is indented a predetermined depth from a plane facing the substrate.
    Type: Grant
    Filed: October 7, 2009
    Date of Patent: March 3, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Chang-Ho Kang, Tae-Seung Kim, Jae-Min Hong
  • Publication number: 20130309403
    Abstract: An apparatus for depositing an organic material and a depositing method thereof, wherein a deposition process is performed with respect to a second substrate while transfer and alignment processes are performed with respect to a first substrate in a chamber, so that loss of an organic material wasted in the transfer and alignment processes can be reduced, thereby maximizing material efficiency and minimizing a processing tack time. The apparatus includes a chamber having an interior divided into a first substrate deposition area and a second substrate deposition area, an organic material deposition source transferred to within ones of the first and second substrate deposition areas to spray particles of an organic material onto respective ones of first and second substrates and a first transferring unit to rotate the organic material deposition source in a first direction from one of the first and second substrate deposition areas to an other of the first and second substrate deposition areas.
    Type: Application
    Filed: July 17, 2013
    Publication date: November 21, 2013
    Inventors: Jae-Wan PARK, You-Min CHA, Won-Seok CHO, Jae-Mork PARK, Jae-Hong AHN, Min-Jeong HWANG, Tae-Wook KIM, Jong-Woo LEE, Tae-Seung KIM
  • Patent number: 8557046
    Abstract: A deposition source capable of uniformly producing a deposition film. The deposition source includes a furnace, a first heating unit surrounding the furnace to heat the furnace and a second heating unit spaced-apart from the first heating unit by an interval and surrounding the furnace to heat the furnace, wherein the second heating unit comprises a plurality of separate sub-heating units that surround the furnace.
    Type: Grant
    Filed: April 29, 2010
    Date of Patent: October 15, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Jong-Woo Lee, Tae-Seung Kim, Chang-Soon Ji, Won-Seok Cho, Hey-Yeon Shim, Yong-Hun Jo, Sang-Jin Han
  • Patent number: 8512503
    Abstract: A sealing device including a mask for partially irradiating light and a method of manufacturing a display device using the sealing device is disclosed. The sealing device used to bond first and second substrates by interposing a sealing material at edges of the first and second substrates and by irradiating light to the sealing material comprises: a mask disposed on one side of the stage, in which a transmission portion is formed in correspondence to the formation position of the sealing member so that light can be irradiated to the sealing material; and an optical head irradiating the light to the sealing material through the transmission portion of the mask. A pattern for regulating the amount of the light irradiated to the sealing material is formed in the transmission portion of the mask.
    Type: Grant
    Filed: February 11, 2013
    Date of Patent: August 20, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Jong-woo Lee, Tae-seung Kim, Joon-young Park, Won-kyu Kwak
  • Patent number: 8482422
    Abstract: A thin film deposition apparatus to remove static electricity generated between a substrate and a mask, and a method of manufacturing an organic light-emitting display device using the thin film deposition apparatus.
    Type: Grant
    Filed: April 2, 2012
    Date of Patent: July 9, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Chang-Soon Ji, Tae-Seung Kim, Jong-Woo Lee, Chengguo An
  • Patent number: 8371353
    Abstract: A sealing device including a mask for partially irradiating light and a method of manufacturing a display device using the sealing device is disclosed. The sealing device used to bond first and second substrates by interposing a sealing material at edges of the first and second substrates and by irradiating light to the sealing material comprises: a mask disposed on one side of the stage, in which a transmission portion is formed in correspondence to the formation position of the sealing member so that light can be irradiated to the sealing material; and an optical head irradiating the light to the sealing material through the transmission portion of the mask. A pattern for regulating the amount of the light irradiated to the sealing material is formed in the transmission portion of the mask.
    Type: Grant
    Filed: March 16, 2007
    Date of Patent: February 12, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Jong-woo Lee, Tae-seung Kim, Joon-young Park, Won-kyu Kwak