Patents by Inventor Tae-Hong Min
Tae-Hong Min has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20240057251Abstract: A printed circuit board includes a first insulating layer, a first pattern buried in a surface of the first insulating layer, the first pattern having a surface exposed from the surface of the first insulating layer, and a metal post disposed on the exposed surface of the first pattern. The metal post includes a first metal layer and a second metal layer. The first metal layer and the second metal layer include different metals.Type: ApplicationFiled: February 24, 2023Publication date: February 15, 2024Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Tae Hong Min, Eun Su Kwon
-
Patent number: 11894346Abstract: A semiconductor package includes a package substrate, a plurality of semiconductor devices stacked on the package substrate, a plurality of underfill fillets disposed between the plurality of semiconductor devices and between the package substrate and the plurality of semiconductor devices, and a molding resin at least partially surrounding the plurality of semiconductor devices and the plurality of underfill fillets. The plurality of underfill fillets include a plurality of protrusions that protrude from spaces between each of the plurality of semiconductor devices or between the package substrate and each of the plurality of semiconductor devices. At least two neighboring underfill fillet protrusions of the plurality of protrusions form one continuous structure without an interface therebetween.Type: GrantFiled: March 10, 2023Date of Patent: February 6, 2024Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Ji-Hwan Hwang, Sang-Sick Park, Tae-Hong Min, Geol Nam
-
Publication number: 20240032208Abstract: A printed circuit board includes a first build-up insulating layer; an interconnect structure buried in an upper side of the first build-up insulating layer and including one or more insulating layers, one or more wiring layers, and one or more via layers; an adhesive disposed between an upper surface of the first build-up insulating layer and an upper surface of the interconnect structure, and having an upper surface exposed from the upper surface of the first build-up insulating layer; and a metal bump including a via portion penetrating the adhesive and a protrusion protruding to the upper surface of the adhesive.Type: ApplicationFiled: March 1, 2023Publication date: January 25, 2024Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Tae Hong MIN, Eun Su KWON
-
Patent number: 11864307Abstract: A printed circuit board includes a first substrate portion including a plurality of first insulating layers, a plurality of first wiring layers respectively disposed on the plurality of first insulating layers, and a plurality of first adhesive layers respectively disposed between the plurality of first insulating layers to respectively cover the plurality of first wiring layers; and a second substrate portion disposed on the first substrate portion, and including a plurality of second insulating layers, a plurality of second wiring layers respectively disposed on the plurality of second insulating layers, and a plurality of second adhesive layers respectively disposed between the plurality of second insulating layers to respectively cover the plurality of second wiring layers.Type: GrantFiled: December 17, 2020Date of Patent: January 2, 2024Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Dae Jung Byun, Jung Soo Kim, Sang Hyun Sim, Chang Min Ha, Tae Hong Min, Jin Won Lee
-
Publication number: 20230420285Abstract: A substrate processing apparatus includes: a stage including a first region and a second region surrounding the first region, the stage configured to receive a substrate; and a plurality of pins in or on the stage and configured to adsorb the substrate with negative pressure. The plurality of pins include a plurality of first pins in the first region and are configured to be elevated at the same time, and a plurality of second pins in the second region and are configured to be elevated at the same time. In operation, the first pins are elevated and adsorb the substrate first, and then, the second pins are elevated and adsorb the substrate.Type: ApplicationFiled: May 10, 2023Publication date: December 28, 2023Inventors: Hyung Jun Choi, Tae Hong Min
-
Patent number: 11769622Abstract: Disclosed is an inductor device and method of manufacturing the same. The inductor device includes an insulating layer, a coil pattern formed on two opposing surfaces of the insulating layer, a first insulating film and a second insulating film formed with different insulating materials on the coil pattern, and a magnetic member formed to enclose the insulating layer, the coil pattern and the first and the second insulating films. By forming thin dual insulating films having a high adhesive strength and breaking strength on an inductor coil, it is possible to improve Ls characteristics of the inductor device and increase the inductance.Type: GrantFiled: December 27, 2018Date of Patent: September 26, 2023Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: In-Seok Kim, Yong-Jin Park, Young-Gwan Ko, Youn-Soo Seo, Myung-Sam Kang, Tae-Hong Min
-
Patent number: 11737211Abstract: A connection structure embedded substrate includes: a printed circuit board including a plurality of first insulating layers and a plurality of first wiring layers, respectively disposed on or between the plurality of first insulating layers; and a connection structure disposed in the printed circuit board and including a plurality of internal insulating layers and a plurality of internal wiring layers, respectively disposed on or between the plurality of internal insulating layers. Among the plurality of internal wiring layers, an internal wiring layer disposed in one surface of the connection structure is in contact with one surface of a first insulating layer, among the plurality of first insulating layers.Type: GrantFiled: July 9, 2021Date of Patent: August 22, 2023Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Tae Hong Min, Ho Hyung Ham, Yong Soon Jang, Ki Suk Kim, Hyung Ki Lee, Chi Won Hwang
-
Publication number: 20230262891Abstract: A connection structure embedded substrate includes: a printed circuit board including a plurality of first insulating layers and a plurality of first wiring layers, respectively disposed on or between the plurality of first insulating layers; and a connection structure disposed in the printed circuit board and including a plurality of internal insulating layers and a plurality of internal wiring layers, respectively disposed on or between the plurality of internal insulating layers. Among the plurality of internal wiring layers, an internal wiring layer disposed in one surface of the connection structure is in contact with one surface of a first insulating layer, among the plurality of first insulating layers.Type: ApplicationFiled: April 25, 2023Publication date: August 17, 2023Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Tae Hong Min, Ho Hyung Ham, Yong Soon Jang, Ki Suk Kim, Hyung Ki Lee, Chi Won Hwang
-
Publication number: 20230207533Abstract: A semiconductor package includes a package substrate, a plurality of semiconductor devices stacked on the package substrate, a plurality of underfill fillets disposed between the plurality of semiconductor devices and between the package substrate and the plurality of semiconductor devices, and a molding resin at least partially surrounding the plurality of semiconductor devices and the plurality of underfill fillets. The plurality of underfill fillets include a plurality of protrusions that protrude from spaces between each of the plurality of semiconductor devices or between the package substrate and each of the plurality of semiconductor devices. At least two neighboring underfill fillet protrusions of the plurality of protrusions form one continuous structure without an interface therebetween.Type: ApplicationFiled: March 10, 2023Publication date: June 29, 2023Inventors: JI-HWAN HWANG, SANG-SICK PARK, TAE-HONG MIN, GEOL NAM
-
Publication number: 20230187360Abstract: A substrate includes: a first printed circuit board layer including a first insulating layer and a first wiring layer, disposed on a lower surface of the first insulating layer; a second wiring layer, disposed on an upper surface of the first insulating layer; a bridge disposed above the first printed circuit board layer and including circuit wirings; a first bridge insulating layer and a second bridge insulating layer, disposed in the bridge and on which the circuit wirings are disposed, respectively; and a second printed circuit board layer including a second insulating layer surrounding side surfaces of the bridge and covering the first insulating layer and the second wiring layer. A first stacking direction in which the first insulating layer and the second insulating layer are stacked and a second stacking direction in which the first bridge insulating layer and the second bridge insulating layer are stacked are different.Type: ApplicationFiled: May 20, 2022Publication date: June 15, 2023Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventor: Tae Hong Min
-
Patent number: 11664352Abstract: A semiconductor package includes a package substrate, a plurality of semiconductor devices stacked on the package substrate, a plurality of underfill fillets disposed between the plurality of semiconductor devices and between the package substrate and the plurality of semiconductor devices, and a molding resin at least partially surrounding the plurality of semiconductor devices and the plurality of underfill fillets. The plurality of underfill fillets include a plurality of protrusions that protrude from spaces between each of the plurality of semiconductor devices or between the package substrate and each of the plurality of semiconductor devices. At least two neighboring underfill fillet protrusions of the plurality of protrusions form one continuous structure without an interface therebetween.Type: GrantFiled: May 24, 2021Date of Patent: May 30, 2023Assignee: Samsung Electronics Co., Ltd.Inventors: Ji-Hwan Hwang, Sang-Sick Park, Tae-Hong Min, Geol Nam
-
Patent number: 11558961Abstract: A printed circuit board includes a first insulating layer having a through hole, and a via disposed to fill the through hole and to be extended to at least one surface of the first insulating layer, wherein the via includes a plating layer having an inner wall part disposed on an inner wall of the through hole and a land part extended from the inner wall part and disposed on the at least one surface of the first insulating layer, and a metal paste layer including metal particles, and filled in the rest of the through hole and disposed on the plating layer.Type: GrantFiled: October 24, 2019Date of Patent: January 17, 2023Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Jungwoo Choi, Tae-hong Min
-
Patent number: 11490512Abstract: A printed circuit board and an antenna module including the same are provided. The printed circuit board includes a core layer; a first build-up structure disposed on an upper side of the core layer, including first insulating layers and first bonding layers, alternately stacked, and further including first wiring layers disposed on upper surfaces of the first insulating layers, respectively, and embedded in the first bonding layers, respectively; and a second build-up structure disposed on a lower side of the core layer, including second insulating layers and second bonding layers, alternately stacked, and further including second wiring layers disposed on lower surfaces of the second insulating layers, respectively, and embedded in the second bonding layers, respectively. The printed circuit board has a through-portion penetrating through the core layer and the second build-up structure, and has a region in which the through-portion is disposed as a flexible region.Type: GrantFiled: February 19, 2020Date of Patent: November 1, 2022Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Tae Hong Min, Ju Ho Kim
-
Publication number: 20220322527Abstract: A connection structure embedded substrate includes: a printed circuit board including a plurality of first insulating layers and a plurality of first wiring layers, respectively disposed on or between the plurality of first insulating layers; and a connection structure disposed in the printed circuit board and including a plurality of internal insulating layers and a plurality of internal wiring layers, respectively disposed on or between the plurality of internal insulating layers. Among the plurality of internal wiring layers, an internal wiring layer disposed in one surface of the connection structure is in contact with one surface of a first insulating layer, among the plurality of first insulating layers.Type: ApplicationFiled: July 9, 2021Publication date: October 6, 2022Inventors: Tae Hong Min, Ho Hyung Ham, Yong Soon Jang, Ki Suk Kim, Hyung Ki Lee, Chi Won Hwang
-
Publication number: 20220301975Abstract: An electronic component-embedded substrate includes a core layer, a first cavity formed in the core layer, a heat dissipating member disposed in the first cavity and having a second cavity, and an electronic component disposed in the second cavity. The heat dissipating member includes a carbon fiber reinforced polymer (CFRP).Type: ApplicationFiled: June 4, 2021Publication date: September 22, 2022Inventors: Ho Hyung HAM, Gun Hwi HYUNG, Jun Hyeong JANG, Tae Hong MIN
-
Patent number: 11445598Abstract: A printed circuit board has a first stacked body having a flexible region and a rigid region, and a second stacked body disposed on the rigid region of the first stacked body. The first stacked body includes a plurality of first insulating layers, a plurality of first bonding layers, and a plurality of first wiring layers. The second stacked body includes a plurality of second insulating layers and a plurality of second wiring layers, and each of the plurality of first bonding layers integrally covers at least a portion of upper and side surfaces of a respective first wiring layer of the plurality of first wiring layers.Type: GrantFiled: October 12, 2020Date of Patent: September 13, 2022Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Tae Hong Min, Ju Ho Kim
-
Patent number: 11437724Abstract: An antenna module includes: a wiring structure including a plurality of insulating layers and a plurality of wiring layers; a metal structure disposed on one surface of the wiring structure, and having a through-portion; and an antenna disposed on the one surface of the wiring structure. At least a portion of the antenna is disposed in the through-portion.Type: GrantFiled: July 10, 2020Date of Patent: September 6, 2022Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventor: Tae Hong Min
-
Patent number: 11394104Abstract: The present disclosure relates to a printed circuit board. The printed circuit board includes: a first substrate portion having a rigid region and a flexible region; and a second substrate portion disposed on the first substrate portion. The first substrate portion and the second substrate portion are disposed to be shifted such that portions of each of the first substrate portion and the second substrate portion overlap each other.Type: GrantFiled: October 12, 2020Date of Patent: July 19, 2022Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventor: Tae Hong Min
-
Publication number: 20220095449Abstract: A printed circuit board includes a first substrate portion including a plurality of first insulating layers, a plurality of first wiring layers respectively disposed on the plurality of first insulating layers, and a plurality of first adhesive layers respectively disposed between the plurality of first insulating layers to respectively cover the plurality of first wiring layers; and a second substrate portion disposed on the first substrate portion, and including a plurality of second insulating layers, a plurality of second wiring layers respectively disposed on the plurality of second insulating layers, and a plurality of second adhesive layers respectively disposed between the plurality of second insulating layers to respectively cover the plurality of second wiring layers.Type: ApplicationFiled: December 17, 2020Publication date: March 24, 2022Inventors: Dae Jung BYUN, Jung Soo KIM, Sang Hyun SIM, Chang Min HA, Tae Hong MIN, Jin Won LEE
-
Patent number: 11272613Abstract: A printed circuit board includes: a laminate including a core layer and insulating layers stacked on first and second sides of the core layer; and a first antenna formed on a surface of the laminate. A thickness of the core layer is greater than a thickness of one of the insulating layers. A dielectric constant of the core layer is higher than a dielectric constant of the one of the insulating layers.Type: GrantFiled: November 5, 2019Date of Patent: March 8, 2022Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Tae-Hong Min, Ju-Ho Kim