Abstract: Disclosed is a circuit board that includes a core portion having a first via disposed therein in the general shape of an hourglass. The circuit board implements a finer via that penetrates a core and improves heat dissipation performance. The circuit board includes a core portion including a first core and a second core made of a metallic material, the first core and the second core being disposed adjacent to each other, and a first via penetrating the core portion.

Abstract: An apparatus for measuring impedance for fuel cell diagnosis may include: a current measurement unit configured to measure a current flowing to a load from a fuel cell stack; a voltage measurement unit configured to measure a voltage of the fuel cell stack; and a calculation unit configured to monitor a variation of the current measured through the current measurement unit, perform a frequency analysis operation at each sampling while sampling the current and voltage of the fuel cell stack, and calculate impedance based on the analyzed voltage and current of the fuel cell stack.

Abstract: A circuit board includes: a core portion comprising a fluid path, the fluid path being open toward an outside of the circuit board to allow a fluid outside the circuit board to pass through the fluid path; and insulation layers disposed above and below the core portion.

Abstract: A circuit board includes a first thermally conductive structure comprising a cavity or a recess portion. At least a portion of the first thermally conductive structure is inserted into an insulating part. An electronic device comprising a portion thereof inserted in the cavity or the recess portion.

Abstract: In one embodiment, a semiconductor package includes a circuit substrate, a plurality of semiconductor chips stacked on the circuit substrate, insulating adhesive patterns interposed between the semiconductor chips, a heat slug provided on an uppermost semiconductor chip and adhered to the uppermost semiconductor chip by a heat dissipative adhesive pattern, and a mold structure provided on the circuit substrate to cover sidewalls of the semiconductor chips, the insulating adhesive patterns, the heat dissipative adhesive pattern and the heat slug. A failure of the semiconductor package during a manufacturing process of the mold structure may be reduced. The semiconductor package may therefore have good operating characteristics and reliability.

Abstract: Disclosed herein is a circuit board. According to an exemplary embodiment of the present disclosure, a circuit board has a structure in which at least a portion of a first heat transfer structure in which a metal layer and an insulating layer are alternately stacked is inserted into an insulating part.

Abstract: A circuit board includes a first metal layer having a first via hole penetrating through an upper surface of the first metal layer and a lower surface thereof; a plated part provided to a surface of the first via hole; an insulating film provided to a surface of the plated part; and a first via formed by providing a conductive material to at least a portion of a region surrounded by an outer surface of the insulating film. Since the circuit board may implement fineness of the first via while forming the first metal layer to be thicker than the related art, warpage may be decreased and heat dissipation performance may be improved.

Abstract: A circuit board comprises a first heat transfer structure including graphite or graphene, wherein at least a portion of the first heat transfer structure is disposed inside an insulating member and a primer layer is disposed on a surface of the first heat transfer structure. The first heat transfer structure may comprise a plurality of monomers, the monomers including a primer layer disposed on at least one surface of at least one layer of graphite or graphene.

Abstract: Disclosed herein is a circuit board including a heat transfer structure formed of a highly thermal conductive material, wherein a part of the heat transfer structure excluding an air cooling unit exposed to outside of an insulation unit is inserted into an insulation unit, and the air cooling unit has a shape having a high non-surface area such as a wrinkled or uneven shape.

Abstract: A semiconductor device includes at least first and second semiconductor chips stacked on each other along a first direction, at least one silicon-through-via (TSV) through at least the first semiconductor chip of the first and second semiconductor chips, a contact pad on the at least one TSV of the first semiconductor chip, the contact pad electrically connecting the TSV of the first semiconductor chip to the second semiconductor chip, and a plurality of dummy pads on the first semiconductor chip, the plurality of dummy pads being spaced apart from each other and from the contact pad along a second direction, and the dummy pads having same heights as the contact pads as measured between respective top and bottom surfaces along the first direction.

Abstract: A chip-stacked semiconductor package including a first chip having a plurality of first real bump pads and a plurality of first dummy bump pads, a second chip on the first chip, the second chip including a plurality of real bumps and a plurality of bridge dummy bumps, the plurality of real bumps electrically connected to the plurality of first real bump pads, the plurality of bridge dummy bumps connected to the plurality of first dummy bump pads, and a sealing member sealing the first chip and the second chip may be provided.

Abstract: There is provided a printed circuit board including: a core layer having a cavity formed therein; a heat radiation body included in the cavity; an insulating layer provided on an upper surface and a lower surface of the core layer; and a heat dissipating via penetrating through the insulating layer to be in contact with the heat radiation body and dissipating heat externally, wherein the heat radiation body includes an insulating plate, a first metal block formed on an upper surface of the insulating plate, and a second metal block formed on a lower surface of the insulating plate.

Abstract: The present invention relates to a chip embedded substrate, which includes a substrate formed by alternately stacking an insulation layer and a circuit layer and an embedded chip equipped with a connection terminal and mounted inside the substrate, wherein the connection terminal is protruded from the insulation layer placed on the outermost layer of the substrate, and a connection surface to be connected to an electronic component is exposed to the outside.

Abstract: A printed circuit board, according to one embodiment, includes: a core having a slope pattern formed on a side surface thereof; a first insulating layer laminated on the core; a second insulating layer laminated on the first insulating layer to cover the side surface of the core; an inner circuit layer and an outer circuit layer respectively formed on the first insulating layer and the second insulating layer; and a solder resist layer laminated on the second insulating layer.

Abstract: There are provided a substrate strip, a substrate panel, and a manufacturing method of a substrate strip. The substrate strip includes: a plurality of unit substrates including a glass core; and a glass core cover part disclosed on a side surface of the substrate strip on which the glass core is exposed.

Abstract: Provided are a semiconductor device including a through via plug and a method of manufacturing the same. In the semiconductor device, since a redistributed interconnection pattern is disposed on a protection film of a convex-concave structure having a protrusion and a recessed portion, the semiconductor device may have improved reliability while preventing a leakage current. In the method of manufacturing the semiconductor device, since an end surface of through via structure is exposed by removing a protection film and an insulating film liner using a selective etching process, damage to the through via structure is minimized, thereby preventing copper contamination in a substrate.

Abstract: In a semiconductor device, an organic insulation pattern is disposed between first and second rerouting patterns. The organic insulation pattern may absorb the physical stress that occurs when the first and second rerouting patterns expand under heat. Since the organic insulation pattern is disposed between the first and second rerouting patterns, insulating properties can be increased relative to a semiconductor device in which a semiconductor pattern is disposed between rerouting patterns. Also, since a seed layer pattern is disposed between the first and second rerouting patterns and the organic insulation pattern and between the substrate and the organic insulation pattern, the adhesive strength of the first and second rerouting patterns is enhanced. This also reduces any issues with delamination. Also, the seed layer pattern prevents the metal that forms the rerouting pattern from being diffused to the organic insulation pattern.

Abstract: A printed circuit board and a manufacturing method thereof. According to one embodiment, a printed circuit board may include a core part; and a conductor pattern disposed on at least one surface of the core part, the core part includes a glass core having a side portion that is polished or thinner than a central portion of the core. According to another embodiment, a method of manufacturing the printed circuit board may include cutting a glass plate to form a glass core; and removing cracks from at least one side surface of the cut glass core.

Abstract: An embedded board, a printed circuit board, and a method of manufacturing the same. According to one embodiment of the present invention, an embedded board includes: a core insulating layer formed with a first cavity; a first circuit layer formed on one surface of the core insulating layer; a build-up insulating layer formed on one surface of the core insulating layer and formed with a second cavity extending from the first cavity; devices disposed in the first cavity and the second cavity and formed to protrude from one surface of the core insulating layer; a first insulating layer formed on the other surface of the core insulating layer and filling the first cavity and the second cavity; and a build-up circuit layer and a via formed in the build-up insulating layer.

Abstract: A semiconductor device includes a substrate having a first side and a second side such that the first and second sides face each other, a through via plug penetrating the substrate, an insulating film liner, and an antipollution film. The insulating film liner is between the through via plug and the substrate and the insulating film liner has a recessed surface with respect to the second side. The antipollution film covers the second side and the antipollution film is on the recessed surface and between the through via plug and the substrate.