Abstract: A display device includes a substrate including a display area and a driving circuit area, a first insulating layer, a second insulating layer on the first insulating layer, a first transistor in the display area, and including a first semiconductor pattern layer formed as a semiconductor layer on the second insulating layer, a first gate electrode on the first semiconductor pattern layer, and a first lower electrode overlapping the first semiconductor pattern layer, and a second transistor in the driving circuit area, and including a second semiconductor pattern layer formed as the semiconductor layer, a second gate electrode on the second semiconductor pattern layer, and a second lower electrode overlapping the second semiconductor pattern layer, wherein the first lower electrode is between the substrate and the first insulating layer, and the second lower electrode is between the first insulating layer and the second insulating layer.

Abstract: An embodiment of the present specification discloses a display device including a display panel including a display area and a non-display area adjacent to the display area and a metal dam disposed in the non-display area to surround at least three surfaces of the display panel. The display panel includes a substrate, a pixel driving circuit disposed on the substrate, and a light emitting element driven by the pixel driving circuit, the metal dam may be spaced a selected distance from an edge of the display panel, the metal dam may be formed of a plurality of metal layers connected through at least one hole, and the metal dam may include a first metal dam, a second metal dam, and a third metal dam that are disposed in the non-display area while surrounding at least three surfaces of the display area.

Abstract: The present invention relates to a novel benzopyran derivative useful for preparing a drug for treating cancer, and more specifically, to a novel benzopyran derivative which is a micromolecule having a macrophage inhibitory effect and is useful for preparing a drug for cancer treatment. The drug particularly inhibits the differentiation of immune macrophages to stimulate the immune system, and thus is useful for treating immune-related cancers.

Abstract: A display apparatus according to an exemplary embodiment is disclosed. A display apparatus according to an exemplary embodiment includes a substrate having a bending region between an active area and a pad area. The display apparatus includes a planarization film on the active area and the pad area in the substrate. The display apparatus includes a first organic film coated on the planarization film, a second organic film coated on the first organic film, and a third organic film coated on the second organic film. The third organic film is formed such that an upper surface thereof is flattened in the active region. The display apparatus includes a plurality of light-emitting elements disposed on the third organic film.

Abstract: A mother substrate for a display panel and a display panel using the same are disclosed. A mother substrate for a display panel includes a conductive ring disposed in a non-display area outside the display area and surrounding each of the display areas, and one or more dummy pixel driving circuits disposed in a non-display area outside the display area. An electrostatic discharge (ESD) prevention structure inside the dummy pixel driving circuit can prevent defects of display panels due to ESD occurring in the manufacturing process of the display panel.

Abstract: The present disclosure relates to an isolated anti-FcRN antibody, which is an antibody binding to FcRN (stands for neonatal Fc receptor, also called FcRP, FcRB or Brambell receptor) that is a receptor with a high affinity for IgG or a fragment thereof, a method of preparing thereof, a composition for treating autoimmune disease, which comprises the antibody, and a method of treating and diagnosing autoimmunre diseases using the antibody. The FcRn-specific antibody according to the present disclosure binds to FcRn non-competitively with IgG to reduce serum pathogenic auto-antibody levels, and thus can be used for the treatment of autoimmune diseases.

Abstract: An embodiment discloses a display apparatus. The display apparatus includes a plurality of first electrodes and a contact electrode disposed on a substrate. The display apparatus includes a plurality of light-emitting elements disposed on the plurality of first electrodes. The display apparatus includes a first optical layer disposed between the plurality of light-emitting elements. The display apparatus includes a second electrode disposed on the plurality of light-emitting elements. The second electrode includes a first area disposed on the plurality of light-emitting elements and a second area extending outward from the first optical layer and electrically connected to the contact electrode. A plurality of signal wires connected to the plurality of first electrodes are provided, the second area of the second electrode comprises protruding portions extending to at least one of areas between the plurality of signal wires, and one of the protruding portions is connected to the contact electrode.

Abstract: An object of the present invention is to provide a material for organic EL elements, the material being excellent in hole injecting/transporting performance, electron-blocking capability, stability in the form of a thin film, and durability. Another object of the present invention is to provide an organic EL element having high efficiency, a low driving voltage, and a long lifespan, by combining the aforementioned material with various materials for organic EL elements, the materials being excellent in hole/electron injecting/transporting performance, electron-blocking capability, stability in the form of a thin film, and durability, such that the properties of the individual materials can be effectively exhibited.

Abstract: A mother substrate for a display panel and a display panel using the same are disclosed. The mother substrate comprises a plurality of display area including a plurality of light-emitting areas configured to receive light-emitting elements, a plurality of wirings, and a plurality of pads connected to the plurality of wirings; a conductive ring in a non-display area that surrounds the display area such that each of the display areas is surrounded by the conductive ring and electrically connected to the pads; a photoresist pattern covering the plurality of display areas and the non-display area; and a first metal layer covering the photoresist pattern. The conductive ring includes an electrostatic blocking area.

Abstract: A display device includes a plurality of first electrodes and a contact electrode on a substrate; a plurality of light-emitting elements on the plurality of first electrodes; a first optical layer between the plurality of light-emitting elements; and a second electrode on the plurality of light-emitting elements, the second electrode including a first region that is on the plurality of light-emitting elements and a second region that extends past an end the first optical layer and is in contact with the contact electrode.

Abstract: Provided is a semiconductor device and a method of manufacturing the semiconductor device. The semiconductor device includes: a 1st source/drain region; a 2nd source/drain region; a channel structure connecting the 1st source/drain region to the 2nd source/drain region; a gate structure surrounding the channel structure; a backside contact structure, below the 1st source/drain region, connected to the 1st source/drain region; and a 1st backside spacer at a lateral side of the backside contact structure.

Abstract: Integrated circuit devices and methods of forming the same are provided. The integrated circuit devices may include a transistor including first and second source/drain regions spaced apart from each other in a horizontal direction, a backside power distribution network structure (BSPDNS), a substrate between the first and second source/drain regions and the BSPDNS, a backside contact that is in the substrate and is overlapped by the first source/drain region, a placeholder that is in the substrate and is overlapped by the second source/drain region, and a cavity in the substrate between the backside contact and the placeholder.

Abstract: Integrated circuit devices and methods of forming the same are provided. The integrated circuit devices may include a backside power distribution network structure (BSPDNS), a logic device region and a passive device region on the BSPDNS, a backside insulating layer including a first portion extending between the BSPDNS and the logic device region and a second portion extending between the BSPDNS and the passive device region, the passive device region including a semiconductor layer that is in the backside insulating layer, and a dam separating the first portion of the backside insulating layer from the semiconductor layer of the passive device region.

Abstract: In order to achieve higher contact quality for backside power distribution networks, provided is a backside contact to a semiconductor device having a positive slope and a dielectric sidewall liner, and methods for making the same.

Abstract: Integrated circuit devices and methods of forming the same are provided. The methods may include providing a substrate structure including a substrate, a bottom insulator and a semiconductor region between the substrate and the bottom insulator, the semiconductor region extending in a first direction; forming first and second preliminary transistor structures on the bottom insulator, wherein and the bottom insulator may include first and second portions that the first and second preliminary transistor structures respectively overlap, and a third portion between the first and second portions; replacing the third portion of the bottom insulator with a bottom semiconductor layer; forming a source/drain region between the first and second preliminary transistor structures; replacing the substrate and the semiconductor region with a backside insulator; forming a power contact in the backside insulator, wherein the source/drain region may overlap the power contact; and forming a power rail.

Abstract: Integrated circuit devices are provided. An integrated circuit device includes an insulating layer and a metal via structure that is in the insulating layer. The metal via structure has a lower portion and an upper portion that is narrower than the lower portion. Moreover, the integrated circuit device includes a metal line that is on and electrically connected to the metal via structure. Related methods of forming integrated circuit devices are also provided.

Abstract: Provided is a semiconductor device including at least one front-end-of-line (FEOL) element connected to an interconnect structure, the interconnect structure including: a 1st metal pattern or via structure with a spacer structure on a sidewall thereof; and a 1st interlayer dielectric (ILD) layer formed at sides of the 1st metal pattern or via structure with the spacer structure on the sidewall thereof, wherein the spacer structure includes a dielectric material different from a material included in the 1st ILD layer.

Abstract: A convolution method for high speed deep learning according to the present invention includes (a) a step in which a feature map receiving unit of the convolution system receives a feature map configured by N channels; (b) a step in which a main controller of the convolution system selects a “0”-th channel from the feature map configured by N channels; (c) a step in which the main controller confirms a coordinate in which x, y coordinate is “0”, from the feature map of the “0”-th channel; (d) a coarse step in which a convolution calculating unit of the convolution system performs a convolution operation and a rectified linear unit (ReLU) operation while shifting by 2 in a horizontal direction and a vertical direction in the feature map; (e) a step in which the channel switching unit of the convolution system switches the channel to a subsequent channel when the coarse step is completed for the feature map of the “0”-th channel; (g) a step in which the main controller determines whether the switched channel is

Abstract: A semiconductor device includes a semiconductor substrate including an in-cell area and a scribe lane defining the in-cell area, a first overlay pattern on the semiconductor substrate, and a second overlay pattern adjacent to the first overlay pattern, wherein the first overlay pattern is a diffraction-based overlay (DBO) pattern and the second overlay pattern is a scanning electron microscope (SEM) overlay pattern.

Abstract: A semiconductor device includes a first overlay group and a second overlay group disposed on a semiconductor substrate. The first overlay group includes first lower overlay patterns which extend in a first direction, first upper overlay patterns overlapping the first lower overlay patterns, and first via overlay patterns interposed between the first lower overlay patterns and the first upper overlay patterns. The second overlay group includes second lower overlay patterns which extend in a second direction, second upper overlay patterns overlapping the second lower overlay patterns, and second via overlay patterns interposed between the second lower overlay patterns and the second upper overlay patterns. The second lower overlay patterns include end portions adjacent to and spaced apart from the first overlay group.