Abstract: The present invention provides a memory device that can safely hold much data necessary for using an Application (AP) therein. In the present invention, a memory device includes a first tamper resistant memory 41 that cannot be accessed directly by an electronic device and a second non-tamper resistant memory that cannot be directly accessed by the electronic device. The second memory is used to save data stored in the first memory 41 to. In this memory device, since data necessary for using many APs can be safely held in the device, any terminal device satisfying authorizing conditions can use the data held therein.

Abstract: Of three chips (2A), (2B), and (2C) mounted on a main surface of a package substrate (1) in a multi-chip module (MCM), a chip (2A) with a DRAM formed thereon and a chip (2B) with a flash memory formed thereon are electrically connected to wiring lines (5) of the package substrate (1) through Au bumps (4), and a gap formed between main surfaces (lower surfaces) of the chips (2A), (2B) and a main surface of the package substrate (1) is filled with an under-fill resin (6). A chip (2C) with a high-speed microprocessor formed thereon is mounted over the two chips (2A) and (2B) and is electrically connected to bonding pads (9) of the package substrate (1) through Au wires (8).

Abstract: Of three chips (2A), (2B), and (2C) mounted on a main surface of a package substrate (1) in a multi-chip module (MCM), a chip (2A) with a DRAM formed thereon and a chip (2B) with a flash memory formed thereon are electrically connected to wiring lines (5) of the package substrate (1) through Au bumps (4), and a gap formed between main surfaces (lower surfaces) of the chips (2A), (2B) and a main surface of the package substrate (1) is filled with an under-fill resin (6). A chip (2C) with a high-speed microprocessor formed thereon is mounted over the two chips (2A) and (2B) and is electrically connected to bonding pads (9) of the package substrate (1) through Au wires (8).

Abstract: With commands from a terminal divided into a command to designate an access area and a command to gain access, the terminal adds verification data of the terminal to an argument of the command to gain access, and it is thereby possible to verify the identity of a terminal application that issues the command to designate an access area, a terminal application that issues the command to gain access, and a terminal application that holds a verification key.

Abstract: Of three chips (2A), (2B), and (2C) mounted on a main surface of a package substrate (1) in a multi-chip module (MCM), a chip (2A) with a DRAM formed thereon and a chip (2B) with a flash memory formed thereon are electrically connected to wiring lines (5) of the package substrate (1) through Au bumps (4), and a gap formed between main surfaces (lower surfaces) of the chips (2A), (2B) and a main surface of the package substrate (1) is filled with an under-fill resin (6). A chip (2C) with a high-speed microprocessor formed thereon is mounted over the two chips (2A) and (2B) and is electrically connected to bonding pads (9) of the package substrate (1) through Au wires (8).

Abstract: A semiconductor device includes a wiring board, a first semiconductor chip (e.g. DRAM) that is flip-chip connected on the wiring board, a second semiconductor chip (e.g. DRAM) that is of the same type as the first semiconductor chip and is mounted face up on the first semiconductor chip such that the orientation of the arrangement of the pads is at 90° from that of the first semiconductor chip, a third semiconductor chip (e.g. microcomputer chip) disposed on the second semiconductor chip, wires, and a sealing medium. The wiring board has a plurality of common wiring patterns for electrically connecting first electrodes for the first semiconductor chip and second electrodes for the second semiconductor chip. The common wiring patterns can be disposed without crossing on the surface wire layer of the wiring board.

Abstract: A semiconductor wafer comprising: a tubular trench formed at a position to form a through-hole electrode of a wafer; an insulating member buried inside the trench and on an upper surface of the trench; a gate electrode film and a metal film formed on an upper surface of the insulating member; a multilevel columnar wiring via formed on an upper surface of the metal film; and an external connection electrode formed electrically connected to the metal film via the multilevel columnar wiring via. In this manner, it is unnecessary to have a new process of dry etching to form a through-hole electrode after thinning the wafer and equipment development. Moreover, introduction of a specific design enables formation of through-hole electrodes with significantly reduced difficulties of respective processes.

Abstract: To provide a test technology capable of reducing a package size by reducing a number of terminals (pins) in a semiconductor integrated circuit of SIP or the like constituted by mounting a plurality of semiconductor chips to a single package, in SIP 102 constituted by mounting a plurality of semiconductor chips to a signal package of ASIC 100, SDRAM 101 and the like, a circuit of testing SDRAM 101 (SDRAMBIST 109) is provided at inside of ASIC 100, and SDRAM 101 is tested from outside of SDRAM 101, that is, from ASIC 100. By providing the test circuit of SDRAM 101 at inside of ASIC 100, it is not necessary to extrude a terminal for testing SDRAM 101 to outside of SIP 102.

Abstract: To provide a test technology capable of reducing a package size by reducing a number of terminals (pins) in a semiconductor integrated circuit of SIP or the like constituted by mounting a plurality of semiconductor chips to a single package, in SIP 102 constituted by mounting a plurality of semiconductor chips to a signal package of ASIC 100, SDRAM 101 and the like, a circuit of testing SDRAM 101 (SDRAMBIST 109) is provided at inside of ASIC 100, and SDRAM 101 is tested from outside of SDRAM 101, that is, from ASIC 100. By providing the test circuit of SDRAM 101 at inside of ASIC 100, it is not necessary to extrude a terminal for testing SDRAM 101 to outside of SIP 102.

Abstract: A housing of a disk device includes a rectangular base and a rectangular cover screwed to the base. The cover has a plurality of first through holes which are provided individually in four corner portions of the cover and in respective central parts of long side edges of the cover and through which screws are passed and screwed to the base, and a second through hole which is provided opposite the pivot and through which a screw is passed and screwed to the pivot. The cover includes an aperture formed in a triangle region which is opposed to the drive section and containing a center of gravity of the triangle, the triangle having vertices individually on a center of the second through hole and respective centers of those two of the first through holes which are located closest to the second through hole.

Abstract: The present application is to make an information storage device (card) with a plurality of communication functions perform a process by one of the communication functions in cooperation with another process performed by the other communication function. A card 30 includes contactless communication means and contact communication means so as to execute only one of a process using contactless communication and a process using contact communication at one and the same time. The card 30 further includes processing means 33 and status change means 31. The processing means 33 executes processes by contactless communication and contact communication. The status change means 31 gives a response, in terms of an execution status of a contactless communication process, when the status change means 31 receives a check request command for inquiring a condition of the contactless communication process from a card supervision portion 12 through the contact communication means.

Abstract: Of three chips (2A), (2B), and (2C) mounted on a main surface of a package substrate (1) in a multi-chip module (MCM), a chip (2A) with a DRAM formed thereon and a chip (2B) with a flash memory formed thereon are electrically connected to wiring lines (5) of the package substrate (1) through Au bumps (4), and a gap formed between main surfaces (lower surfaces) of the chips (2A), (2B) and a main surface of the package substrate (1) is filled with an under-fill resin (6). A chip (2C) with a high-speed microprocessor formed thereon is mounted over the two chips (2A) and (2B) and is electrically connected to bonding pads (9) of the package substrate (1) through Au wires (8).

Abstract: It is an object of the invention to provide a memory device including a memory area having a large storage capacity and an equal security level to that of a Smart card. A semiconductor memory card 10 that can be attached to and detached from an electronic device is provided with first memory 50 of non-tamper-resistance having usual areas 52 and 53 that can be accessed from the electronic device and a secure area 51 that cannot directly be accessed from the electronic device, and second memory 41 of tamper resistance that cannot directly be accessed from the electronic device, wherein access to the secure area 51 of the first memory 50 can be made only through a secure control section 30 for managing access to the second memory 41. The secure area 51 cannot directly be accessed by an external device and therefore has the higher security level than the authentication area 52. Since the secure area 51 is placed in the non-tamper-resistant memory 50, a large storage capacity can be reserved.

Abstract: An information processing apparatus is disclosed capable of using application programs of both a cellular phone and a non-contact card type terminal in cooperation, and performing a process request with respect to a portable terminal in response to a command received by the non-contact card type terminal from a communication terminal. When a communication terminal 30 requests a second device (SE: non-contact card type terminal) 20 of an information processing apparatus (hybrid portable communication terminal) 70 to process data in response to a predetermined command in a predetermined non-contact communication system, a command transmission request is transmitted beforehand with respect to a first device (PTD: cellular phone) 10 of the information processing apparatus in another non-contact communication system.

Abstract: Of three chips (2A), (2B), and (2C) mounted on a main surface of a package substrate (1) in a multi-chip module (MCM), a chip (2A) with a DRAM formed thereon and a chip (2B) with a flash memory formed thereon are electrically connected to wiring lines (5) of the package substrate (1) through Au bumps (4), and a gap formed between main surfaces (lower surfaces) of the chips (2A), (2B) and a main surface of the package substrate (1) is filled with an under-fill resin (6). A chip (2C) with a high-speed microprocessor formed thereon is mounted over the two chips (2A) and (2B) and is electrically connected to bonding pads (9) of the package substrate (1) through Au wires (8).

Abstract: A disk device and microphone are arranged in a device main body. The case of the disk device includes a first shell having a bottom, and a second shell having a top cover. A disk-shaped recording medium is contained in the case. The microphone is positioned closer to the top cover of the disk device than to the bottom of the disk device in the thickness direction of the device main body. Assuming that ? represents the angle between straight line connecting the disk device to the microphone by the most direct way, and a plane parallel to a surface of the top cover of the disk device, the disk device and microphone arranged to satisfy the following relationship with respect to the maximum deformation angle ? of the top cover of the disk device in a lowest-order vibration mode: 0??<90°??.

Abstract: With commands from a terminal divided into a command to designate an access area and a command to gain access, the terminal adds verification data of the terminal to an argument of the command to gain access, and it is thereby possible to verify the identity of a terminal application that issues the command to designate an access area, a terminal application that issues the command to gain access, and a terminal application that holds a verification key.

Abstract: The present invention relates to a semiconductor device including a package board, a first DRAM that is flip-chip connected on the package board, a second DRAM that is of the same type as the first DRAM and is mounted face up on the first DRAM such that the orientation of the arrangement of the pads is at 90° from that of the first DRAM, a microcomputer chip disposed on the second DRAM, wires, and a sealing medium. The package board has a plurality of common wires for electrically connecting first electrodes for the first DRAM and second electrodes for the second DRAM. The common wires can be disposed without crossing on the surface wire layer of the package board, since the orientation of the arrangement of the pads of the second DRAM forms an angle of 90° relative to that of the first DRAM.

Abstract: To provide a test technology capable of reducing a package size by reducing a number of terminals (pins) in a semiconductor integrated circuit of SIP or the like constituted by mounting a plurality of semiconductor chips to a single package, in SIP 102 constituted by mounting a plurality of semiconductor chips to a signal package of ASIC 100, SDRAM 101 and the like, a circuit of testing SDRAM 101 (SDRAMBIST 109) is provided at inside of ASIC 100, and SDRAM 101 is tested from outside of SDRAM 101, that is, from ASIC 100. By providing the test circuit of SDRAM 101 at inside of ASIC 100, it is not necessary to extrude a terminal for testing SDRAM 101 to outside of SIP 102.

Abstract: A high speed operating circuit such as a data processor chip and memory chips constituting an electronic circuit is mounted to a multilayer wiring substrate in the state of a bare chip, and is set to a multichip module. This multichip module is mounted to a wiring substrate constituting the electronic circuit. In the multichip module, buffer circuits are inserted into a module internal bus commonly connected to the data processor chip and the memory chips. The buffer circuits are set to an address output buffer, a control signal output buffer and a data input/output buffer set to a high impedance state in accordance with an operating selection of the memory chips. When high frequency noise resisting characteristics are strengthened by the multilayer wiring substrate and the data processor chip gets access to the memory chips, an external noise tends to flow into a memory through the module internal bus connected to the data processor chip and the memory chips.