Patents by Inventor Takahiro Kawashima

Takahiro Kawashima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170076846
    Abstract: An R-T-B based sintered magnet includes a first main surface and a first side surface. The first main surface has a coercivity that is higher than that of the first side surface. ?HcjM?60 kA/m is satisfied, where ?HcjM is a difference in coercivity between a portion having a highest coercivity on the first main surface and a portion having a lowest coercivity on the first main surface. ?HcjG?60 kA/m is satisfied, where ?HcjG is a difference in coercivity between a portion having a highest coercivity on a first cross section and a portion having a lowest coercivity on the first cross section and the first cross section is a cross section parallel to the first main surface and spaced from the first main surface at a predetermined length or more.
    Type: Application
    Filed: September 7, 2016
    Publication date: March 16, 2017
    Applicant: TDK CORPORATION
    Inventors: Naoto TSUKAMOTO, Hiroshi MIYASAKA, Makoto IWASAKI, Takahiro KAWASHIMA, Chikara ISHIZAKA
  • Patent number: 9570981
    Abstract: A bidirectional DC-DC converter includes a series circuit of a first winding of a first reactor, a second reactor, and a first switch connected to both ends of a first DC power source, a series circuit of a second switch and a second DC power source connected to both ends of the first switch, a series circuit of a second winding of the first reactor, a third reactor, a first selector switch, and a first diode connected to both ends of a series circuit of the second reactor and the first switch, a series circuit of a second selector switch, a second diode, and the second DC power source connected to both ends of a series circuit of the first selector switch and first diode, and a controller turning on/off the switches and the selector switches.
    Type: Grant
    Filed: January 24, 2013
    Date of Patent: February 14, 2017
    Assignees: Sanken Electric Co., Ltd., National University Corporation Shimane University
    Inventors: Hiromitsu Terui, Hideki Asuke, Hideharu Takano, Masayoshi Yamamoto, Takahiro Kawashima
  • Patent number: 9482043
    Abstract: A door main body includes a through hole formed on an end surface located at an end of the door main body in a rotation axis direction of rotation of the door main body, a cable or a hose being inserted through the through hole. A door frame portion includes: a frame opening portion which is formed on a surface opposed to the through hole and has a shape corresponding to a movement trajectory of the through hole when the door main body is opened or closed; and a slide supporting member supporting the cable or the hose extending through the frame opening portion while sliding relative to the frame opening portion.
    Type: Grant
    Filed: February 20, 2014
    Date of Patent: November 1, 2016
    Assignee: KAWASAKI JUKOGYO KABUSHIKI KAISHA
    Inventors: Takahiro Kawashima, Tsunetoshi Goto, Hiroyuki Hirata
  • Publication number: 20160276492
    Abstract: A method for producing a thin film transistor including an oxide semiconductor layer includes: depositing an oxide semiconductor film above a substrate by a sputtering method; and forming the oxide semiconductor layer into a predetermined shape by processing the oxide semiconductor film, wherein in the depositing of an oxide semiconductor film, a first oxide semiconductor film is deposited by using a first power density, and a second oxide semiconductor film is then deposited on the first oxide semiconductor film by using a second power density different from the first power density.
    Type: Application
    Filed: July 1, 2014
    Publication date: September 22, 2016
    Applicant: JOLED INC.
    Inventors: Eiji TAKEDA, Takahiro KAWASHIMA
  • Patent number: 9431468
    Abstract: A thin-film semiconductor device includes a substrate, a second protection layer, and an oxide semiconductor layer between the substrate and the second protection layer. The second protection layer has provided therein at least one through-hole in which an extraction electrode is embedded, the extraction electrode being electrically connected with the oxide semiconductor layer. The second protection layer has film density of 2.80 g/cm3 to 3.25 g/cm3.
    Type: Grant
    Filed: March 7, 2014
    Date of Patent: August 30, 2016
    Assignee: JOLED INC.
    Inventors: Takahiro Kawashima, Masanori Miura
  • Patent number: 9431543
    Abstract: A thin-film semiconductor device includes: a substrate; a gate electrode above the substrate; a gate insulation film above the gate electrode; a channel layer above the gate insulation film, the channel layer having a raised part; a channel protection layer over the raised part of the channel layer, the channel protection layer comprising an organic material, and the organic material including silicon, oxygen, and carbon; an interface layer at an interface between a top surface of the raised part of the channel layer and the channel protection layer, and comprises at least carbon and silicon that derive from the organic material; and a source electrode and a drain electrode each provided over a top surface and a side surface the channel protection layer, a side surface of the interface layer, a side surface of the raised part of the channel layer, and a top surface of the channel layer.
    Type: Grant
    Filed: February 26, 2013
    Date of Patent: August 30, 2016
    Assignees: JOLED INC., PANASONIC LIQUID CRYSTAL DISPLAY CO., LTD.
    Inventors: Hiroshi Hayashi, Takahiro Kawashima, Genshirou Kawachi
  • Publication number: 20160204139
    Abstract: A thin film transistor substrate includes: a gate electrode and a first electrode of a capacitor formed above a substrate so as to be arranged along a plane of the substrate; a gate insulating film formed on the gate electrode; a semiconductor layer formed on the gate insulating film; an insulating layer formed on the semiconductor layer and above the first electrode so as to expose portions of the semiconductor layer; a source electrode and a drain electrode formed above the insulating layer so as to be connected to the semiconductor layer at the exposed portions of the semiconductor layer; and a second electrode of the capacitor formed above the insulating layer, at a position opposite the first electrode, and the insulating layer above the gate electrode is thicker than the insulating layer above the first electrode.
    Type: Application
    Filed: May 27, 2014
    Publication date: July 14, 2016
    Applicant: JOLED INC.
    Inventors: Yuji KISHIDA, Takahiro KAWASHIMA, Yoshiaki NAKAZAKI
  • Patent number: 9362563
    Abstract: The present invention provides a highly reliable energy storage device capable of preventing a reaction current from flowing in a carbon nanotube electrode by ionizing a catalyst metal or a substrate metal to cause the metal to flow out to an electrolytic solution. An energy storage device of the present invention includes: at least a pair of electrode bodies that are a cathode and an anode; and an electrolytic solution. At least one of the electrode bodies is configured such that a layer of carbon nanotubes is formed on an electric conductor. A coupling region where one ends of the carbon nanotubes are coupled to and electrically connected to the electric conductor and a non-coupling region where ends of the carbon nanotubes are not coupled to the electric conductor are formed on a surface of the electric conductor. The carbon nanotubes having one ends connected to the coupling region are toppled to cover a surface of the non-coupling region.
    Type: Grant
    Filed: March 12, 2009
    Date of Patent: June 7, 2016
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Takuma Asari, Hironori Kumagai, Shigeo Hayashi, Yasuhiro Hashimoto, Takahiro Kawashima
  • Patent number: 9302684
    Abstract: A railcar door apparatus includes: a side sliding door that opens and closes an opening of a side bodyshell of a railcar; a first elastic member attached vertically to an end of the door; and a second elastic member opposed to the first so they do not touch when the door is closed. The first elastic member includes a first base portion and a first projecting wall portion projecting from the base toward the second elastic member; the second elastic member includes a second base portion and a second projecting wall portion projecting from the base toward the first elastic member; when the door is closed, a gap space is formed between the first and second elastic members, and the projecting wall portions overlap; and vertical grooves or projections are formed on the outside of at least one of the projecting wall portions, the outer surface facing the gap space.
    Type: Grant
    Filed: December 3, 2012
    Date of Patent: April 5, 2016
    Assignee: KAWASAKI JUKOGYO KABUSHIKI KAISHA
    Inventors: Takahiro Kawashima, Tsunetoshi Goto, Hiroyuki Hirata
  • Patent number: 9275855
    Abstract: A semiconductor thin-film manufacturing method includes: forming, above a substrate, an amorphous silicon film (precursor film) having a photoluminescence (PL) intensity greater than or equal to 0.65 when photon energy is 1.1 eV in a PL spectrum normalized to have a maximum PL intensity of 1; and annealing the amorphous silicon film to form a crystalline silicon film.
    Type: Grant
    Filed: September 24, 2012
    Date of Patent: March 1, 2016
    Assignee: JOLED INC.
    Inventors: Takahiro Kawashima, Hikaru Nishitani, Sei Ootaka
  • Publication number: 20160057068
    Abstract: An apparatus executes a transmission-side process on target data to be transmitted to another apparatus through a communication path. The transmission-side process generates transmission data including payload information and control information, where the control information includes the target data and address information indicating a destination address of the target data. The another apparatus includes a queue area configured to store pieces of information as queueing data so as to prevent a piece of information from being overwritten by another piece of information. The apparatus controls transmission of the transmission data to the another apparatus by embedding the target data into the control information included in the transmission data. The another apparatus stores the control information included in the received transmission data into the queue area as queuing data, and extracts the embedded target data from the control information stored in the queue area.
    Type: Application
    Filed: August 11, 2015
    Publication date: February 25, 2016
    Applicant: Fujitsu Limited
    Inventors: Yuki ARAKAWA, Takahiro KAWASHIMA
  • Publication number: 20160010385
    Abstract: A door main body includes a through hole formed on an end surface located at an end of the door main body in a rotation axis direction of rotation of the door main body, a cable or a hose being inserted through the through hole. A door frame portion includes: a frame opening portion which is formed on a surface opposed to the through hole and has a shape corresponding to a movement trajectory of the through hole when the door main body is opened or closed; and a slide supporting member supporting the cable or the hose extending through the frame opening portion while sliding relative to the frame opening portion.
    Type: Application
    Filed: February 20, 2014
    Publication date: January 14, 2016
    Applicant: KAWASAKI JUKOGYO KABUSHIKI KAISHA
    Inventors: Takahiro KAWASHIMA, Tsunetoshi GOTO, Hiroyuki HIRATA
  • Patent number: 9236487
    Abstract: A method of manufacturing a substrate having a thin film thereabove includes: forming a thin film above the substrate; and crystallizing at least a predetermined area of the silicon thin film into a crystallized area through relative scan of the silicon thin film which is performed while the thin film is being irradiated with a continuous wave light beam, wherein in the crystallizing, a projection of the light beam on the thin film has a major axis in a direction crossing a direction of the relative scan, and the formed crystallized area includes a strip-shaped first area extending in the direction crossing the direction of the relative scan and a second area adjacent to the strip-shaped first area, the strip-shaped first area including crystal grains having an average grain size larger than that of crystal grains in the second area.
    Type: Grant
    Filed: February 24, 2014
    Date of Patent: January 12, 2016
    Assignee: JOLED INC.
    Inventors: Tomohiko Oda, Takahiro Kawashima
  • Patent number: 9178075
    Abstract: A thin-film semiconductor device includes a gate electrode formed above a substrate; a gate insulating film formed to cover the gate electrode; a semiconductor layer formed above the gate insulating film and having a channel region; a channel protective layer formed above the semiconductor layer and containing an organic material which includes silicon, oxygen, and carbon; an interfacial layer which is formed in contact with the channel protective layer between the semiconductor layer and the channel protective layer, and which includes carbon as a major component, the carbon originating from the organic material; and a source electrode and a drain electrode which are electrically connected to the semiconductor layer.
    Type: Grant
    Filed: February 27, 2012
    Date of Patent: November 3, 2015
    Assignees: PANASONIC LIQUID CRYSTAL DISPLAY CO., LTD., JOLED INC.
    Inventors: Takahiro Kawashima, Hisao Nagai, Eiichi Satoh, Yuji Kishida, Genshiro Kawachi
  • Patent number: 9166056
    Abstract: In a thin-film semiconductor device, a semiconductor layer has a bandgap energy of 1.6 eV or less, an insulating layer formed above the semiconductor layer includes: a first insulating layer region placed outside of a first contact opening and above one end of a gate electrode; a second insulating layer region placed outside of a second contact opening and above the other end of the gate electrode which opposes the one end; and a third insulating layer region being rectangular and placed between the first contact opening and the second contact opening.
    Type: Grant
    Filed: July 12, 2013
    Date of Patent: October 20, 2015
    Assignees: PANASONIC CORPORATION, PANASONIC LIQUID DISPLAY CO., LTD.
    Inventors: Hiroshi Hayashi, Takahiro Kawashima, Genshiro Kawachi
  • Patent number: 9121829
    Abstract: A crystallinity evaluation method of evaluating crystallinity of a semiconductor film formed above a substrate includes following steps. First, a peak waveform of a Raman band in a Raman spectrum of the semiconductor film is obtained using Raman spectrometry. The Raman band corresponds to a phonon mode unique to the semiconductor film. The peak waveform is a wavelength range having a peak of the Raman band. Next, a first waveform is generated by fitting the obtained peak waveform by Gauss function. Then, a peak value of the first waveform is extracted. Then, a second waveform is generated by fitting the obtained peak waveform by Lorenz function based on the extracted peak value. Then, a peak value, a FWHM, and/or a wavelength indicating the peak value regarding the generated second waveform are obtained. Then, crystallinity of the semiconductor film is evaluated based on the obtained information.
    Type: Grant
    Filed: October 5, 2012
    Date of Patent: September 1, 2015
    Assignees: JOLED INC., PANASONIC LIQUID CRYSTAL DISPLAY CO., LTD.
    Inventors: Takahiro Kawashima, Genshiro Kawachi, Tomohiko Oda, Hikaru Nishitani
  • Patent number: 9111803
    Abstract: A thin-film device includes: a first device unit having a first gate electrode and a first crystalline silicon thin film located opposite to the first gate electrode; and a second device unit having a second gate electrode and a second crystalline silicon thin film located opposite to the second gate electrode. The first crystalline silicon thin film includes a strip-shaped first area and a second area smaller than the strip-shaped first area in average grain size. The first device unit has, as a channel, at least a part of the strip-shaped first area. The second silicon thin film includes a second crystalline area smaller than the strip-shaped first area in average grain size. The second device unit has the second crystalline area as a channel. The strip-shaped first area includes crystal grains in contact with the second area on each side of the strip-shaped first area.
    Type: Grant
    Filed: September 26, 2012
    Date of Patent: August 18, 2015
    Assignee: JOLED INC.
    Inventors: Tomohiko Oda, Takahiro Kawashima
  • Patent number: 9112034
    Abstract: A thin-film semiconductor device manufacturing method according to the present disclosure includes: preparing a substrate; forming a gate electrode above the substrate; forming a gate insulating film above the substrate; forming an amorphous film (amorphous silicon film) above the substrate; forming a crystalline film (crystalline silicon film) including a first crystal and a second crystal, by crystallizing the amorphous film, the first crystal (i) containing subgrains formed with different crystal orientations in a single crystal and (ii) including a subgrain boundary formed by plural crystal planes between the subgrains, the second crystal having an average crystal grain size smaller than an average crystal grain size of the first crystal; thinning the crystalline film; and forming a source electrode and a drain electrode above the substrate.
    Type: Grant
    Filed: June 14, 2013
    Date of Patent: August 18, 2015
    Assignees: PANASONIC LIQUID CRYSTAL DISPLAY CO., LTD., JOLED INC.
    Inventors: Sei Ootaka, Hiroshi Yoshioka, Takahiro Kawashima, Hikaru Nishitani
  • Patent number: 9087904
    Abstract: A thin-film transistor includes: a gate electrode above a substrate; a gate insulating layer above the gate electrode; a semiconductor layer opposed to the gate electrode with the gate insulating layer therebetween; a protective layer above the semiconductor layer and comprising an organic material; and a source electrode and a drain electrode each of which has at least a portion located above the protective layer. The protective layer includes an altered layer which has at least a portion contacting the semiconductor layer, and which is generated by alteration of a surface layer of the protective layer in a region exposed from the source electrode and the drain electrode. A relational expression of Log10 Nt?0.0556?+16.86 is satisfied where Nt (cm?3) represents a defect density of the semiconductor layer and ? (°) represents a taper angle of an edge portion of the protective layer.
    Type: Grant
    Filed: May 29, 2013
    Date of Patent: July 21, 2015
    Assignee: JOLED INC.
    Inventors: Yuji Kishida, Eiichi Satoh, Takahiro Kawashima
  • Publication number: 20150194475
    Abstract: A thin-film semiconductor device includes a substrate, a second protection layer, and an oxide semiconductor layer between the substrate and the second protection layer. The second protection layer has provided therein at least one through-hole in which an extraction electrode is embedded, the extraction electrode being electrically connected with the oxide semiconductor layer. The second protection layer has film density of 2.80 g/cm3 to 3.25 g/cm3.
    Type: Application
    Filed: March 7, 2014
    Publication date: July 9, 2015
    Applicant: PANASONIC CORPORATION
    Inventors: Takahiro Kawashima, Masanori Miura