Abstract: A dynamic random access memory comprises a pair of write-in data transferring lines (IL, IL), a pair of read-out data transferring lines (OL, OL) and a current-mirror type sense amplifier comprising (30) CMOS transistors. The current-mirror type amplifier (30) is connected between a plurality of bit line pairs (BL, BL) and the pair of read-out data transferring lines (OL, OL). At the time of data reading, the pair of write-in data transferring lines (IL, IL) is connected to the corresponding bit line pair (BL, BL) in response to a write-in column decoded signal (YW) obtained by ANDing a column decoded signal (CA) with a write-in instruction signal (W).

Abstract: A substrate bias potential generator for biasing a semiconductor substrate to a predetermined potential includes first and second substrate bias generating circuits which operate alternatively according to the potential of the substrate, whereby consumption of power in the substrate bias potential generator is reduced. The alternative operation of the bias generating circuits each activated by a pulse signal train is performed by using a first insulated gate transistor having a gate electrode connected to the semiconductor substrate, a second insulated gate transistor having a gate electrode for receiving the reference potential, an amplifier for differentially amplifying outputs of the first and second insulated gate transistors, an insulated gate transistor for charging an output of the amplifier to a predetermined potential when the amplifier is activated, and a circuit for transmitting the output of the differential amplifier to the first and second bias potential generating circuits.

Abstract: A dynamic random access memory with self-refresh function, which includes a substrate bias generator (100) adapted to be intermittently driven to apply a bias potential to a semiconductor substrate (15). This memory device comprises a circuit (91) for generating an internal refresh instruction signal (.phi..sub.S) in response to an external refresh instruction signal, a circuit (92, 93) which, in response to the internal refresh instruction signal, generates a refresh enable signal (.phi..sub.R) intermittently at a predetermined interval, a circuit (94, 95, 96, 98) which, in response to the refresh enable signal, refreshes data in the memory cells, and a circuit (99) which, in response to the internal refresh instruction signal and refresh enable signal, activates the substrate bias generator in the same cycle as the cycle of generation of the refresh enable signal and only for a time shorter than the cycle of generation of the refresh enable signal.

Abstract: A dynamic random access memory device includes a pair of write-in data transferring buses for transferring data to be written, a pair of read-out data transferring buses for transferring data to be read provided additionally and separately from the write-in data transferring bus pair and a plurality of current mirror type sense amplifiers formed of CMOS transistors and each amplifier being provided between a bit line pair and the read-out data transferring bus pair and having input nodes connected to the corresponding bit line pair and the read-out data transferring bus pair forming output nodes thereof. The current mirror type sense amplifiers of CMOS transistors are activated in response to an output of a column decoder at earlier time than the time when conventional flip-flop type sense amplifiers are activated.

Abstract: There is disclosed a dynamic random access memory device of the type capable of periodic self-refresh cycles of operation. The DRAM includes the detector circuit for detecting the designation of the self-refresh mode and a voltage generator circuit for generating a voltage to precharge the bit line pair. During the self-controlled refresh cycle, the bit line pair is equalized and precharged to a voltage lower than Vcc/2. When it is attempted to set the time interval between the self-refresh cycles in order to reduce current consumption, the level of voltage stored in the memory cell capacitor tends to decrease due to charge leakage. However, it is implemented to provide and keep a potential difference between the precharge voltage on the bit line pair and the voltage stored in the capacitor thereby to secure the desired sensing margin for the sense amplifier.

Abstract: A dynamic random access memory having a self-refresh mode comprises a memory array partitioned into four groups in which control are respectively performed and a partial activation control circuit. The four groups in the memory array are alternately refreshed two by two in an operation under the self-refresh mode. As a result, each group in the memory array is refreshed at a time interval of two times a conventional refresh interval, so that the power consumption is decreased.

Abstract: A dynamic semiconductor memory device is divided into a plurality of blocks. An operation of the semiconductor memory device is in either of a normal mode and a refresh mode, depending on the level of a refresh signal. In the normal mode, at an off time period, a potential on a bit line pair is equalized and a precharge potential is applied to the bit line pair. At the access time, equalizing of the potential on the bit line pair and supply of the precharge potential are stopped in a selected block and then, a word line driving signal is raised. On the other hand, in the refresh mode, at the off time period, the potential on the bit line pair is held at "H" and "L" levels by a sense amplifier, so that the potential on the bit line pair is not equalized and the precharge potential is not supplied. On this occasion, a precharge potential generating circuit is electrically disconnected from a power supply.

Abstract: A process for producing a hydrocarbon fluoride at a high selectivity with minimum formation of by-products is disclosed, which comprises reacting a hydrogen-containing hydrocarbon halide with anhydrous hydrogen fluoride in a liquid phase in the presence of a reaction product of (i) at least one of (a) an oxygen-containing compound selected from the group consisting of H.sub.2 O, H.sub.2 O.sub.2 and an oxygen-containing organic compound, and (b) a nitrogen-containing compound selected from the group consisting of NH.sub.3 and a nitrogen-containing organic compound, (ii) a tin compound selected from the group consisting of a stannic halide, a stannic oxyhalide and an organotin compound, and (iii) anhydrous hydrogen fluoride.