Patents by Inventor Takahiro Mori

Takahiro Mori has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240069390
    Abstract: The present invention provides a liquid crystal display that can reduce occurrence of quality problems and improve adhesive strength between substrates. The present invention is a liquid crystal display including a first substrate, a second substrate, and a seal. The first substrate includes a shift register monolithically formed on an insulating substrate, a plurality of bus lines, a first end, and a display region. The shift register includes a plurality of multistage-connected unit circuits and wiring connected to the plurality of unit circuits, and is arranged in a region between the first end and the display region. At least one of the unit circuits includes a clock terminal, an output terminal, an output transistor, a second transistor, and a bootstrap capacitor. The output transistor and the bootstrap capacitor are arranged in a region between the first end and one of the wiring and the second transistor.
    Type: Application
    Filed: November 6, 2023
    Publication date: February 29, 2024
    Inventor: Takahiro MORI
  • Patent number: 11901199
    Abstract: A pressurizing device includes: a mounting base; an upper mold which pressurizes the target object mounted on the mounting base from above; a heating lower mold which is a lower mold heated in advance by a heater, and which heats the target object under pressure by sandwiching the mounting base with the upper mold; a cooling lower mold which is a lower mold cooled in advance by a cooler, and which cools the target object under pressure by sandwiching the mounting base with the upper mold; and a control device which switches the lower mold that contributes to the pressurization of the target object to the heating lower mold or the cooling lower mold in accordance with the status of progress of the pressurization process for the target object.
    Type: Grant
    Filed: September 17, 2020
    Date of Patent: February 13, 2024
    Assignee: NIKKISO CO., LTD.
    Inventors: Takahiro Mori, Satoshi Idesako
  • Patent number: 11852924
    Abstract: The present invention provides a liquid crystal display that can reduce occurrence of quality problems and improve adhesive strength between substrates. The present invention is a liquid crystal display including a first substrate, a second substrate, and a seal. The first substrate includes a shift register monolithically formed on an insulating substrate, a plurality of bus lines, a first end, and a display region. The shift register includes a plurality of multistage-connected unit circuits and wiring connected to the plurality of unit circuits, and is arranged in a region between the first end and the display region. At least one of the unit circuits includes a clock terminal, an output terminal, an output transistor, a second transistor, and a bootstrap capacitor. The output transistor and the bootstrap capacitor are arranged in a region between the first end and one of the wiring and the second transistor.
    Type: Grant
    Filed: February 13, 2023
    Date of Patent: December 26, 2023
    Assignee: SHARP KABUSHIKI KAISHA
    Inventor: Takahiro Mori
  • Patent number: 11851428
    Abstract: Disclosed is a compound of formula (I): wherein all symbols are defined in the description. Also disclosed are pharmaceutical compositions comprising the compounds, methods of making the compounds, kits comprising the compounds, and methods of using the compounds, compositions and kits for treatment of disorders associated with TREK-1, TREK-2 or both TREK-1 and TREK-2 dysfunction in a mammal.
    Type: Grant
    Filed: May 24, 2021
    Date of Patent: December 26, 2023
    Assignees: ONO PHARMACEUTICAL CO., LTD., VANDERBILT UNIVERSITY
    Inventors: Craig W. Lindsley, Joshua M. Wieting, Kevin M. Mcgowan, Jerod S. Denton, Kentaro Yashiro, Haruto Kurata, Yoko Sekioka, Takahiro Mori, Yuzo Iwaki
  • Publication number: 20230205019
    Abstract: The present invention provides a liquid crystal display that can reduce occurrence of quality problems and improve adhesive strength between substrates. The present invention is a liquid crystal display including a first substrate, a second substrate, and a seal. The first substrate includes a shift register monolithically formed on an insulating substrate, a plurality of bus lines, a first end, and a display region. The shift register includes a plurality of multistage-connected unit circuits and wiring connected to the plurality of unit circuits, and is arranged in a region between the first end and the display region. At least one of the unit circuits includes a clock terminal, an output terminal, an output transistor, a second transistor, and a bootstrap capacitor. The output transistor and the bootstrap capacitor are arranged in a region between the first end and one of the wiring and the second transistor.
    Type: Application
    Filed: February 13, 2023
    Publication date: June 29, 2023
    Inventor: Takahiro MORI
  • Publication number: 20230200261
    Abstract: The invention provides a spin qubit-type semiconductor device capable of achieving both high-speed spin manipulation and high integration, and an integrated circuit for the spin qubit-type semiconductor device.
    Type: Application
    Filed: November 29, 2022
    Publication date: June 22, 2023
    Inventors: Shota Iizuka, Takahiro Mori, Kimihiko Kato, Atsushi Yagishita, Tetsuya Ueda
  • Publication number: 20230180633
    Abstract: To suppress a leakage current caused by a gate of a tunnel field effect transistor included in a silicon spin quantum bit device, the silicon spin quantum bit device is provided including a tunnel field effect transistor having a gate, a source, and a drain, a quantum gate operation mechanism for spin control, which is provided under the tunnel field effect transistor, and an inter-qubit coupler for coupling a channel of the tunnel field effect transistor with a channel of a tunnel field effect transistor included in another quantum bit device. Further, the gate is made wider in width than the channel and is partly formed on the inter-qubit coupler.
    Type: Application
    Filed: April 14, 2021
    Publication date: June 8, 2023
    Inventors: Takahiro Mori, Atsushi Yagishita
  • Publication number: 20230146397
    Abstract: In a LDMOSFET 100, an “STI structure 11” provided in a drain region including a high concentration drain region 10 and a drift region 12 including the high concentration drain region 10 has a slit region 11A extending in a x-direction, and in plan view, the “STI structure 11” is interposed between the slit region 11A and the high concentration drain region 10.
    Type: Application
    Filed: September 14, 2022
    Publication date: May 11, 2023
    Inventor: Takahiro MORI
  • Publication number: 20230069864
    Abstract: There is formed a semiconductor device including, as the uppermost-layer wiring of the multilayer wiring layer, a plurality of first wirings, a second wiring, a plurality of first dummy wirings, a second dummy wiring, and a passivation film covering these wirings. The passivation film is patterned by etching with a photoresist film used as a mask, the plurality of first wirings and the plurality of first dummy wirings close thereto are densely formed, and the second dummy wiring is formed so as to surround a periphery of the second wiring sparsely formed directly above an analog circuit portion.
    Type: Application
    Filed: August 24, 2022
    Publication date: March 9, 2023
    Inventors: Yuki MURAYAMA, Makoto KOSHIMIZU, Takahiro MORI, Junjiro SAKAI, Satoshi IIDA
  • Patent number: 11598992
    Abstract: The present invention provides a liquid crystal display that can reduce occurrence of quality problems and improve adhesive strength between substrates. The present invention is a liquid crystal display including a first substrate, a second substrate, and a seal. The first substrate includes a shift register monolithically formed on an insulating substrate, a plurality of bus lines, a first end, and a display region. The shift register includes a plurality of multistage-connected unit circuits and wiring connected to the plurality of unit circuits, and is arranged in a region between the first end and the display region. At least one of the unit circuits includes a clock terminal, an output terminal, an output transistor, a second transistor, and a bootstrap capacitor. The output transistor and the bootstrap capacitor are arranged in a region between the first end and one of the wiring and the second transistor.
    Type: Grant
    Filed: April 20, 2022
    Date of Patent: March 7, 2023
    Assignee: SHARP KABUSHIKI KAISHA
    Inventor: Takahiro Mori
  • Publication number: 20230016546
    Abstract: Provided is a control apparatus including a sensing unit configured to output a short circuit sensing signal in response to sensing, in a turn-on period of a main switching device by a switching device for on control, of short circuit of the main switching device, a protection operation control unit configured to output an instruction signal of a short circuit protection operation at delayed timing relative to the short circuit sensing signal, and a protection unit configured to turn off the switching device for on control in response to the instruction signal, in which the protection operation control unit outputs the instruction signal in response to continuation of the short circuit sensing signal beyond a first reference time period.
    Type: Application
    Filed: May 18, 2022
    Publication date: January 19, 2023
    Inventor: Takahiro MORI
  • Publication number: 20220382155
    Abstract: There is provided a conductive composite having excellent conductivity and able to form a conductive film with which film loss in a resist layer is low. The conductive composite of the present invention includes a conductive polymer and a surfactant. When a critical micelle concentration of the surfactant is less than 0.1% by mass, a content of the surfactant is 5 parts by mass or more with respect to 100 parts by mass of the conductive polymer. In addition, when the critical micelle concentration of the surfactant is 0.1% by mass or more, the content of the surfactant is more than 100 parts by mass with respect to 100 parts by mass of the conductive polymer.
    Type: Application
    Filed: July 25, 2022
    Publication date: December 1, 2022
    Applicant: Mitsubishi Chemical Corporation
    Inventors: Saki NAKANO, Takahiro MORI
  • Patent number: 11513546
    Abstract: A current generation circuit includes a metal-oxide-semiconductor (MOS) transistor having a source terminal coupled to one line of a power supply line and a ground line, a voltage generation circuit configured to generate a first voltage corresponding to a resistance value of wiring between the one line and the source terminal, and a control circuit configured to cause the MOS transistor to generate a predetermined current based on the first voltage.
    Type: Grant
    Filed: August 26, 2021
    Date of Patent: November 29, 2022
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventor: Takahiro Mori
  • Patent number: 11470263
    Abstract: A control section sets an exposure timing and an exposure period for imaging pixels for acquiring an imaging picture and light intensity detection pixels for detecting intensity of illumination light individually by an imaging section. A correction gain calculation section calculates a flicker correction gain for each of the imaging pixels on the basis of pixel signals generated by the imaging pixels and pixel signals generated by the light intensity detection pixels. A flicker correction section uses the flicker correction gain for each imaging pixel calculated by the correction gain calculation section to perform flicker correction of the imaging pixel. Accordingly, an imaging picture can be obtained on which the influence of fluctuation of the intensity of emission light is reduced irrespective of the positional relationship between an illumination apparatus and an imaging object.
    Type: Grant
    Filed: May 15, 2018
    Date of Patent: October 11, 2022
    Assignee: SONY CORPORATION
    Inventors: Akira Iwase, Takahiro Mori, Daisuke Nakayama, Yasuhiro Kodama, Masaya Kinoshita
  • Publication number: 20220305580
    Abstract: An object of the present invention is to suppress blow holes in welding using tough pitch copper. A welding method includes a first step of heating at least a portion of a first conductor and a second conductor containing copper, and a second step of adding a filler metal containing phosphorus while melting the first conductor and the second conductor so that a phosphorus content rate in a welded portion at which an end portion of the first conductor and an end portion of the second conductor are connected to each other is equal to or more than 0.1%.
    Type: Application
    Filed: August 11, 2020
    Publication date: September 29, 2022
    Applicant: HITACHI ASTEMO, LTD.
    Inventors: Takahiro MORI, Shin ONOSE, Kenichi NAKAYAMA, Yuta CHIBA, Masaaki SUZUKI
  • Patent number: 11454550
    Abstract: A temperature detection device includes a temperature detection diode, a comparator, and a forward current correction circuit. The comparator compares a forward voltage of the temperature detection diode with a threshold voltage and outputs a level signal corresponding to a temperature state. The forward current correction circuit includes a current mirror circuit including a first transistor and a second transistor, a third transistor, an operational amplifier and a variable resistor, and corrects a forward current of the temperature detection diode to change the forward voltage.
    Type: Grant
    Filed: February 22, 2019
    Date of Patent: September 27, 2022
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventor: Takahiro Mori
  • Patent number: 11415903
    Abstract: A polyester resin, including: (a) a constitutional unit derived from at least one tetravalent carboxylic acid selected from Compounds (A) and (B); a constitutional unit derived from a bisphenol A-alkylene oxide adduct; and a constitutional unit derived from an aliphatic alcohol having a boiling point of lower than or equal to 290° C.
    Type: Grant
    Filed: November 28, 2018
    Date of Patent: August 16, 2022
    Assignee: Mitsubishi Chemical Corporation
    Inventors: Takahiro Mori, Yoko Tamura, Asako Kaneko
  • Patent number: 11415167
    Abstract: A shaft member of an embodiment includes: a base material having a shaft shape and made of steel; a low phosphorus plating layer that is laminated on the base material, that includes phosphorus, and in which the phosphorus content is 4.5 mass % or less; and a base plating layer that is formed as an electrolytic nickel phosphorus plating layer or a high phosphorus plating layer laminated between the base material and the low phosphorus plating layer. It is thus possible to increase the strength of the shaft member and decrease the size of the shaft member.
    Type: Grant
    Filed: December 27, 2018
    Date of Patent: August 16, 2022
    Assignee: C. Uyemura & Co., Ltd.
    Inventors: Akihiko Kita, Seiya Ozawa, Takahiro Mori, Shoji Iguchi, Osamu Matsumoto
  • Publication number: 20220244588
    Abstract: The present invention provides a liquid crystal display that can reduce occurrence of quality problems and improve adhesive strength between substrates. The present invention is a liquid crystal display including a first substrate, a second substrate, and a seal. The first substrate includes a shift register monolithically formed on an insulating substrate, a plurality of bus lines, a first end, and a display region. The shift register includes a plurality of multistage-connected unit circuits and wiring connected to the plurality of unit circuits, and is arranged in a region between the first end and the display region. At least one of the unit circuits includes a clock terminal, an output terminal, an output transistor, a second transistor, and a bootstrap capacitor. The output transistor and the bootstrap capacitor are arranged in a region between the first end and one of the wiring and the second transistor.
    Type: Application
    Filed: April 20, 2022
    Publication date: August 4, 2022
    Inventor: Takahiro MORI
  • Publication number: 20220238489
    Abstract: A semiconductor device includes: a wiring board, a chip stack provided above the wiring board and including a first semiconductor chip; a second semiconductor chip provided between the wiring board and the first semiconductor chip; a first adhesive layer provided between the first semiconductor chip and the second semiconductor chip and on the second semiconductor chip; and a sealing insulation layer including a first part and a second part, the first part covering the chip stack, and the second part extending between the wiring board and the first semiconductor chip.
    Type: Application
    Filed: September 1, 2021
    Publication date: July 28, 2022
    Applicant: Kioxia Corporation
    Inventor: Takahiro MORI