Patents by Inventor Takahiro Mori

Takahiro Mori has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240240575
    Abstract: In one embodiment, a thermal energy storage power plant includes a thermal accumulator to accumulate thermal energy and heat a thermal medium with the thermal energy, and a steam generator to generate steam using the thermal medium. The plant further includes a first path to convey the thermal medium from the accumulator to the generator, and a second path to convey the thermal medium from the generator to the accumulator. The plant further includes an auxiliary module provided on the first path, and a bypass path to convey the thermal medium flowing through the second path to the auxiliary module by bypassing the accumulator, wherein the auxiliary module is supplied with a first thermal medium from the accumulator via the first path, supplied with a second thermal medium from the second path via the bypass path, and supplies a third thermal medium to the generator via the first path.
    Type: Application
    Filed: July 26, 2023
    Publication date: July 18, 2024
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ENERGY SYSTEMS & SOLUTIONS CORPORATION
    Inventors: Taufiq Hilal TAWAB, Toyohiro AKEBI, Jianda GOH, Hiromutsu MIKI, Keiko SHIMIZU, Masakazu SHIRAKAWA, Atsushi MATSUZAKI, Takahiro MORI, Hironori WATANABE, Yusuke FUKAMACHI, Syuntaro ABE, Chikako IWAKI
  • Publication number: 20240242360
    Abstract: An image acquisition unit 20 acquires a group of time-series images captured by a camera mounted at the observation vehicle. A speed difference estimation unit 24 estimates a speed difference between the target object and the observation vehicle by using a time-series change in a region representing the target object captured in the group of time-series images. The determination unit 28 determines whether the target object or the observation vehicle is in a dangerous state based on the speed difference.
    Type: Application
    Filed: May 17, 2021
    Publication date: July 18, 2024
    Applicant: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Kohei MORI, Kazuaki OBANA, Takahiro HATA, Yuki YOKOHATA, Aki HAYASHI
  • Publication number: 20240219941
    Abstract: In one embodiment, a heat storage power generation system includes a heater to heat first fluid, and a heat storage to be heated by the first fluid, and heat second fluid with heat stored in the heat storage. The system further includes a generator to generate electric power by using the second fluid, a heating controller to control heating of the first fluid by the heater, and a power generation controller to control power generation performed by the generator. The heating controller controls the heating of the first fluid, based on two or more limit values among a first limit value related to an amount of energy consumption by the heater, a second limit value related to temperature of the first fluid, a third limit value related to internal temperature of the heat storage, and a fourth limit value related to a change rate of the internal temperature.
    Type: Application
    Filed: November 30, 2021
    Publication date: July 4, 2024
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ENERGY SYSTEMS & SOLUTIONS CORPORATION
    Inventors: Atsushi HASHIMOTO, Keiko SHIMIZU, Masakazu SHIRAKAWA, Atsushi MATSUZAKI, Hiromutsu MIKI, Toyohiro AKEBI, Taufiq Hilal TAWAB, Takahiro MORI, Hironori WATANABE, Yusuke FUKAMACHI, Syuntaro ABE, Chikako IWAKI, Takashi MAWATARI
  • Patent number: 12009726
    Abstract: A vacuum pump (100) includes a rotor (22b), a rotor blade (13), and a magnetic-bearing-integrated stator (22a) including a coil. The rotor includes a pair of spacer members (29), a support member (27), a permanent magnet (26), and a protective ring (28), and in an axial direction of a rotary shaft (11), the support member has a mechanical strength higher than that of the protective ring.
    Type: Grant
    Filed: May 24, 2019
    Date of Patent: June 11, 2024
    Assignee: SHIMADZU CORPORATION
    Inventors: Takahiro Mori, Tsunehiro Inoue, Tomoo Ota, Masatsugu Takemoto, Yu Fu
  • Publication number: 20240186404
    Abstract: An object of the present invention is to provide a semiconductor element capable of being manufactured in small size, easily and at a low cost and obtaining a large on-current, a semiconductor integrated circuit, and a production method for the semiconductor element. A semiconductor element 10 has an element structure of a tunnel field-effect transistor. A channel part 13 formed of an indirect transition-type semiconductor is formed as a plate-like shaped portion having one end connected to a source part 14 and the other end connected to a drain part 15.
    Type: Application
    Filed: March 4, 2022
    Publication date: June 6, 2024
    Inventors: Kimihiko Kato, Takahiro Mori, Shota Iizuka, Takashi Nakayama, Sanghun Cho, Jyurai Kato
  • Publication number: 20240178317
    Abstract: In a p-type substrate region of a semiconductor substrate, an n-type source region, an n-type drain region, a p-type body region having an impurity concentration higher than an impurity concentration of the p-type substrate region, a p-type body contact region having an impurity concentration higher than the impurity concentration of the p-type body region, and an n-type drift region having an impurity concentration lower than an impurity concentration of the n-type drain region are formed. A gate electrode is formed on the semiconductor substrate via a gate dielectric film. The semiconductor substrate includes a first region and a second region that are alternately disposed in an extending direction of the gate electrode. A width of the p-type body region overlapping with the gate electrode in the second region is smaller than a width of the p-type body region overlapping with the gate electrode in the first region.
    Type: Application
    Filed: October 11, 2023
    Publication date: May 30, 2024
    Inventor: Takahiro MORI
  • Publication number: 20240165507
    Abstract: A recording medium and server provide a game that improves the interest in and taste of a battle event and increases the interest in and real enjoyment of the entire game. The recording medium provides a game including a predetermined battle event comprising at least one battle. In a battle event of this game, game contents are displayed in a first field, and a player selects therefrom a game content to be used for a battle with an enemy character. The first field is replenished with another game content alternative to the selected game content as needed so that the player can further select an additional game content therefrom.
    Type: Application
    Filed: February 1, 2024
    Publication date: May 23, 2024
    Applicant: GREE, Inc.
    Inventors: Yusuke HISAOKA, Makiko TAMURA, Yuji OKADA, Takahiro MORI, Mitsuo IWAO
  • Patent number: 11935872
    Abstract: A semiconductor device includes: a wiring board, a chip stack provided above the wiring board and including a first semiconductor chip; a second semiconductor chip provided between the wiring board and the first semiconductor chip; a first adhesive layer provided between the first semiconductor chip and the second semiconductor chip and on the second semiconductor chip; and a sealing insulation layer including a first part and a second part, the first part covering the chip stack, and the second part extending between the wiring board and the first semiconductor chip.
    Type: Grant
    Filed: September 1, 2021
    Date of Patent: March 19, 2024
    Assignee: Kioxia Corporation
    Inventor: Takahiro Mori
  • Patent number: 11925858
    Abstract: A recording medium and server provide a game that improves the interest in and taste of a battle event and increases the interest in and real enjoyment of the entire game. The recording medium provides a game including a predetermined battle event comprising at least one battle. In a battle event of this game, game contents are displayed in a first field, and a player selects therefrom a game content to be used for a battle with an enemy character. The first field is replenished with another game content alternative to the selected game content as needed so that the player can further select an additional game content therefrom.
    Type: Grant
    Filed: February 16, 2022
    Date of Patent: March 12, 2024
    Assignee: GREE, Inc.
    Inventors: Yusuke Hisaoka, Makiko Tamura, Yuji Okada, Takahiro Mori, Mitsuo Iwao
  • Publication number: 20240077126
    Abstract: The present invention causes a low-rigidity disk to be supported by a backup disk (a deformation prevention portion), and therefore can prevent the low-rigidity disk from being deformed due to an inflow of hydraulic oil to between the low-rigidity disk and a disk adjacent thereto according to an increase in a pressure in a cylinder upper chamber during an extension stroke, and can improve the durability of the low-rigidity disk.
    Type: Application
    Filed: February 1, 2022
    Publication date: March 7, 2024
    Inventors: Takahiro MORI, Osamu YUNO, Takao NAKADATE
  • Publication number: 20240069390
    Abstract: The present invention provides a liquid crystal display that can reduce occurrence of quality problems and improve adhesive strength between substrates. The present invention is a liquid crystal display including a first substrate, a second substrate, and a seal. The first substrate includes a shift register monolithically formed on an insulating substrate, a plurality of bus lines, a first end, and a display region. The shift register includes a plurality of multistage-connected unit circuits and wiring connected to the plurality of unit circuits, and is arranged in a region between the first end and the display region. At least one of the unit circuits includes a clock terminal, an output terminal, an output transistor, a second transistor, and a bootstrap capacitor. The output transistor and the bootstrap capacitor are arranged in a region between the first end and one of the wiring and the second transistor.
    Type: Application
    Filed: November 6, 2023
    Publication date: February 29, 2024
    Inventor: Takahiro MORI
  • Patent number: 11901199
    Abstract: A pressurizing device includes: a mounting base; an upper mold which pressurizes the target object mounted on the mounting base from above; a heating lower mold which is a lower mold heated in advance by a heater, and which heats the target object under pressure by sandwiching the mounting base with the upper mold; a cooling lower mold which is a lower mold cooled in advance by a cooler, and which cools the target object under pressure by sandwiching the mounting base with the upper mold; and a control device which switches the lower mold that contributes to the pressurization of the target object to the heating lower mold or the cooling lower mold in accordance with the status of progress of the pressurization process for the target object.
    Type: Grant
    Filed: September 17, 2020
    Date of Patent: February 13, 2024
    Assignee: NIKKISO CO., LTD.
    Inventors: Takahiro Mori, Satoshi Idesako
  • Patent number: 11851428
    Abstract: Disclosed is a compound of formula (I): wherein all symbols are defined in the description. Also disclosed are pharmaceutical compositions comprising the compounds, methods of making the compounds, kits comprising the compounds, and methods of using the compounds, compositions and kits for treatment of disorders associated with TREK-1, TREK-2 or both TREK-1 and TREK-2 dysfunction in a mammal.
    Type: Grant
    Filed: May 24, 2021
    Date of Patent: December 26, 2023
    Assignees: ONO PHARMACEUTICAL CO., LTD., VANDERBILT UNIVERSITY
    Inventors: Craig W. Lindsley, Joshua M. Wieting, Kevin M. Mcgowan, Jerod S. Denton, Kentaro Yashiro, Haruto Kurata, Yoko Sekioka, Takahiro Mori, Yuzo Iwaki
  • Patent number: 11852924
    Abstract: The present invention provides a liquid crystal display that can reduce occurrence of quality problems and improve adhesive strength between substrates. The present invention is a liquid crystal display including a first substrate, a second substrate, and a seal. The first substrate includes a shift register monolithically formed on an insulating substrate, a plurality of bus lines, a first end, and a display region. The shift register includes a plurality of multistage-connected unit circuits and wiring connected to the plurality of unit circuits, and is arranged in a region between the first end and the display region. At least one of the unit circuits includes a clock terminal, an output terminal, an output transistor, a second transistor, and a bootstrap capacitor. The output transistor and the bootstrap capacitor are arranged in a region between the first end and one of the wiring and the second transistor.
    Type: Grant
    Filed: February 13, 2023
    Date of Patent: December 26, 2023
    Assignee: SHARP KABUSHIKI KAISHA
    Inventor: Takahiro Mori
  • Publication number: 20230205019
    Abstract: The present invention provides a liquid crystal display that can reduce occurrence of quality problems and improve adhesive strength between substrates. The present invention is a liquid crystal display including a first substrate, a second substrate, and a seal. The first substrate includes a shift register monolithically formed on an insulating substrate, a plurality of bus lines, a first end, and a display region. The shift register includes a plurality of multistage-connected unit circuits and wiring connected to the plurality of unit circuits, and is arranged in a region between the first end and the display region. At least one of the unit circuits includes a clock terminal, an output terminal, an output transistor, a second transistor, and a bootstrap capacitor. The output transistor and the bootstrap capacitor are arranged in a region between the first end and one of the wiring and the second transistor.
    Type: Application
    Filed: February 13, 2023
    Publication date: June 29, 2023
    Inventor: Takahiro MORI
  • Publication number: 20230200261
    Abstract: The invention provides a spin qubit-type semiconductor device capable of achieving both high-speed spin manipulation and high integration, and an integrated circuit for the spin qubit-type semiconductor device.
    Type: Application
    Filed: November 29, 2022
    Publication date: June 22, 2023
    Inventors: Shota Iizuka, Takahiro Mori, Kimihiko Kato, Atsushi Yagishita, Tetsuya Ueda
  • Publication number: 20230180633
    Abstract: To suppress a leakage current caused by a gate of a tunnel field effect transistor included in a silicon spin quantum bit device, the silicon spin quantum bit device is provided including a tunnel field effect transistor having a gate, a source, and a drain, a quantum gate operation mechanism for spin control, which is provided under the tunnel field effect transistor, and an inter-qubit coupler for coupling a channel of the tunnel field effect transistor with a channel of a tunnel field effect transistor included in another quantum bit device. Further, the gate is made wider in width than the channel and is partly formed on the inter-qubit coupler.
    Type: Application
    Filed: April 14, 2021
    Publication date: June 8, 2023
    Inventors: Takahiro Mori, Atsushi Yagishita
  • Publication number: 20230146397
    Abstract: In a LDMOSFET 100, an “STI structure 11” provided in a drain region including a high concentration drain region 10 and a drift region 12 including the high concentration drain region 10 has a slit region 11A extending in a x-direction, and in plan view, the “STI structure 11” is interposed between the slit region 11A and the high concentration drain region 10.
    Type: Application
    Filed: September 14, 2022
    Publication date: May 11, 2023
    Inventor: Takahiro MORI
  • Publication number: 20230069864
    Abstract: There is formed a semiconductor device including, as the uppermost-layer wiring of the multilayer wiring layer, a plurality of first wirings, a second wiring, a plurality of first dummy wirings, a second dummy wiring, and a passivation film covering these wirings. The passivation film is patterned by etching with a photoresist film used as a mask, the plurality of first wirings and the plurality of first dummy wirings close thereto are densely formed, and the second dummy wiring is formed so as to surround a periphery of the second wiring sparsely formed directly above an analog circuit portion.
    Type: Application
    Filed: August 24, 2022
    Publication date: March 9, 2023
    Inventors: Yuki MURAYAMA, Makoto KOSHIMIZU, Takahiro MORI, Junjiro SAKAI, Satoshi IIDA
  • Patent number: 11598992
    Abstract: The present invention provides a liquid crystal display that can reduce occurrence of quality problems and improve adhesive strength between substrates. The present invention is a liquid crystal display including a first substrate, a second substrate, and a seal. The first substrate includes a shift register monolithically formed on an insulating substrate, a plurality of bus lines, a first end, and a display region. The shift register includes a plurality of multistage-connected unit circuits and wiring connected to the plurality of unit circuits, and is arranged in a region between the first end and the display region. At least one of the unit circuits includes a clock terminal, an output terminal, an output transistor, a second transistor, and a bootstrap capacitor. The output transistor and the bootstrap capacitor are arranged in a region between the first end and one of the wiring and the second transistor.
    Type: Grant
    Filed: April 20, 2022
    Date of Patent: March 7, 2023
    Assignee: SHARP KABUSHIKI KAISHA
    Inventor: Takahiro Mori