Patents by Inventor Takahiro Mori

Takahiro Mori has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11046683
    Abstract: Disclosed is a compound of formula (I): wherein all symbols are defined in the description. Also disclosed are pharmaceutical compositions comprising the compounds, methods of making the compounds, kits comprising the compounds, and methods of using the compounds, compositions and kits for treatment of disorders associated with TREK-1, TREK-2 or both TREK-1 and TREK-2 dysfunction in a mammal.
    Type: Grant
    Filed: December 14, 2017
    Date of Patent: June 29, 2021
    Assignees: ONO PHARMACEUTICAL CO., LTD., VANDERBILT UNIVERSITY
    Inventors: Craig W Lindsley, Joshua M. Wieting, Kevin M. McGowan, Jerod S. Denton, Kentaro Yashiro, Haruto Kurata, Yoko Sekioka, Takahiro Mori, Yuzo Iwaki
  • Patent number: 11038051
    Abstract: A semiconductor device includes a semiconductor substrate including a first epitaxial layer having a first surface and a second surface, a second epitaxial layer, a buried region formed across the first epitaxial layer and the second epitaxial layer, and a gate electrode. The second epitaxial layer includes a drain region, a source region, a body region, a drift region, a first region, and a second region. The first region is formed below at least the drain region. The second region has first and second ends in a channel length direction. The first end is located between the body region and the drain region in the channel length direction. The second region extends from the first end toward the second end such that the second end extends below at least the source region. An impurity concentration of the second region is greater than an impurity concentration of the first region.
    Type: Grant
    Filed: February 5, 2020
    Date of Patent: June 15, 2021
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventor: Takahiro Mori
  • Patent number: 11037790
    Abstract: A pressurizing device includes: a mounting base; an upper mold which pressurizes the target object mounted on the mounting base from above; a heating lower mold which is a lower mold heated in advance by a heater, and which heats the target object under pressure by sandwiching the mounting base with the upper mold; a cooling lower mold which is a lower mold cooled in advance by a cooler, and which cools the target object under pressure by sandwiching the mounting base with the upper mold; and a control device which switches the lower mold that contributes to the pressurization of the target object to the heating lower mold or the cooling lower mold in accordance with the status of progress of the pressurization process for the target object.
    Type: Grant
    Filed: February 14, 2017
    Date of Patent: June 15, 2021
    Assignee: NIKKISO CO., LTD.
    Inventors: Takahiro Mori, Satoshi Idesako
  • Patent number: 11001044
    Abstract: A blade includes an edge to be pressed against an end portion of a carrier film to fold the end portion upwards from a sheet. A clamp mechanism peels the carrier film off from the sheet by moving while clamping the upwardly folded end portion of the carrier film.
    Type: Grant
    Filed: December 5, 2019
    Date of Patent: May 11, 2021
    Assignee: NIKKISO CO., LTD.
    Inventors: Toru Makino, Tomoyo Sawada, Takahiro Mori
  • Patent number: 10985153
    Abstract: According to one embodiment, a semiconductor device includes: a printed wiring substrate that includes a substrate, a wiring layer on the substrate, and a first insulating layer on the wiring layer. The wiring layer includes a connection terminal and a wiring electrically connected to the connection terminal. The first insulating layer includes an opening that exposes at least a portion of the connection terminal and at least a portion of the wiring, and at least one of a protrusion portion or a recess portion, provided along an edge of the opening, that overlaps the wiring. The semiconductor device includes a semiconductor chip mounted on the printed wiring substrate; a bonding wire that electrically connects the connection terminal and the semiconductor chip; and a second insulating layer that covers the semiconductor chip, the bonding wire, and the opening.
    Type: Grant
    Filed: September 3, 2019
    Date of Patent: April 20, 2021
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventor: Takahiro Mori
  • Patent number: 10974141
    Abstract: A recording medium and server provide a game that improves the interest in and taste of a battle event and increases the interest in and real enjoyment of the entire game. The recording medium provides a game including a predetermined battle event comprising at least one battle. In a battle event of this game, game contents are displayed in a first field, and a player selects therefrom a game content to be used for a battle with an enemy character. The first field is replenished with another game content alternative to the selected game content as needed so that the player can further select an additional game content therefrom.
    Type: Grant
    Filed: May 31, 2019
    Date of Patent: April 13, 2021
    Assignee: GREE, Inc.
    Inventors: Yusuke Hisaoka, Makiko Tamura, Yuji Okada, Takahiro Mori, Mitsuo Iwao
  • Patent number: 10960305
    Abstract: A recording medium and server provide a game that improves the interest in and taste of a battle event and increases the interest in and real enjoyment of the entire game. The recording medium provides a game including a predetermined battle event comprising at least one battle. In a battle event of this game, game contents are displayed in a first field, and a player selects therefrom a game content to be used for a battle with an enemy character. The first field is replenished with another game content alternative to the selected game content as needed so that the player can further select an additional game content therefrom.
    Type: Grant
    Filed: April 3, 2018
    Date of Patent: March 30, 2021
    Assignee: GREE, Inc.
    Inventors: Yusuke Hisaoka, Makiko Tamura, Yuji Okada, Takahiro Mori, Mitsuo Iwao
  • Publication number: 20210072575
    Abstract: The present invention provides a liquid crystal display that can reduce occurrence of quality problems and improve adhesive strength between substrates. The present invention is a liquid crystal display including a first substrate, a second substrate, and a seal. The first substrate includes a shift register monolithically formed on an insulating substrate, a plurality of bus lines, a first end, and a display region. The shift register includes a plurality of multistage-connected unit circuits and wiring connected to the plurality of unit circuits, and is arranged in a region between the first end and the display region. At least one of the unit circuits includes a clock terminal, an output terminal, an output transistor, a second transistor, and a bootstrap capacitor. The output transistor and the bootstrap capacitor are arranged in a region between the first end and one of the wiring and the second transistor.
    Type: Application
    Filed: November 16, 2020
    Publication date: March 11, 2021
    Inventor: Takahiro MORI
  • Patent number: 10920623
    Abstract: In one embodiment, a plant control apparatus controls a power plant, which includes a gas turbine, a generator driven by the gas turbine, an exhaust heat recovering boiler to generate first steam using heat of exhaust gas from the gas turbine, a steam turbine driven by the first steam, and a clutch to connect a first shaft connected to the gas turbine and generator with a second shaft connected to the steam turbine. The apparatus includes a starting module to start the gas turbine and generator while holding the steam turbine in a stop state, when the clutch is in a released state. The apparatus further includes a warming module to warm the steam turbine by supplying second steam from equipment different from the boiler to the steam turbine in parallel with the starting of the gas turbine and generator, when the clutch is in a released state.
    Type: Grant
    Filed: April 25, 2019
    Date of Patent: February 16, 2021
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ENERGY SYSTEMS & SOLUTIONS CORPORATION
    Inventors: Kanako Nagayama, Masayuki Tobo, Yuta Iwata, Shoji Kaneko, Takahiro Mori
  • Publication number: 20210032756
    Abstract: A shaft member of an embodiment includes: a base material having a shaft shape and made of steel; a low phosphorus plating layer that is laminated on the base material, that includes phosphorus, and in which the phosphorus content is 4.5 mass % or less; and a base plating layer that is formed as an electrolytic nickel phosphorus plating layer or a high phosphorus plating layer laminated between the base material and the low phosphorus plating layer. It is thus possible to increase the strength of the shaft member and decrease the size of the shaft member.
    Type: Application
    Filed: December 27, 2018
    Publication date: February 4, 2021
    Applicants: AISIN AW CO., LTD., C. Uyemura & Co., Ltd.
    Inventors: Akihiko KITA, Seiya OZAWA, Takahiro MORI, Shoji IGUCHI, Osamu MATSUMOTO
  • Patent number: 10910492
    Abstract: A semiconductor device which can secure a high breakdown voltage and to which a simplified manufacturing process is applicable and a method for manufacturing the semiconductor device are provided. An n+ buried region has a floating potential. An n-type body region is located on a first surface side of the n+ buried region. A p+ source region is located in the first surface and forms a p-n junction with the n-type body region. A p+ drain region is located in the first surface spacedly from the p+ source region. A p-type impurity region PIR is located between the n+ buried region and the n-type body region and isolates the n+ buried region and the n-type body region from each other.
    Type: Grant
    Filed: July 16, 2018
    Date of Patent: February 2, 2021
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Hiroki Fujii, Atsushi Sakai, Takahiro Mori
  • Patent number: 10911686
    Abstract: A zoom control device includes: a zoom magnification ratio change speed setting unit that sets a main image zoom magnification ratio change speed and a monitoring image zoom magnification ratio change speed according to a zoom operation by a user; and a zoom control unit that conducts a zoom control on a main image so that a zoom magnification ratio changes according to the main image zoom magnification ratio change speed, and conducts a zoom control on a monitoring image so that the zoom magnification ratio changes according to the monitoring image zoom magnification ratio change speed. The zoom magnification ratio change speed setting unit is configured to set the main image zoom magnification ratio change speed by smoothing the monitoring image zoom magnification ratio change speed.
    Type: Grant
    Filed: October 19, 2018
    Date of Patent: February 2, 2021
    Assignee: Sony Corporation
    Inventors: Masafumi Wakazono, Takahiro Mori, Kouji Yamamoto, Masakazu Ebihara, Masaya Kinoshita, Yuki Ono
  • Publication number: 20210028018
    Abstract: A pressurizing device includes: a mounting base; an upper mold which pressurizes the target object mounted on the mounting base from above; a heating lower mold which is a lower mold heated in advance by a heater, and which heats the target object under pressure by sandwiching the mounting base with the upper mold; a cooling lower mold which is a lower mold cooled in advance by a cooler, and which cools the target object under pressure by sandwiching the mounting base with the upper mold; and a control device which switches the lower mold that contributes to the pressurization of the target object to the heating lower mold or the cooling lower mold in accordance with the status of progress of the pressurization process for the target object.
    Type: Application
    Filed: September 17, 2020
    Publication date: January 28, 2021
    Applicant: NIKKISO CO., LTD.
    Inventors: Takahiro MORI, Satoshi IDESAKO
  • Patent number: 10898862
    Abstract: This repair method for a hollow fiber membrane module is a method for repairing a leaking section occurring in the hollow fiber membrane module, the repair method having a repair step for using a repair adhesive that hardens due to a composite curing function that comprises a moisture-curing function and a photo-curing function, to repair the leaking section.
    Type: Grant
    Filed: June 15, 2012
    Date of Patent: January 26, 2021
    Assignee: Mitsubishi Chemical Corporation
    Inventors: Noritaka Shibata, Takashi Hinenoya, Takahiro Mori, Toshinori Tanaka
  • Publication number: 20210013316
    Abstract: [Problem] To improve the drain current ON/OFF ratio characteristics. [Solution] A tunnel field-effect transistor 10 of the present invention is such that, when the gate length is denoted by LG and the extension distance of a source region 1 extended toward a drain region 3 from a position in the source region 1 is denoted by LOV, LTG expressed in Formula (1) below as the shortest distance between the position of an extension end of the source region 1 based on a drain-side reference position as the side face position of a gate electrode 6a, 6b closest to the drain region 3, and the position in the semiconductor layer 4 opposite to the drain-side reference position in the height direction of the gate electrode 6a, 6b satisfies a condition of Inequality (2) below. Note that lt_OFF in Inequality (2) denotes a shortest tunnel distance over which carriers move from the source region to a channel region through a tunnel junction surface in an OFF state of the tunnel field-effect transistor.
    Type: Application
    Filed: March 22, 2019
    Publication date: January 14, 2021
    Inventors: Hidehiro Asai, Takahiro Mori
  • Patent number: 10838259
    Abstract: The present invention provides a liquid crystal display that can reduce occurrence of quality problems and improve adhesive strength between substrates. The present invention is a liquid crystal display including a first substrate, a second substrate, and a seal. The first substrate includes a shift register monolithically formed on an insulating substrate, a plurality of bus lines, a first end, and a display region. The shift register includes a plurality of multistage-connected unit circuits and wiring connected to the plurality of unit circuits, and is arranged in a region between the first end and the display region. At least one of the unit circuits includes a clock terminal, an output terminal, an output transistor, a second transistor, and a bootstrap capacitor. The output transistor and the bootstrap capacitor are arranged in a region between the first end and one of the wiring and the second transistor.
    Type: Grant
    Filed: May 9, 2013
    Date of Patent: November 17, 2020
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Takahiro Mori
  • Patent number: 10808567
    Abstract: In one embodiment, a plant control apparatus controls a power plant that includes a combustor to burn fuel with oxygen introduced from an inlet guide vane to generate gas, a gas turbine driven by the gas from the combustor, a heat recovery steam generator to generate steam using heat of an exhaust gas from the gas turbine, and a steam turbine driven by the steam from the heat recovery steam generator. The apparatus controls an angle of the inlet guide vane before a start of the steam turbine to a first angle, controls the angle of the inlet guide vane after the start of the steam turbine to a second angle larger than the first angle, and reduce the angle of the inlet guide vane from the second angle to the first angle or more during the predetermined period.
    Type: Grant
    Filed: July 18, 2018
    Date of Patent: October 20, 2020
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ENERGY SYSTEMS & SOLUTIONS CORPORATION
    Inventors: Mizu Kajihara, Masayuki Tobou, Takahiro Mori
  • Publication number: 20200306628
    Abstract: A recording medium and server provide a game that improves the interest in and taste of a battle event and increases the interest in and real enjoyment of the entire game. The recording medium provides a game including a predetermined battle event comprising at least one battle. In a battle event of this game, game contents are displayed in a first field, and a player selects therefrom a game content to be used for a battle with an enemy character. The first field is replenished with another game content alternative to the selected game content as needed so that the player can further select an additional game content therefrom.
    Type: Application
    Filed: June 16, 2020
    Publication date: October 1, 2020
    Inventors: Yusuke Hisaoka, Makiko Tamura, Yuji Okada, Takahiro Mori, Mitsuo Iwao
  • Publication number: 20200294982
    Abstract: According to one embodiment, a semiconductor device includes: a printed wiring substrate that includes a substrate, a wiring layer on the substrate, and a first insulating layer on the wiring layer. The wiring layer includes a connection terminal and a wiring electrically connected to the connection terminal. The first insulating layer includes an opening that exposes at least a portion of the connection terminal and at least a portion of the wiring, and at least one of a protrusion portion or a recess portion, provided along an edge of the opening, that overlaps the wiring. The semiconductor device includes a semiconductor chip mounted on the printed wiring substrate; a bonding wire that electrically connects the connection terminal and the semiconductor chip; and a second insulating layer that covers the semiconductor chip, the bonding wire, and the opening.
    Type: Application
    Filed: September 3, 2019
    Publication date: September 17, 2020
    Applicant: TOSHIBA MEMORY CORPORATION
    Inventor: Takahiro MORI
  • Patent number: 10756728
    Abstract: An insulated gate device drive apparatus for driving an insulated gate device by using a charging current outputted from a totem-pole output circuit constituted by a high-side output transistor and a low-side output transistor. The insulated gate device drive apparatus includes a charging current correction circuit configured to perform correction to increase the charging current that is decreased by an increased voltage drop of high-side wiring resistance between a power supply and the high-side output transistor.
    Type: Grant
    Filed: November 29, 2019
    Date of Patent: August 25, 2020
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Takahiro Mori, Motomitsu Iwamoto