Patents by Inventor Takahiro Mori

Takahiro Mori has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170077092
    Abstract: The present invention provides an integrated circuit formed of tunneling field-effect transistors that includes a first tunneling field-effect transistor in which one of a first P-type region and a first N-type region operates as a source region and the other one operates as a drain region; and a second tunneling field-effect transistor in which one of a second P-type region and a second N-type region operates as a source region and the other one operates as a drain region, the first and second tunneling field-effect transistors being formed in one active region to have the same polarity, the first P-type region and the second N-type region being formed adjacently, the adjacent first P-type region and second N-type region being electrically connected through metal semiconductor alloy film.
    Type: Application
    Filed: February 20, 2015
    Publication date: March 16, 2017
    Applicant: NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY
    Inventor: Takahiro MORI
  • Patent number: 9590612
    Abstract: A drive circuit includes: a constant current circuit configured to supply a constant current to a gate of the voltage-controlled device, and to turn on the voltage-controlled device; a discharge circuit configured to supply a discharge current between the gate and an emitter of the voltage-controlled device, and to turn off the voltage-controlled device; a switch circuit configured to operate one of the constant current circuit or the discharge circuit depending on a drive signal, and to turn on or turn off the voltage-controlled device; a current instruction value generation circuit configured to generate and output at least a current instruction value that sets an output current from the constant current circuit; and a current control circuit configured to control the output current from the constant current circuit based on the current instruction value generated by the current instruction value generation circuit.
    Type: Grant
    Filed: June 20, 2016
    Date of Patent: March 7, 2017
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventor: Takahiro Mori
  • Publication number: 20170062608
    Abstract: To provide an LDMOS semiconductor device having improved properties. A semiconductor device having a source region and a drain region, a channel formation region, a drain insulating region between the channel formation region and the drain region, and a gate electrode is provided. The drain insulating region has a slit exposing therefrom an active region and this slit is placed on the side of the channel formation region with respect to the center of the drain insulating region. This active region is formed as an n type semiconductor region. Such a configuration enables relaxation of an electric field of the drain insulating region on the side of the channel formation region (on the side of the source region). The generation number of hot carriers (hot electrons, hot holes) can therefore be reduced. As a result, a semiconductor device having improved HCI-related properties can be obtained.
    Type: Application
    Filed: June 20, 2016
    Publication date: March 2, 2017
    Inventor: Takahiro MORI
  • Publication number: 20170045482
    Abstract: A feedback control apparatus includes: a detector configured to detect an output value based on a controlled object; a P control circuit including a differential amplifier circuit and an analog circuit, the differential amplifier circuit being configured to receive a detection value of the detector and a target value, the analog circuit being configured to output a P control component VP to an output of the differential amplifier circuit; an I control unit configured to output an I control component VI by integrating a deviation of the detection value from the target value by digital processing; and a driver element configured to be driven based on the P control component VP from the P control circuit and the I control component VI from the I control unit to control the controlled object.
    Type: Application
    Filed: December 11, 2014
    Publication date: February 16, 2017
    Applicant: SHIMADZU CORPORATION
    Inventors: Hiroomi GOTO, Tsunehiro INOUE, Takahiro MORI
  • Publication number: 20170048447
    Abstract: There is provided an image processing apparatus including a presentation controller configured to control presentation of degrees of focus in a target image corresponding to an image to be processed on the basis of a first determination result corresponding to a determination result of a degree of focus in a pixel unit in the target image and a second determination result corresponding to a determination result of a degree of focus in a region unit in the target image.
    Type: Application
    Filed: January 21, 2015
    Publication date: February 16, 2017
    Inventors: TAKAHIRO MORI, SATOSHI AKAGAWA, TAKUJI HIGASHIYAMA, MASAHIRO TAKAHASHI, LYO TAKAOKA, MASAFUMI WAKAZONO
  • Publication number: 20170025441
    Abstract: A display device according to one aspect of the present invention includes a plurality of scanning lines (10a) and a plurality of signal lines (11a); a plurality of pixel thin-film transistors; a common scanning interconnect (10b); and a plurality of protective diodes (6) (protective elements). At least a part of a plurality of connecting interconnects that electrically connect the common scanning interconnect with the plurality of protective diodes are constituted by connecting interconnects (11e) on the same layer as the signal lines. The surface area of overlapping parts between a plurality of semiconductor layers of thin-film transistors and the scanning lines and the surface area overlapping parts between the plurality of semiconductor layers and the common scanning interconnect are substantially equal.
    Type: Application
    Filed: April 6, 2015
    Publication date: January 26, 2017
    Inventor: Takahiro MORI
  • Publication number: 20170025532
    Abstract: An object of the present invention is to further improve electric characteristics such as ON-resistance or an ON-breakdown voltage in a semiconductor device having a lateral MOS transistor. In a semiconductor device having a lateral MOS transistor, a buried electrode is formed at a part of an isolation insulating film located between a drain region and a gate electrode. The buried electrode includes a buried part. The buried part is formed from the surface of the isolation insulating film up to a depth corresponding to a thickness thinner than that of the isolation insulating film. The buried electrode is electrically coupled to the drain region.
    Type: Application
    Filed: June 3, 2016
    Publication date: January 26, 2017
    Applicant: Renesas Electronics Corporation
    Inventors: Takahiro MORI, Hiroki FUJII
  • Patent number: 9520576
    Abstract: A gas barrier film (10) that comprises a gas barrier layer (14), which is obtained by irradiating a layer that contains a polysilazane with vacuum ultraviolet light, on a base (11) is formed to contain a compound (A) that satisfies all of the conditions (a), (b) and (c) described below in an amount within the range from 1% by mass to 40% by mass (inclusive) relative to the total mass of the gas barrier layer. (a) The compound (A) has an Si—O bond and an organic group that is directly bonded to Si. (b) The compound (A) has an Si—H group or an Si—OH group. (c) The compound (A) has a molecular weight of from 90 to 1,200 (inclusive).
    Type: Grant
    Filed: November 16, 2012
    Date of Patent: December 13, 2016
    Assignee: KONICA MINOLTA, INC.
    Inventor: Takahiro Mori
  • Patent number: 9472825
    Abstract: A lamination device 30 includes a first charger 40 for emitting charged particles toward an uppermost surface of a battery stack 10 of a positive electrode sheet 12, a negative electrode sheet 14, and a separator sheet 16 that are stacked on a stacking stage 32. As a result of the emission of charged particles, the battery stack 10 and one of a positive electrode sheet 12, a negative electrode sheet 14, and a separator sheet 16 that is to be stacked on the stack 10 are electrostatically attracted to each other.
    Type: Grant
    Filed: June 14, 2013
    Date of Patent: October 18, 2016
    Assignee: Nikkiso Co., Ltd.
    Inventors: Takahiro Mori, Tomoyo Sawada
  • Publication number: 20160301406
    Abstract: A drive circuit includes: a constant current circuit configured to supply a constant current to a gate of the voltage-controlled device, and to turn on the voltage-controlled device; a discharge circuit configured to supply a discharge current between the gate and an emitter of the voltage-controlled device, and to turn off the voltage-controlled device; a switch circuit configured to operate one of the constant current circuit or the discharge circuit depending on a drive signal, and to turn on or turn off the voltage-controlled device; a current instruction value generation circuit configured to generate and output at least a current instruction value that sets an output current from the constant current circuit; and a current control circuit configured to control the output current from the constant current circuit based on the current instruction value generated by the current instruction value generation circuit.
    Type: Application
    Filed: June 20, 2016
    Publication date: October 13, 2016
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventor: Takahiro MORI
  • Patent number: 9457376
    Abstract: Disclosed is a method of manufacturing a gas barrier film possessing a substrate in the form of a belt and provided thereon, a gas barrier layer containing silicon oxide, possessing a coating step in which a coating solution comprising a polysilazane compound is coated on the substrate to form a coating film, and a UV radiation exposure step in which the coating film is exposed to the vacuum UV radiation emitted from the plural light sources facing the substrate while moving the substrate on which the coating film is formed relatively to the plural light sources, the plural light sources each exhibiting even illuminance along a width direction of the substrate to form a gas barrier layer, and provided is a method of manufacturing a gas barrier film by which the gas barrier film suitable for production coupled with roll-to-roll system, exhibiting excellent gas barrier performance can be prepared.
    Type: Grant
    Filed: June 23, 2011
    Date of Patent: October 4, 2016
    Assignee: KONICA MINOLTA HOLDINGS, INC.
    Inventor: Takahiro Mori
  • Publication number: 20160284801
    Abstract: A semiconductor substrate has a recessed portion and a recessed portion in a main surface. An n+ source region and an n+ drain region sandwich the recessed portion and the recessed portion in the main surface. A p? epitaxial region and a p-type well region serving as a channel formation region are formed in the main surface between the n+ source region and the recessed portion. A gate electrode layer is formed on the channel region with a gate insulation film interposed therebetween, and extends onto an element isolation insulation film in the recessed portion. The recessed portion and the recessed portion are arranged to be adjacent to each other to sandwich a substrate protruding portion protruding toward the main surface side with respect to a bottom portion of each of the recessed portion and the recessed portion.
    Type: Application
    Filed: November 27, 2013
    Publication date: September 29, 2016
    Inventor: Takahiro Mori
  • Patent number: 9444009
    Abstract: A group-III nitride compound semiconductor light emitting element includes a substrate that has a main face on which an concave and convex portion is formed, a group-III nitride compound semiconductor layer that is formed on the main face of the substrate, and a clearance that is formed between the substrate and the group-III nitride compound semiconductor layer at a first region of the semiconductor light emitting element. In the first region, a portion of the group-III nitride compound semiconductor layer and a portion of the clearance are disposed in a concave of the concave and convex portion on a section through two adjacent top portions of the concave and convex portion and a bottom portion located between the adjacent top portions.
    Type: Grant
    Filed: September 16, 2013
    Date of Patent: September 13, 2016
    Assignee: TOYODA GOSEI CO., LTD.
    Inventors: Masao Kamiya, Koichi Goshonoo, Shingo Totani, Takashi Kawai, Takahiro Mori, Koji Hirata
  • Publication number: 20160211325
    Abstract: The present invention provides a semiconductor element that can be manufactured easily at a low cost, can obtain a high tunneling current, and has an excellent operating characteristic, a method for manufacturing the same, and a semiconductor integrated circuit including the semiconductor element. The semiconductor element of the present invention is characterized in that the whole or a part of a tunnel junction is constituted by a semiconductor region made of an indirect-transition semiconductor containing isoelectronic-trap-forming impurities.
    Type: Application
    Filed: July 30, 2014
    Publication date: July 21, 2016
    Inventor: Takahiro MORI
  • Publication number: 20160209377
    Abstract: A pressure control valve includes a pressure control block including a bore hole that is bored perpendicularly from one outer surface, and two internal channel openings of whose end portions are at a bottom surface of the bore hole, a valve body having elasticity and covering the bottom surface of the bore hole, a sealing member for pressing a portion of the valve body against the bottom surface of the bore hole, the portion abutting a peripheral edge portion of a portion of the bottom surface where the openings are provided, and an actuator for driving a portion, of the valve body, abutting the portion where the openings are provided in a direction perpendicular to the bottom surface of the bore hole.
    Type: Application
    Filed: September 2, 2013
    Publication date: July 21, 2016
    Applicant: SHIMADZU CORPORATION
    Inventors: Hiroomi Goto, Tsunehiro Inoue, Takahiro Mori, Hirohisa Abe
  • Patent number: 9362524
    Abstract: An object of the present invention is to provide a method for producing a gas barrier film, capable of producing a gas barrier film which has production suitability in a roll-to-roll manner and is excellent in productivity and in gas barrier performance.
    Type: Grant
    Filed: December 7, 2011
    Date of Patent: June 7, 2016
    Assignee: KONICA MINOLTA, INC.
    Inventor: Takahiro Mori
  • Patent number: 9362706
    Abstract: A laser machine includes a laser oscillator, a cooler for cooling the laser oscillator, and a control unit for controlling the laser oscillator and the cooler. The control unit includes a controller that stops base discharge of the laser oscillator at a time when a specified time has elapsed from a stop of laser light emission by the laser oscillator. According to the laser machine, since base discharge of the laser oscillator is stopped after the specified time has elapsed from the stop of laser light emission, wasteful energy (power) consumption of the laser oscillator in a standby state can be restricted.
    Type: Grant
    Filed: September 5, 2011
    Date of Patent: June 7, 2016
    Assignee: AMADA COMPANY, LIMITED
    Inventors: Akihiko Sugiyama, Yoshinao Miyamoto, Takahiro Mori
  • Patent number: 9356580
    Abstract: A drive circuit includes a constant current circuit which supplies a constant current to the gate of an IGBT and on-operates the IGBT; a discharge circuit which grounds the gate of the IGBT and off-operates the IGBT; and a switch circuit which operates one of the constant current circuit or discharge circuit in accordance with a control signal and turns on or off the IGBT. In particular, the drive circuit includes a current detection circuit which detects a current flowing through the IGBT when the IGBT is turned on; and a current regulation circuit which feeds the current detected by the current detection circuit back to the constant current circuit and controls an output current of the constant current circuit in accordance with the turn-on characteristics of the IGBT.
    Type: Grant
    Filed: March 4, 2015
    Date of Patent: May 31, 2016
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventor: Takahiro Mori
  • Publication number: 20160149159
    Abstract: The present invention provides a gas barrier film having high gas barrier properties and also having high durability even under harsh, high-temperature, high-humidity conditions. The gas barrier film includes a substrate and at least one gas barrier layer on the substrate, wherein the gas barrier layer includes at least one gas barrier layer A having a chemical composition of chemical formula (1): SiAlwOxNyCz, wherein w, x, y, and z are the elemental ratios of aluminum to silicon, oxygen to silicon, nitrogen to silicon, and carbon to silicon, respectively, measured in the thickness direction of the gas barrier layer, y is the maximum value of the elemental ratio of nitrogen to silicon measured in the thickness direction of the gas barrier layer and satisfies mathematical formula (1): 0.05?y?0.20, and w, x, and z satisfy mathematical formula (2): 0.07?w?0.20, mathematical formula (3): 1.90?x?2.40, and mathematical formula (4): 0.00?z?0.
    Type: Application
    Filed: July 2, 2014
    Publication date: May 26, 2016
    Inventor: Takahiro MORI
  • Patent number: 9336933
    Abstract: An object of the present invention is to provide a ferrite magnetic material which can provide a permanent magnet retaining high Br and HcJ as well as having high Hk/HcJ. The ferrite magnetic material according to a preferred embodiment is a ferrite magnetic material formed of hard ferrite, wherein a P content in terms of P2O5 is 0.001% by mass or more.
    Type: Grant
    Filed: August 11, 2014
    Date of Patent: May 10, 2016
    Assignee: TDK Corporation
    Inventors: Junichi Nagaoka, Takahiro Mori, Hiroyuki Morita, Yoshihiko Minachi