Abstract: The present invention realizes a bright image display by enhancing a numerical aperture of pixels. At least a portion of a pixel electrode is overlapped to a thin film transistor by way of a first insulation film, the pixel electrode is connected to an output electrode of the thin film transistor via a contact hole which is formed in the first insulation film, the counter electrode is arranged above the pixel electrode by way of a second insulation film in a state that the counter electrode is overlapped to the pixel electrode, the counter electrode is formed at a position avoiding the contact hole formed in the first insulation film as viewed in a plan view, and at least a portion of the counter electrode is overlapped to the thin film transistor.

Abstract: A liquid crystal display device is provided with a thin film transistor which includes a gate electrode film that is provided in a first electrode layer located over a first insulating layer, a semiconductor film that is disposed over the gate electrode film via a second insulating layer, a drain electrode and a source electrode that are provided in a second electrode layer located over the semiconductor film and are in contact with an upper surface of the semiconductor film, and a light blocking film that is disposed under the first insulating layer. At least a part thereof overlaps the semiconductor film and the gate electrode film in a plan view. One of the drain electrode and the source electrode is connected to a gate line, and the light blocking film is electrically connected to the source electrode.

Abstract: A bidirectional shift register capable of performing a stable shift operation in both directions and an image display device using the same are provided. In forward shift operation, when reference point N1 is at H level, (n+4)-th unit register circuit as a rear stage of the bidirectional shift register outputs pulse G(n+4) in synchronization with clock pulse V(n+4) inputted to (n+4)-th unit register circuit. A backward direction trigger signal VSTB is generated not only at the time of start of backward shift, but also, for example, in period (time t4 to t5) of one-phase clock immediately after G(n+4) is outputted in vertical blanking interval of the forward shift. The backward direction trigger signal VSTB is inputted to gate of a transistor provided to set reference point N1 of (n+4)-th unit register circuit to H level at the time of start of the backward shift.

Abstract: The present invention realizes a bright image display by enhancing a numerical aperture of pixels. At least a portion of a pixel electrode is overlapped to a thin film transistor by way of a first insulation film, the pixel electrode is connected to an output electrode of the thin film transistor via a contact hole which is formed in the first insulation film, the counter electrode is arranged above the pixel electrode by way of a second insulation film in a state that the counter electrode is overlapped to the pixel electrode, the counter electrode is formed at a position avoiding the contact hole formed in the first insulation film as viewed in a plan view, and at least a portion of the counter electrode is overlapped to the thin film transistor.

Abstract: A gate signal line drive circuit whose power consumption is reduced, is provided. In the gate signal line drive circuit having plural basic circuits outputting respective gate signals, each basic circuit includes a high voltage application switching element to which a first basic clock signal having high voltage in a signal high period is input, a low voltage application switching element that turns on at timing starting a signal low period, and outputs a low voltage, and a first low voltage application on control element having an input terminal to which a second basic clock signal subsequent to the first basic clock signal is input, and which turns on according to the signal high period, and outputs the voltage of the second basic clock signal to the control terminal of the low voltage application switching element.

Abstract: A liquid crystal display device is provided with a thin film transistor which includes a gate electrode film that is provided in a first electrode layer located over a first insulating layer, a semiconductor film that is disposed over the gate electrode film via a second insulating layer, a drain electrode and a source electrode that are provided in a second electrode layer located over the semiconductor film and are in contact with an upper surface of the semiconductor film, and a light blocking film that is disposed under the first insulating layer. At least a part thereof overlaps the semiconductor film and the gate electrode film in a plan view. One of the drain electrode and the source electrode is connected to a gate line, and the light blocking film is electrically connected to the source electrode.

Abstract: A display device includes a transparent substrate having a display region with a plurality of scanning signal lines and video signal lines intersecting thereon, a first terminal formed outside the display region connecting to a first terminal wiring and a second terminal wiring connected to a semiconductor chip, and an inverted staggered thin film transistor. The first terminal includes a first portion, a second portion on the first portion, a third portion having an exposed planar terminal plate on the second portion, a plurality of first vias between the first portion and the second portion, and a plurality of second vias between the second portion and the third portion. The first portion is connected to the first and second terminal wirings, and each of the plurality of first vias is not overlapped with each of the plurality of second vias in plan view.

Abstract: A gate signal line driving circuit which suppresses noises in a gate signal and a display device which uses the gate signal line driving circuit are provided. A first basic circuit provided to a gate signal line driving circuit includes a HIGH voltage applying switching element which applies a HIGH voltage to gate signal lines in response to a signal HIGH period, and a LOW voltage applying switching circuit which applies a LOW voltage to the gate signal lines in response to a signal LOW period. In response to a signal HIGH period, a switch of the LOW voltage applying switching circuit of the first basic circuit is turned off based on a signal applied to a switch of the HIGH voltage applying switching element of a second basic circuit which assumes a signal HIGH period earlier than the first basic circuit.

Abstract: According to an aspect, a display device includes: a display unit that has a plurality of scanning signal lines to which a scanning signal is applied; a shift register that has a plurality of transfer circuits configured in a plurality of stages that perform a shift operation for temporarily storing a shift signal that has been input and sequentially transmitting the stored shift signal to a subsequent stage in synchronization with a clock signal having a discontinued period, and outputs the scanning signal to a scanning signal line corresponding to a transfer circuit that maintains the shift signal; and a signal line that transmits a holding potential signal for maintaining a potential of the shift signal to a transfer circuit that maintains the shift signal in the discontinued period of the clock signal.

Abstract: A gate signal line drive circuit whose power consumption is reduced, is provided. In the gate signal line drive circuit having plural basic circuits outputting respective gate signals, each basic circuit includes a high voltage application switching element to which a first basic clock signal having high voltage in a signal high period is input, a low voltage application switching element that turns on at timing starting a signal low period, and outputs a low voltage, and a first low voltage application on control element having an input terminal to which a second basic clock signal subsequent to the first basic clock signal is input, and which turns on according to the signal high period, and outputs the voltage of the second basic clock signal to the control terminal of the low voltage application switching element.

Abstract: According to an aspect, a display device includes: a display unit that has a plurality of scanning signal lines to which a scanning signal is applied; a shift register that has a plurality of transfer circuits configured in a plurality of stages that perform a shift operation for temporarily storing a shift signal that has been input and sequentially transmitting the stored shift signal to a subsequent stage in synchronization with a clock signal having a discontinued period, and outputs the scanning signal to a scanning signal line corresponding to a transfer circuit that maintains the shift signal; and a signal line that transmits a holding potential signal for maintaining a potential of the shift signal to a transfer circuit that maintains the shift signal in the discontinued period of the clock signal.

Abstract: A circuit block of a driving circuit of a display device includes a first transistor that has a gate being connected to a first node having an active potential during an output period, and controls electrical conduction between a first clock signal line being applied with a first clock signal and the scanning signal line, a second transistor that has a gate being connected to a node having an active potential during a non-output period, and controls electrical conduction between the first node and an inactive potential line, and a third transistor that has a gate being connected to the fir at node, and controls electrical conduction between the second node and a first cyclic signal line applied with a first period signal having an active potential at the time of termination of the output period.

Abstract: A liquid crystal display device includes first and second substrates with liquid crystal sandwiched therebetween. A first blue, a red, a green, and a second blue color filters are disposed between the first substrate and the second substrate, and arranged in a first direction. First to third light blocking films are respectively disposed between the first blue and the red color filters, between the red and the green color filters, and between the green and the second blue color filters. A distance Lr between a first central line of a part of the first light blocking film and a second central line of a width the second light blocking film is larger than a distance Lg between the second central line and a third central line of a width of the third blocking film.

Abstract: A circuit block of a driving circuit of a display device includes a first transistor that has a gate being connected to a first node having an active potential during an output period, and controls electrical conduction between a first clock signal line being applied with a first clock signal and the scanning signal line, a second transistor that has a gate being connected to a second node having an active potential during a non-output period, and controls electrical conduction between the first node and an inactive potential line, and a third transistor that has a gate being connected to the first node, and controls electrical conduction between the second node and a first cyclic signal line applied with a first period signal having an active potential at the time of termination of the output period.

Abstract: A liquid crystal display device is provided with a thin film transistor which includes a gate electrode film that is provided in a first electrode layer located over a first insulating layer, a semiconductor film that is disposed over the gate electrode film via a second insulating layer, a drain electrode and a source electrode that are provided in a second electrode layer located over the semiconductor film and are in contact with an upper surface of the semiconductor film, and a light blocking film that is disposed under the first insulating layer. At least a part thereof overlaps the semiconductor film and the gate electrode film in a plan view. One of the drain electrode and the source electrode is connected to a gate line, and the light blocking film is electrically connected to the source electrode.

Abstract: A display device with a touch panel includes: a plurality of scanning signal lines, which are aligned in a rectangular display region and in parallel with a side of the rectangular display region, to which an active potential as a potential for making a pixel transistor conductive is applied; drive pulse output circuits which sequentially apply the active potential to the scanning signal lines in the display region; a clock signal output circuit which applies a first clock signal as a clock signal for the drive pulse output circuits to a first clock signal line and stops the application of the first clock signal to the first clock signal line for a stop period during which the sequential application of the active potential is stopped in the middle thereof; and a touch panel control unit which detects contact with a display surface during the stop period.

Abstract: A liquid crystal display device includes first and second substrates with liquid crystal sandwiched therebetween. A first blue, a red, a green, and a second blue color filters are disposed between the first substrate and the second substrate, and arranged in a first direction. First to third light blocking films are respectively disposed between the first blue and the red color filters, between the red and the green color filters, and between the green and the second blue color filters. A distance Lr between a first central line of a part of the first light blocking film and a second central line of a width the second light blocking film is larger than a distance Lg between the second central line and a third central line of a width of the third blocking film.

Abstract: A display device including a bidirectional shift register circuit, including: a plurality of cascade-connected register circuits; various circuits for setting various nodes to various voltage levels responsive to various signals input to various terminals; and an output circuit which outputs the clock pulse as an output pulse when the voltage of the first node is high level, wherein, at the forward shift operation, the bottom dummy register circuit is not input the reset signal and the first node of the bottom dummy register circuit is reset if the initial reset circuit of the bottom dummy register circuit receives the backward trigger signal, and wherein, at the backward shift operation, the top dummy register circuit is not input the reset signal and the first node of the top dummy register circuit is reset if the initial reset circuit of the top dummy register circuit receives the forward trigger signal.

Abstract: A three-dimensional display device prevents a barrier wire breakage failure and includes a parallax barrier panel resistant to static electricity. The 3D display device has a liquid crystal parallax barrier panel disposed over a display panel. The parallax barrier panel has a first substrate having an electrode formed flat thereon and a second substrate having a display area, the first substrate and the second substrate having liquid crystal sandwiched therebetween. The second substrate has barrier electrodes extending in a first direction and arrayed at a first pitch in a second direction, has a first bus electrode extending in the second direction outside the display area along a first side thereof, and has a second bus electrode extending in the second direction outside the display area along a second side thereof opposite to the first side. The barrier electrodes are connected to the first and the second bus electrodes.

Abstract: A parallax barrier panel including a first substrate having a flat electrode, and a second substrate, the liquid crystal sandwiched therebetween. The second substrate has first barrier electrodes extending in a first direction and arrayed at a first pitch in a second direction, and has second barrier electrodes, the first and the second harrier electrodes having an interlayer insulating film interposed therebetween. Gaps between the first barrier electrodes are blocked by the second barrier electrodes when viewed in a plan view. Each of the first barrier electrodes is paired with one of the second barrier electrodes. Bus electrodes extend outside the display area along a side thereof. The first barrier electrodes are connected to the bus electrodes via first through holes formed in the interlayer insulating film. The second barrier electrodes are connected to the first barrier electrodes via second through holes formed in the interlay insulating film.