Patents by Inventor Takahiro Ochiai

Takahiro Ochiai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9459503
    Abstract: A liquid crystal display device is provided with a thin film transistor which includes a gate electrode film that is provided in a first electrode layer located over a first insulating layer, a semiconductor film that is disposed over the gate electrode film via a second insulating layer, a drain electrode and a source electrode that are provided in a second electrode layer located over the semiconductor film and are in contact with an upper surface of the semiconductor film, and a light blocking film that is disposed under the first insulating layer. At least a part thereof overlaps the semiconductor film and the gate electrode film in a plan view. One of the drain electrode and the source electrode is connected to a gate line, and the light blocking film is electrically connected to the source electrode.
    Type: Grant
    Filed: June 24, 2015
    Date of Patent: October 4, 2016
    Assignee: Japan Display Inc.
    Inventors: Takahiro Ochiai, Motoharu Miyamoto, Masahiro Hoshiba
  • Publication number: 20160282660
    Abstract: A display device includes a transparent substrate having a display region with a plurality of scanning signal lines and video signal lines intersecting thereon, a first terminal formed outside the display region connecting to a first terminal wiring and a second terminal wiring connected to a semiconductor chip, and an inverted staggered thin film transistor. The first terminal includes a first portion, a second portion on the first portion, a third portion having an exposed planar terminal plate on the second portion, a plurality of first vias between the first portion and the second portion, and a plurality of second vias between the second portion and the third portion. The first portion is connected to the first and second terminal wirings, and each of the plurality of first vias is not overlapped with each of the plurality of second vias in plan view.
    Type: Application
    Filed: June 8, 2016
    Publication date: September 29, 2016
    Inventors: Takahiro Ochiai, Mitsuru Goto
  • Publication number: 20160246093
    Abstract: A liquid crystal display device includes a thin film transistor substrate, a counter substrate that faces the thin film transistor substrate, a liquid crystal composition that is arranged between the thin film transistor substrate and the counter substrate, an oriented film that arranges orientation of the liquid crystal composition contacting with the thin film transistor substrate, a seal material that seals the liquid crystal composition between the two substrates, and a driver circuit. The driver circuit has a light transmission area that is formed inside of the driver circuit, and is higher in light transmittance than an area in which a non-transparent conductive film forming the driver circuit is formed, and a high sealing property area in which the seal material and an insulating film come into direct contact with each other between the light transmission area and an outer edge of the thin film transistor substrate.
    Type: Application
    Filed: May 3, 2016
    Publication date: August 25, 2016
    Inventors: Takahiro OCHIAI, Yuki KURAMOTO, Masahiro HOSHIBA
  • Patent number: 9406399
    Abstract: A display device including a bidirectional shift register circuit, including: a plurality of cascade-connected register circuits; various circuits for setting various nodes to various voltage levels responsive to various signals input to various terminals; and an output circuit which outputs the clock pulse as an output pulse when the voltage of the first node is high level, wherein, at the forward shift operation, the bottom dummy register circuit is not input the reset signal and the first node of the bottom dummy register circuit is reset if the initial reset circuit of the bottom dummy register circuit receives the backward trigger signal, and wherein, at the backward shift operation, the top dummy register circuit is not input the reset signal and the first node of the top dummy register circuit is reset if the initial reset circuit of the top dummy register circuit receives the forward trigger signal.
    Type: Grant
    Filed: June 3, 2015
    Date of Patent: August 2, 2016
    Assignees: JAPAN DISPLAY INC., PANASONIC LIQUID CRYSTAL DISPLAY CO., LTD.
    Inventors: Takahiro Ochiai, Mitsuru Goto, Hiroko Sehata, Hiroyuki Higashijima
  • Publication number: 20160217871
    Abstract: A bidirectional shift register capable of performing a stable shift operation in both directions and an image display device using the same are provided. In forward shift operation, when reference point N1 is at H level, (n+4)-th unit register circuit as a rear stage of the bidirectional shift register outputs pulse G(n+4) in synchronization with clock pulse V(n+4) inputted to (n+4)-th unit register circuit. A backward direction trigger signal VSTB is generated not only at the time of start of backward shift, but also, for example, in period (time t4 to t5) of one-phase clock immediately after G(n+4) is outputted in vertical blanking interval of the forward shift. The backward direction trigger signal VSTB is inputted to gate of a transistor provided to set reference point N1 of (n+4)-th unit register circuit to H level at the time of start of the backward shift.
    Type: Application
    Filed: April 5, 2016
    Publication date: July 28, 2016
    Inventors: Takahiro OCHIAI, Mitsuru GOTO, Hiroyuki HIGASHIJIMA, Yoshihiro KOTANI, Shuuichirou MATSUMOTO
  • Patent number: 9389472
    Abstract: A display device includes a transparent substrate having a display region with a plurality of scanning signal lines and video signal lines intersecting thereon, a first terminal formed outside the display region connecting to a first terminal wiring and a second terminal wiring connected to a semiconductor chip, and an inverted staggered thin film transistor. The first terminal includes a first portion, a second portion on the first portion, a third portion having an exposed planar terminal plate on the second portion, a plurality of first vias between the first portion and the second portion, and a plurality of second vias between the second portion and the third portion. The first portion is connected to the first and second terminal wirings, and each of the plurality of first vias is not overlapped with each of the plurality of second vias in plan view.
    Type: Grant
    Filed: September 23, 2014
    Date of Patent: July 12, 2016
    Assignee: JAPAN DISPLAY INC.
    Inventors: Takahiro Ochiai, Mitsuru Goto
  • Patent number: 9360716
    Abstract: A liquid crystal display device includes a thin film transistor substrate, a counter substrate that faces the thin film transistor substrate, a liquid crystal composition that is arranged between the thin film transistor substrate and the counter substrate, an oriented film that arranges orientation of the liquid crystal composition contacting with the thin film transistor substrate, a seal material that seals the liquid crystal composition between the two substrates, and a driver circuit. The driver circuit has a light transmission area that is formed inside of the driver circuit, and is higher in light transmittance than an area in which a non-transparent conductive film forming the driver circuit is formed, and a high sealing property area in which the seal material and an insulating film come into direct contact with each other between the light transmission area and an outer edge of the thin film transistor substrate.
    Type: Grant
    Filed: June 3, 2015
    Date of Patent: June 7, 2016
    Assignee: JAPAN DISPLAY INC.
    Inventors: Takahiro Ochiai, Yuki Kuramoto, Masahiro Hoshiba
  • Publication number: 20160154285
    Abstract: A liquid crystal display device having an alignment layer stopper which is formed external to a display area to suppress the generation of an electric field between signal lines and the alignment layer stopper, wherein the alignment layer stopper includes a second conductive layer SP formed above the first substrate when the alignment layer stopper is formed by coating and a first conductive layer SH formed below the second conductive layer SP through an insulating film and arranged in such a manner that its marginal parts in the longitudinal direction of the second conductive layer SP are exposed when viewed from the plane direction from the second conductive layer SP, and the first conductive layer SH is formed in a thin film layer between signal lines arranged in the side parts of the display area and the second conductive layer SP.
    Type: Application
    Filed: February 10, 2016
    Publication date: June 2, 2016
    Inventors: Takahiro OCHIAI, Masaki NISHIKAWA, Motoharu MIYAMOTO
  • Patent number: 9336899
    Abstract: A bidirectional shift register capable of performing a stable shift operation in both directions and an image display device using the same are provided. In forward shift operation, when reference point N1 is at H level, (n+4)-th unit register circuit as a rear stage of the bidirectional shift register outputs pulse G(n+4) in synchronization with clock pulse V (n+4) inputted to (n+4)-th unit register circuit. A backward direction trigger signal VSTB is generated not only at the time of start of backward shift, but also, for example, in period (time t4 to t5) of one-phase clock immediately after G(n+4) is outputted in vertical blanking interval of the forward shift. The backward direction trigger signal VSTB is inputted to gate of a transistor provided to set reference point N1 of (n+4)-th unit register circuit to H level at the time of start of the backward shift.
    Type: Grant
    Filed: December 22, 2011
    Date of Patent: May 10, 2016
    Assignee: Japan Display Inc.
    Inventors: Takahiro Ochiai, Mitsuru Goto, Hiroyuki Higashijima, Yoshihiro Kotani, Shuuichirou Matsumoto
  • Publication number: 20160116812
    Abstract: To form a sufficiently large storage capacitor, a liquid crystal display device includes a liquid crystal display panel having a first substrate, a second substrate, and a liquid crystal held between the first substrate and the second substrate, the liquid crystal display panel having multiple pixels arranged in matrix. The first substrate has, in a transmissive display area provided in each of the pixels, a laminated structure containing a first transparent electrode, a first insulating film, a second transparent electrode, a second insulating film, and a third transparent electrode which are laminated in this order. The first transparent electrode and the second transparent electrode are electrically insulated from each other and together form a first storage capacitor through the first insulating film, and the second transparent electrode and the third transparent electrode are electrically insulated from each other and together form a second storage capacitor through the second insulating film.
    Type: Application
    Filed: December 31, 2015
    Publication date: April 28, 2016
    Inventors: Tohru SASAKI, Takahiro OCHIAI
  • Patent number: 9291840
    Abstract: A liquid crystal display device having an alignment layer stopper which is formed external to a display area to suppress the generation of an electric field between signal lines and the alignment layer stopper, wherein the alignment layer stopper includes a second conductive layer SP formed above the first substrate when the alignment layer stopper is formed by coating and a first conductive layer SH formed below the second conductive layer SP through an insulating film and arranged in such a manner that its marginal parts in the longitudinal direction of the second conductive layer SP are exposed when viewed from the plane direction from the second conductive layer SP, and the first conductive layer SH is formed in a thin film layer between signal lines arranged in the side parts of the display area and the second conductive layer SP.
    Type: Grant
    Filed: March 19, 2015
    Date of Patent: March 22, 2016
    Assignee: Japan Display Inc.
    Inventors: Takahiro Ochiai, Masaki Nishikawa, Motoharu Miyamoto
  • Patent number: 9261747
    Abstract: To form a sufficiently large storage capacitor, a liquid crystal display device includes a liquid crystal display panel having a first substrate, a second substrate, and a liquid crystal held between the first substrate and the second substrate, the liquid crystal display panel having multiple pixels arranged in matrix. The first substrate has, in a transmissive display area provided in each of the pixels, a laminated structure containing a first transparent electrode, a first insulating film, a second transparent electrode, a second insulating film, and a third transparent electrode which are laminated in this order. The first transparent electrode and the second transparent electrode are electrically insulated from each other and together form a first storage capacitor through the first insulating film, and the second transparent electrode and the third transparent electrode are electrically insulated from each other and together form a second storage capacitor through the second insulating film.
    Type: Grant
    Filed: September 30, 2014
    Date of Patent: February 16, 2016
    Assignees: Japan Display Inc., Panasonic Liquid Crystal Display Co., Ltd.
    Inventors: Tohru Sasaki, Takahiro Ochiai
  • Publication number: 20160035272
    Abstract: A circuit block of a driving circuit of a display device includes a first transistor that has a gate being connected to a first node having an active potential during an output period, and controls electrical conduction between a first clock signal line being applied with a first clock signal and the scanning signal line, a second transistor that has a gate being connected to a second node having an active potential during a non-output period, and controls electrical conduction between the first node and an inactive potential line, and a third transistor that has a gate being connected to the first node, and controls electrical conduction between the second node and a first cyclic signal line applied with a first period signal having an active potential at the time of termination of the output period.
    Type: Application
    Filed: October 14, 2015
    Publication date: February 4, 2016
    Inventors: Motoharu MIYAMOTO, Takahiro OCHIAI
  • Publication number: 20150378196
    Abstract: To improve the reliability of a liquid crystal display device, a liquid crystal display device includes a first substrate having a first surface, a second substrate having a second surface opposing the first surface of the first substrate, a liquid crystal layer arranged between the first substrate and the second substrate, and a sealing section that is provided along a line (a first virtual line) surrounding a periphery of the liquid crystal layer and adhesively fixes the first substrate and the second substrate. The sealing section includes a member (a first member) extending in a zigzag manner along the line and a sealing material arranged on both adjacent sides of the member and continuously surrounding a periphery of the liquid crystal layer.
    Type: Application
    Filed: June 26, 2015
    Publication date: December 31, 2015
    Inventors: Takahiro OCHIAI, Satoshi Hashimoto, Masato Shimura, Shunsuke Yuge, Tomoya Sugano
  • Publication number: 20150365655
    Abstract: Second barrier electrodes are arranged under first barrier electrodes so as to fill gaps between the first barrier electrodes, while an insulating layer is located between the first barrier electrodes and the second barrier electrodes. The number of first barrier electrodes and the number of second barrier electrodes in each barrier pitch are 6 or more. The positions of the barriers formed by the first barrier electrodes and the second barrier electrodes are controlled by the reception of a signal representing detected positions of the eyes of a viewer. If pitches of the first barrier electrodes are defined as BE, and the widths of regions in which the first barrier electrodes are overlapped with the second barrier electrodes are defined as BA, a ratio BA/BE of the widths BA to the pitches BE are 0.3 or smaller. This configuration can suppress the occurrence of moire.
    Type: Application
    Filed: June 11, 2015
    Publication date: December 17, 2015
    Inventors: Shinichiro OKA, Kouichi SHIRAI, Takahiro OCHIAI, Amane HIGASHI
  • Patent number: 9190006
    Abstract: A display device includes a plurality of pixel each including a transistor, a pixel electrode connected to the transistor, and a reference electrode disposed so as to be opposite to the pixel electrode. The display device also includes data lines connected to the corresponding pixel circuits, a plurality of gate lines connected to the corresponding pixel circuits, gate circuits each of which sequentially outputs a gate signal, which is in a high voltage level during two or more horizontal periods in a first order or in a second order that is reverse to the first order, and a gate signal control circuit that controls each of the gate circuits and scans the gate lines. The gate signal control circuit controls each of the gate circuits to start to output the gate signals so as not to overlap periods when the gate signals are output to the adjacent gate lines.
    Type: Grant
    Filed: March 6, 2012
    Date of Patent: November 17, 2015
    Assignee: JAPAN DISPLAY INC.
    Inventors: Takahiro Ochiai, Mitsuru Goto
  • Patent number: 9190007
    Abstract: A circuit block of a driving circuit of a display device includes a first transistor that has a gate being connected to a first node having an active potential during an output period, and controls electrical conduction between a first clock signal line being applied with a first clock signal and the scanning signal line, a second transistor that has a gate being connected to a second node having an active potential during a non-output period, and controls electrical conduction between the first node and an inactive potential line, and a third transistor that has a gate being connected to the first node, and controls electrical conduction between the second node and a first cyclic signal line applied with a first period signal having an active potential at the time of termination of the output period.
    Type: Grant
    Filed: January 23, 2014
    Date of Patent: November 17, 2015
    Assignee: Japan Display Inc.
    Inventors: Motoharu Miyamoto, Takahiro Ochiai
  • Patent number: 9166580
    Abstract: A gate signal line drive circuit and a display using the circuit, which suppress a leak current to reduce a power consumption. A gate signal line drive circuit that supplies a high voltage in a signal high period, and supplies a low voltage in a signal low period, the gate signal line drive circuit including: a high voltage supply switching element that turns on in response to the high period, supplies a voltage of a first basic clock signal to gate signal lines; a high voltage supply off control circuit that supplies a first low voltage to a switch of the high voltage supply switching element in response to the signal low period; and a low voltage supply switching circuit that supplies a second low voltage higher than the first low voltage to the gate signal lines in response to the signal low period.
    Type: Grant
    Filed: April 11, 2014
    Date of Patent: October 20, 2015
    Assignee: Japan Display Inc.
    Inventors: Motoharu Miyamoto, Takahiro Ochiai, Hideo Sato
  • Publication number: 20150293419
    Abstract: A liquid crystal display device is provided with a thin film transistor which includes a gate electrode film that is provided in a first electrode layer located over a first insulating layer, a semiconductor film that is disposed over the gate electrode film via a second insulating layer, a drain electrode and a source electrode that are provided in a second electrode layer located over the semiconductor film and are in contact with an upper surface of the semiconductor film, and a light blocking film that is disposed under the first insulating layer. At least a part thereof overlaps the semiconductor film and the gate electrode film in a plan view. One of the drain electrode and the source electrode is connected to a gate line, and the light blocking film is electrically connected to the source electrode.
    Type: Application
    Filed: June 24, 2015
    Publication date: October 15, 2015
    Inventors: Takahiro OCHIAI, Motoharu MIYAMOTO, Masahiro HOSHIBA
  • Publication number: 20150268523
    Abstract: A liquid crystal display device includes a thin film transistor substrate, a counter substrate that faces the thin film transistor substrate, a liquid crystal composition that is arranged between the thin film transistor substrate and the counter substrate, an oriented film that arranges orientation of the liquid crystal composition contacting with the thin film transistor substrate, a seal material that seals the liquid crystal composition between the two substrates, and a driver circuit. The driver circuit has a light transmission area that is formed inside of the driver circuit, and is higher in light transmittance than an area in which a non-transparent conductive film forming the driver circuit is formed, and a high sealing property area in which the seal material and an insulating film come into direct contact with each other between the light transmission area and an outer edge of the thin film transistor substrate.
    Type: Application
    Filed: June 3, 2015
    Publication date: September 24, 2015
    Inventors: Takahiro OCHIAI, Yuki Kuramoto, Masahiro Hoshiba