Patents by Inventor Takamitsu Higuchi

Takamitsu Higuchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060243198
    Abstract: A potassium niobate deposited body includes an R-plane sapphire substrate, a buffer layer composed of a metal oxide and formed above the R-plane sapphire substrate, a lead zirconate titanate niobate layer formed above the buffer layer, and a potassium niobate layer or a potassium niobate solid solution layer formed above the lead zirconate titanate niobate layer.
    Type: Application
    Filed: March 9, 2006
    Publication date: November 2, 2006
    Inventors: Takamitsu Higuchi, Takeshi Kijima, Mayumi Ueno
  • Publication number: 20060222895
    Abstract: A piezoelectric film laminate including a sapphire substrate and a lead zirconate titanate niobate film and a potassium niobate film formed on the sapphire substrate.
    Type: Application
    Filed: March 27, 2006
    Publication date: October 5, 2006
    Inventors: Takamitsu Higuchi, Takeshi Kijima, Mayumi Ueno
  • Publication number: 20060222872
    Abstract: A potassium niobate deposited body includes an R-plane sapphire substrate, a buffer layer composed of a metal oxide and formed above the R-plane sapphire substrate, a lead zirconate titanate niobate layer formed above the buffer layer, a potassium niobate layer or a potassium niobate solid solution layer formed above the lead zirconate titanate niobate layer, an electrode layer formed above the potassium niobate layer or the potassium niobate solid solution layer, and another substrate formed above the electrode layer.
    Type: Application
    Filed: March 9, 2006
    Publication date: October 5, 2006
    Inventors: Takamitsu Higuchi, Takeshi Kijima, Mayumi Ueno
  • Publication number: 20060213043
    Abstract: A method for manufacturing a piezoelectric element includes the steps of forming a first electrode above a substrate, forming above the first electrode a piezoelectric layer composed of a piezoelectric material having a perovskite structure, and forming a second electrode above the piezoelectric layer, wherein the step of forming the first electrode includes forming a lanthanum nickelate layer that is oriented to a cubic (100) by a sputter method, and a ratio of nickel to lanthanum (Ni/La) in a target used for the sputter method is greater than 1 but smaller than 1.5.
    Type: Application
    Filed: February 20, 2006
    Publication date: September 28, 2006
    Inventors: Setsuya Iwashita, Koji Ohashi, Takamitsu Higuchi
  • Publication number: 20060216549
    Abstract: A lead zirconate titanate niobate laminate includes a sapphire substrate and a lead zirconate titanate niobate film formed on the sapphire substrate.
    Type: Application
    Filed: March 23, 2006
    Publication date: September 28, 2006
    Inventors: Takeshi Kijima, Takamitsu Higuchi
  • Publication number: 20060214542
    Abstract: A method for manufacturing a piezoelectric element includes the steps of forming a first electrode above a substrate, forming, above the first electrode, a piezoelectric layer composed of a piezoelectric material having a perovskite structure, and forming a second electrode above the piezoelectric layer, wherein the step of forming the first electrode includes forming a layer containing nickel, and forming, above the layer containing nickel, a lanthanum nickelate layer that is oriented to a cubic (100).
    Type: Application
    Filed: February 20, 2006
    Publication date: September 28, 2006
    Inventors: Setsuya Iwashita, Koji Ohashi, Takamitsu Higuchi
  • Publication number: 20060197406
    Abstract: A potassium niobate deposited body in accordance with an embodiment of the invention includes an R-plane sapphire substrate, and a potassium niobate layer or a potassium niobate solid solution layer formed above the R-plane sapphire substrate, wherein the potassium niobate layer or the potassium niobate solid solution layer epitaxially grows in a (100) orientation in a pseudo cubic system expression, and the potassium niobate layer or the potassium niobate solid solution layer has a (100) plane that tilts with a [11-20] direction vector as a rotation axis with respect to an R-plane (1-102) of the R-plane sapphire substrate.
    Type: Application
    Filed: January 18, 2006
    Publication date: September 7, 2006
    Inventors: Takamitsu Higuchi, Taku Aoyama
  • Publication number: 20060198599
    Abstract: A method for manufacturing a potassium niobate deposited body includes: forming a buffer layer above a substrate composed of an R-plane sapphire substrate; forming above the buffer layer a potassium niobate layer or a potassium niobate solid solution layer that epitaxially grows in a (100) orientation in a pseudo cubic system expression; and forming an electrode layer above the potassium niobate layer or the potassium niobate solid solution layer, wherein a (100) plane of the potassium niobate layer or the potassium niobate solid solution layer is formed to tilt with a [11-20] direction vector as a rotation axis with respect to an R-plane (1-102) of the R-plane sapphire substrate.
    Type: Application
    Filed: January 18, 2006
    Publication date: September 7, 2006
    Inventors: Takamitsu Higuchi, Taku Aoyama
  • Patent number: 7067955
    Abstract: A method is provided for forming a potassium niobate thin film in which, in a process of manufacturing a surface acoustic wave element, a conductive thin film included in the surface acoustic wave element is used as an electrode for applying an electric field to the potassium niobate thin film that is to serve as the piezoelectric layer of the surface acoustic wave element to polarize it. A surface acoustic wave element, a frequency filter, a frequency oscillator, an electronic circuit, and an electronic apparatus are also provided.
    Type: Grant
    Filed: March 27, 2003
    Date of Patent: June 27, 2006
    Assignee: Seiko Epson Corporation
    Inventors: Takamitsu Higuchi, Setsuya Iwashita, Hiromu Miyazawa
  • Publication number: 20060118844
    Abstract: A transistor type ferroelectric memory includes a group-IV semiconductor layer, an oxide semiconductor layer formed over the group-IV semiconductor layer, a ferroelectric layer formed over the oxide semiconductor layer, a gate electrode formed over the ferroelectric layer, and a source region and a drain region formed in the group-IV semiconductor layer.
    Type: Application
    Filed: December 6, 2005
    Publication date: June 8, 2006
    Inventors: Takeshi Kijima, Yasuaki Hamada, Takamitsu Higuchi
  • Patent number: 7033521
    Abstract: A piezoelectric actuator includes: a buffer layer that is composed of an oxide or a nitride epitaxially formed on a Si substrate; a bottom electrode formed on the buffer layer, being composed of a transition metal oxide, and having a pseudo-cubic (100) or (111) orientation with a perovskite structure; a piezoelectric layer formed on the bottom electrode being composed of (Ba1?xMx)(Ti1?yZy)O3 (where (M=Sr or Ca and 0?x?0.3) (Z=Zr or Hf and 0?y?0.2)) with a pseudo-cubic (001) or (111) orientation; and a top electrode that is formed on the piezoelectric layer. In this way, a piezoelectric actuator that uses barium titanate as the piezoelectric body and does not include Pb is provided.
    Type: Grant
    Filed: March 25, 2003
    Date of Patent: April 25, 2006
    Assignee: Seiko Epson Corporation
    Inventors: Setsuya Iwashita, Takamitsu Higuchi, Hiromu Miyazawa
  • Patent number: 7011706
    Abstract: A device substrate is provided having: a Si(111) substrate; a buffer layer formed by epitaxial growth on the Si(111) substrate 11, and containing at least one of a rare earth metal oxide and an alkali earth metal oxide; and a semiconductor material layer formed by epitaxial growth on the buffer layer, and containing at least one of a group II–VI semiconductor material having a wurtzite structure and a group III–V semiconductor material having a wurtzite structure. The buffer layer preferably comprises a hexagonal crystal structure oriented in the (001) plane or a cubic crystal structure oriented in the (111) plane, and the semiconductor material layer preferably comprises a hexagonal crystal structure oriented in the (001) plane.
    Type: Grant
    Filed: March 27, 2003
    Date of Patent: March 14, 2006
    Assignee: Seiko Epson Corporation
    Inventors: Takamitsu Higuchi, Setsuya Iwashita, Hiromu Miyazawa
  • Patent number: 7005947
    Abstract: A surface acoustic wave element includes a single crystal substrate; a buffer layer formed by a crystal film that is formed on top of the single crystal substrate; and a piezoelectric thin film having a hexagonal system or a trigonal system crystal structure that is formed on top of the buffer layer. The surface acoustic wave element has an improved performance by improving the film quality of the piezoelectric thin film. In addition, because a semiconductor device can be formed on the single crystal substrate, the surface acoustic wave element can be integrated with the semiconductor device. Moreover, leakages of surface acoustic waves into the single crystal substrate are prevented. There are also provided a frequency filter, an oscillator, an electronic circuit, and an electronic instrument that are provided with this surface acoustic wave element.
    Type: Grant
    Filed: March 11, 2004
    Date of Patent: February 28, 2006
    Assignee: Seiko Epson Corporation
    Inventors: Setsuya Iwashita, Takamitsu Higuchi, Hiromu Miyazawa
  • Publication number: 20060037183
    Abstract: To provide a method for manufacturing a piezoelectric thin film resonator with excellent characteristics. A method for manufacturing a piezoelectric thin film resonator in accordance with the present invention includes a step of forming a laminated body by successively laminating, above a first substrate, a piezoelectric thin film and a first electrode, a step of bonding a second substrate and the laminated body, a step of separating the first substrate from the laminated body, a step of forming a second electrode above the piezoelectric thin film, and a step of patterning the second electrode, the piezoelectric thin film and the first electrode.
    Type: Application
    Filed: July 26, 2005
    Publication date: February 23, 2006
    Inventors: Setsuya Iwashita, Takamitsu Higuchi
  • Patent number: 6995634
    Abstract: A surface-acoustic-wave component that comprises a first piezoelectric layer composed of zinc oxide (ZnO), a second piezoelectric layer composed of lithium niobate (LiNbO3), and a protective layer, which are sequentially formed on a silicon substrate, on which electrodes (e.g., interdigital transducers) are further formed. Alternatively, it comprises a conductive layer composed of zinc oxide (ZnO), a piezoelectric layer composed of lithium niobate (LiNbO3), and a protective layer, which are sequentially formed on a silicon substrate, on which electrodes are further formed. The piezoelectric layer can actualize preferable orientation so as to improve the electromechanical coupling coefficient (K2). Thus, it is possible to produce surface-acoustic-wave components that contribute to manufacturing of highly-integrated electronic circuits such as frequency filters and oscillators as well as electronic devices such as portable telephones.
    Type: Grant
    Filed: January 7, 2004
    Date of Patent: February 7, 2006
    Assignee: Seiko Epson Corporation
    Inventors: Setsuya Iwashita, Takamitsu Higuchi, Hiromu Miyazawa
  • Patent number: 6984843
    Abstract: A board for an electronic device is provide comprising a substrate having an amorphous layer, a buffer layer formed on the amorphous layer, the buffer layer having an orientation at least in the direction of its thickness, and a conductive oxide layer formed on the buffer layer by means of epitaxial growth, the conductive oxide layer having a metal oxide of a perovskite structure. The buffer layer contains at least one of the group consisting of a metal oxide of a NaCl structure and a metal oxide of a fluorite structure. Furthermore, the buffer layer 12 is formed by epitaxial growth in the cubic crystal (100) orientation.
    Type: Grant
    Filed: March 25, 2003
    Date of Patent: January 10, 2006
    Assignee: Seiko Epson Corporation
    Inventors: Takamitsu Higuchi, Setsuya Iwashita, Hiromu Miyazawa
  • Patent number: 6960539
    Abstract: There is provided a substrate for electronic devices, in which treatment for forming a reconstructed surface or a hydrogen-terminated surface on a substrate is not necessary, and a buffer layer formed on the substrate can be epitaxially grown in the (100) orientation, and a manufacturing method therefor. The substrate 100 for electronic devices comprises; a substrate 11 consisting of silicon, and a first buffer layer 12 and a second buffer layer 13 having a fluorite structure, a first oxide electrode layer 14 having a layered perovskite structure, and a second oxide electrode layer 15 having a simple perovskite structure, which are epitaxially grown and laminated in this order on a film-forming surface of the substrate 11. The first buffer layer 12 is grown epitaxially at a higher rate than the growth rate of SiO2, by irradiating a metallic plasma onto a natural oxide film in an SiO sublimation area.
    Type: Grant
    Filed: August 21, 2003
    Date of Patent: November 1, 2005
    Assignee: Seiko Epson Corporation
    Inventors: Takamitsu Higuchi, Setsuya Iwashita, Hiromu Miyazawa
  • Publication number: 20050206271
    Abstract: A potassium niobate deposited body includes a substrate, an electrode layer formed above the substrate, and a potassium niobate layer formed above the electrode layer. The potassium niobate layer can include a domain that epitaxially grows in a (110) or (001) orientation, when a lattice constant of orthorhombic potassium niobate is 21/2 c<a<b, and a b-axis is a polarization axis.
    Type: Application
    Filed: March 14, 2005
    Publication date: September 22, 2005
    Inventors: Takamitsu Higuchi, Setsuya Iwashita, Hiromu Miyazawa
  • Publication number: 20050200235
    Abstract: A potassium niobate deposited body includes a sapphire substrate, and a potassium niobate layer formed above the sapphire substrate. The potassium niobate deposited body further includes a buffer layer consisting of a metal oxide formed above the sapphire substrate, wherein the potassium niobate layer is formed above the buffer layer.
    Type: Application
    Filed: March 8, 2005
    Publication date: September 15, 2005
    Inventors: Takamitsu Higuchi, Setsuya Iwashita, Hiromu Miyazawa
  • Publication number: 20050189571
    Abstract: A ferroelectric memory includes a memory cell array in which memory cells having a ferroelectric capacitor are arranged in a matrix shape. The memory cell array includes a ferroelectric layer formed out of a thin film made of a Bi layer-structured ferroelectric single crystal having a (001) orientation and which is patterned such that the ferroelectric layer has two or more side walls perpendicular to a (100) axis of the Bi layer-structured ferroelectrics, first electrodes contacting at least one of the side walls of the ferroelectric layer and which are formed in stripe patterns extending along the one side wall, and second electrodes which contact the other side wall of the ferroelectric layer not contacting the first electrodes and which are formed in stripe patterns to intersect the first electrodes. The memory cells are formed at intersections between the first electrodes and the second electrodes.
    Type: Application
    Filed: February 4, 2005
    Publication date: September 1, 2005
    Inventors: Junichi Karasawa, Takamitsu Higuchi, Setsuya Iwashita