Patents by Inventor Takamitsu Higuchi

Takamitsu Higuchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050179342
    Abstract: A piezoelectric actuator comprising an optimum layer structure when (100) orientation strontium ruthenate is used as a bottom electrode is provided. This piezoelectric actuator comprises a diaphragm 30 that is constituted by (100) orientation yttria-stabilized zirconia, CeO2, or ZrO2, that is grown epitaxially on a (100) orientation Si substrate 20, a buffer layer 41 formed on the diaphragm and constituted by (001) orientation REBa2Cu3Ox, a bottom electrode 42 formed on the buffer layer and constituted by (100) orientation strontium ruthenate, a piezoelectric layer 43 formed on the bottom electrode and constituted by (100) orientation PZT, and a top electrode 44 formed on the piezoelectric layer.
    Type: Application
    Filed: May 15, 2003
    Publication date: August 18, 2005
    Inventors: Takamitsu Higuchi, Setsuya Iwashita
  • Patent number: 6930339
    Abstract: The present invention relates to a ferroelectric memory having a matrix-type memory cell array which has a superior degree of integration, in which the angularity of the ferroelectric layer's hysteresis curve is improved, the production yield is increased and costs are reduced. A ferroelectric memory having improved angularity in the hysteresis curve, and superior memory characteristics, production yield and costs is realized as follows. Namely, a peripheral circuit chip and a memory cell array chip are engaged onto an inexpensive assembly base 300 such as glass or plastic. In memory cell array chip 200, a ferroelectric layer is made to undergo epitaxial growth on to a Si single crystal via a buffer layer and first signal electrode. As a result, a ferroelectric memory can be realized which has improved angularity in the hysteresis curve and superior memory characteristics, production yield, and cost.
    Type: Grant
    Filed: March 22, 2002
    Date of Patent: August 16, 2005
    Assignee: Seiko Epson Corporation
    Inventors: Takamitsu Higuchi, Setsuya Iwashita, Hiromu Miyazawa, Kazumasa Hasegawa, Eiji Natori
  • Publication number: 20050167715
    Abstract: There is provided a substrate for electronic devices, in which treatment for forming a reconstructed surface or a hydrogen-terminated surface on a substrate is not necessary, and a buffer layer formed on the substrate can be epitaxially grown in the (100) orientation, and a manufacturing method therefor. The substrate 100 for electronic devices comprises; a substrate 11 consisting of silicon, and a first buffer layer 12 and a second buffer layer 13 having a fluorite structure, a first oxide electrode layer 14 having a layered perovskite structure, and a second oxide electrode layer 15 having a simple perovskite structure, which are epitaxially grown and laminated in this order on a film-forming surface of the substrate 11. The first buffer layer 12 is grown epitaxially at a higher rate than the growth rate of SiO2, by irradiating a metallic plasma onto a natural oxide film in an SiO sublimation area.
    Type: Application
    Filed: March 31, 2005
    Publication date: August 4, 2005
    Applicant: Seiko Epson Corporation
    Inventors: Takamitsu Higuchi, Setsuya Iwashita, Hiromu Miyazawa
  • Publication number: 20050162043
    Abstract: A method is provided for effectively manufacturing a piezoelectric device equipped with a piezoelectric film with a crystal orientation that is aligned in a desired direction. An interlayer which partially has a layer formed by an ion beam assisted laser ablation method while controlling a temperature rise accompanied by an ion beam irradiation by a cooling device and is bi-axially oriented as a whole, is formed on a surface of a substrate. A lower electrode is formed on the interlayer. A piezoelectric film is formed on the lower electrode. An upper electrode is formed on the piezoelectric film. The lower electrode and the piezoelectric film are formed by epitaxial growth.
    Type: Application
    Filed: November 30, 2004
    Publication date: July 28, 2005
    Inventors: Takamitsu Higuchi, Setsuya Iwashita, Hiromu Miyazawa
  • Publication number: 20050155202
    Abstract: A method is provided for effectively manufacturing a piezoelectric device equipped with a piezoelectric film with a crystal orientation that is aligned in a desired direction. An interlayer that is bi-axially oriented is formed on a surface of a substrate by conducting ion beam assisted laser ablation in a disposition in which a center axis of an ablation plume to be irradiated is angled at approximately 55 degrees to a direction normal to the substrate. A lower electrode is formed on the interlayer. A piezoelectric film is formed on the lower electrode. An upper electrode is formed on the piezoelectric film. The lower electrode and the piezoelectric film are formed by epitaxial growth.
    Type: Application
    Filed: December 1, 2004
    Publication date: July 21, 2005
    Inventors: Takamitsu Higuchi, Setsuya Iwashita, Hiromu Miyazawa
  • Publication number: 20050152075
    Abstract: A magnetoresistance effect element is provided and includes a memory layer, an insulating layer and a fixed magnetic layer successively stacked on a substrate. The memory layer is formed on the substrate through a transition metal oxide layer having a predetermined orientation plane. A buffer layer is preferably provided on a lower layer side of the transition metal oxide layer.
    Type: Application
    Filed: January 12, 2005
    Publication date: July 14, 2005
    Inventors: Hiromu Miyazawa, Takamitsu Higuchi, Setsuya Iwashita
  • Publication number: 20050146249
    Abstract: A piezoelectric film is provided having good piezoelectric properties. The piezoelectric film is represented by the following general formula: A1-bB1-aXaO3 wherein A contains Pb; B is at least one of Zr and Ti; X is at least one of V, Nb, Ta, Cr, Mo and W; a satisfies 0.05?a?0.3; and b satisfies 0.025?b?0.15.
    Type: Application
    Filed: October 21, 2004
    Publication date: July 7, 2005
    Inventors: Hiromu Miyazawa, Takeshi Kijima, Eiji Natori, Taku Aoyama, Setsuya Iwashita, Takamitsu Higuchi
  • Publication number: 20050140743
    Abstract: A piezoelectric film is provided that is represented by the following general formula: Pb1-b[((X1/3Nb2/3)1-cB?c)1-aYa]O3 wherein X is at least one of Mg, Zn and Ni; B? is at least one of Zr, Ti and Hf; Y is at least one of V, Nb, Ta, Cr, Mo and W; a satisfies 0.05?a<0.30; b satisfies 0.025?b?0.15; when X is Mg, c satisfies 0.25?c?0.35; when X is Ni, c satisfies 0.30?c?0.40; and when X is Zn, c satisfies 0.05?c?0.15.
    Type: Application
    Filed: November 3, 2004
    Publication date: June 30, 2005
    Inventors: Hiromu Miyazawa, Takeshi Kijima, Takamitsu Higuchi, Setsuya Iwashita
  • Publication number: 20050134652
    Abstract: An ink jet head is provided that can effectively suppress operational interferences among adjacent cavities, and is capable of ultra-high-density and high-speed printing. The ink jet head is equipped with a plurality of cavities each having a volume that is variable by a deformation operation of a piezoelectric element, wherein beam members are provided between inner walls that interpose the cavity.
    Type: Application
    Filed: December 2, 2004
    Publication date: June 23, 2005
    Inventors: Setsuya Iwashita, Takamitsu Higuchi, Hiromu Miyazawa, Satoshi Nebashi
  • Publication number: 20050133885
    Abstract: A capacitor is provided having a structure in which an insulation film is interposed between a first electrode and a second electrode. The insulation film includes (Ba1?x Mx) TiO3 (M=Sr or Ca, 0?x?0.3) as a main component, and at least one of Si and Ge added thereto.
    Type: Application
    Filed: December 3, 2004
    Publication date: June 23, 2005
    Inventors: Setsuya Iwashita, Motohisa Noguchi, Hiromu Miyazawa, Takamitsu Higuchi
  • Publication number: 20050128681
    Abstract: A capacitor is provided having a structure in which an insulation film is interposed between a first electrode and a second electrode. The insulation film includes SrTiO3 as a main component, and at least one of Si and Ge added thereto.
    Type: Application
    Filed: December 3, 2004
    Publication date: June 16, 2005
    Inventors: Setsuya Iwashita, Motohisa Noguchi, Hiromu Miyazawa, Takamitsu Higuchi
  • Publication number: 20050122005
    Abstract: An intermediate film (15, 12, 53) is formed on a substrate (11, 52), a bottom electrode (13, 542) is formed on top of this intermediate film, a ferroelectric film (24) or piezoelectric film (543) is formed on top of this bottom electrode by an ion beam assist method, and a top electrode (25, 541) is formed on top of this ferroelectric film or piezoelectric film. The ferroelectric film or piezoelectric film is formed by PZT, BST or a relaxer material. As a result of the use of an ion beam assist method in the formation of any one of the intermediate film, bottom electrode, ferroelectric film or piezoelectric film, a piezoelectric device or ferroelectric device which has a piezoelectric film or ferroelectric film with an in-plane orientation can be manufactured with good efficiency.
    Type: Application
    Filed: November 12, 2003
    Publication date: June 9, 2005
    Inventors: Takamitsu Higuchi, Setsuya Iwashita, Hiromu Miyazawa, Koji Sumi, Masami Murai, Maki Ito, Li Xin-Shan
  • Publication number: 20050097716
    Abstract: Exemplary embodiments of the present invention provide a method of manufacturing a piezoelectric device that includes a piezoelectric layer having high crystallinity in which crystal orientation is aligned to a desired direction, a method of manufacturing a ferroelectric device that includes a ferroelectric layer having the similar high crystallinity, and so forth. Exemplary embodiments include an insulating layer composed of SiO2 and so forth and a buffer layer composed of strontium oxide (SrO) and so forth are formed on a substrate such as a silicon single crystal wafer in sequence, and then a lower electrode composed of strontium ruthenate (SRO) is formed on the buffer layer. By forming self-assembled monolayers on the lower electrode, high affinity regions A1 and low affinity regions A2 are formed. Then, piezoelectric layers are selectively formed only on the high affinity regions A1.
    Type: Application
    Filed: September 21, 2004
    Publication date: May 12, 2005
    Applicant: Seiko Epson Corporation
    Inventors: Atsushi Takakuwa, Takamitsu Higuchi, Setsuya Iwashita
  • Publication number: 20050096230
    Abstract: Performance of an electronic device is highly improved by epitaxially growing a perovskite-type oxide thin film on an inorganic amorphous layer or an organic solid layer in a desired direction; and furthermore, a high performance electronic device is provided by incorporating the electronic device into an integrated circuit, wherein oxide thin layers are formed on the inorganic amorphous layer or the organic solid layer, and the perovskite-type oxide thin film is grown epitaxially on the oxide layer, the oxide thin layers being able to be at least one of strontium oxide, magnesium oxide, cerium oxide, zirconium oxide, yttrium stabilized zirconium oxide, and strontium titanate; and as the perovskite-type oxide thin film, the perovskite-type oxide thin film being a piezoelectric or ferroelectric material, for example, is used.
    Type: Application
    Filed: December 8, 2004
    Publication date: May 5, 2005
    Inventors: Setsuya Iwashita, Takamitsu Higuchi, Hiromu Miyazawa
  • Publication number: 20050076829
    Abstract: A method of manufacturing KNbO3 single crystal thin film having single-phase high quality and excellent morphology on each of single crystal substrates. A surface acoustic wave element, frequency filter, frequency oscillator, electronics circuit, and electronic device employ the thin film manufactured by the method, and have high k2, and are wideband, reduced in size and economical in power consumption. A plasma plume containing K, Nb, and O in the range 0.5?x?xE is supplied to a substrate, where x is a mole ratio of niobium (Nb) to potassium (K) in KxNb1-xOy, and xE is a mole composition ratio at the eutectic point for KNbO3 and 3K2O.Nb2O5 under a predetermined oxygen partial pressure. Maintaining the temperature Ts of the substrate in the range TE?Ts?Tm where TE represents the temperature at the eutectic point and Tm represents a complete melting temperature, the KNbO3 single crystal is precipitated from the KxNb1-xOy deposited on the substrate.
    Type: Application
    Filed: August 11, 2004
    Publication date: April 14, 2005
    Inventors: Takamitsu Higuchi, Setsuya Iwashita, Hiromu Miyazawa
  • Publication number: 20050079735
    Abstract: The invention provides a substrate for an electronic device including a conductive oxide layer which is formed by epitaxial growth with cubic crystal (100) orientation or pseudo-cubic crystal (100) orientation and which contains a metal oxide having a perovskite structure, a method for manufacturing a substrate for an electronic device, and an electronic device provided with such a substrate for an electronic device. A substrate for an electronic device includes a Si substrate, a buffer layer which is formed by epitaxial growth on the Si substrate and which contains a metal oxide having a NaCl structure, and a conductive oxide layer which is formed by epitaxial growth with cubic crystal (100) orientation or pseudo-cubic crystal (100) orientation on the buffer layer and which contains a metal oxide having a perovskite structure. The Si substrate is preferably a (100) substrate or a (110) substrate from which a natural oxidation film is not removed.
    Type: Application
    Filed: October 21, 2004
    Publication date: April 14, 2005
    Applicant: Seiko Epson Corporation
    Inventors: Takamitsu Higuchi, Setsuya Iwashita, Hiromu Miyazawa
  • Patent number: 6849861
    Abstract: Performance of an electronic device is highly improved by epitaxially growing a perovskite-type oxide thin film on an inorganic amorphous layer or an organic solid layer in a desired direction; and furthermore, a high performance electronic device is provided by incorporating the electronic device into an integrated circuit, wherein oxide thin layers are formed on the inorganic amorphous layer or the organic solid layer, and the perovskite-type oxide thin film is grown epitaxially on the oxide layer, the oxide thin layers being able to be at least one of strontium oxide, magnesium oxide, cerium oxide, zirconium oxide, yttrium stabilized zirconium oxide, and strontium titanate; and as the perovskite-type oxide thin film, the perovskite-type oxide thin film being a piezoelectric or ferroelectric material, for example, is used.
    Type: Grant
    Filed: March 27, 2002
    Date of Patent: February 1, 2005
    Assignee: Seiko Epson Corporation
    Inventors: Setsuya Iwashita, Takamitsu Higuchi, Hiromu Miyazawa
  • Publication number: 20050017269
    Abstract: A ferroelectric memory device has a high performance, includes no Pb, and can be directly mounted onto an Si substrate. The ferroelectric memory device includes a (001)-oriented BiFeO3 ferroelectric layer 5 with a tetragonal structure, which is formed on an electrode 4 made of a perovskite material formed on an Si oxide film. The electrode 4 with a perovskite structure is formed by an ion beam assist method.
    Type: Application
    Filed: June 16, 2004
    Publication date: January 27, 2005
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Hiromu Miyazawa, Takamitsu Higuchi, Setsuya Iwashita
  • Publication number: 20050018019
    Abstract: A piezoelectric element includes a piezoelectric material film made of BiFeO3. The piezoelectric element can be used in an ink jet recording head which includes a cavity with a variable internal volume, wherein the internal volume of the cavity changes depending on deformation of the piezoelectric material film included in the piezoelectric element.
    Type: Application
    Filed: June 15, 2004
    Publication date: January 27, 2005
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Hiromu Miyazawa, Takamitsu Higuchi, Setsuya Iwashita
  • Patent number: 6841192
    Abstract: A liquid material containing metal particles is directly applied onto a piezoelectric layer with an inkjet head to form a pattern portion, and the applied liquid material is transformed into a metal layer by heat treatment.
    Type: Grant
    Filed: April 17, 2003
    Date of Patent: January 11, 2005
    Assignee: Seiko Epson Corporation
    Inventors: Takashi Hashimoto, Setsuya Iwashita, Takamitsu Higuchi, Hiromu Miyazawa