Patents by Inventor Takanori Matsumoto
Takanori Matsumoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7067761Abstract: A semiconductor device manufacturing system has a vacuum chamber which is provided with a cathode electrode for holding a substrate to be processed and into which a reactive gas for generating discharging plasma by the application of a high-frequency electric power is introduced, a measuring circuit which measures at least one of the impedance of a system including the plasma, the peak-to-peak voltage of a high-frequency signal applied to the plasma, and a self-bias voltage applied to the cathode electrode, and a sense circuit which compares the measured value from the measuring circuit with previously prepared data and senses the change of processing characteristics with time for the substrate in using the discharging plasma or the cleaning time of the inside of the vacuum chamber.Type: GrantFiled: December 23, 2003Date of Patent: June 27, 2006Assignee: Kabushiki Kaisha ToshibaInventors: Takanori Matsumoto, Satoshi Shimonishi, Fumio Sato, Masaki Narita
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Publication number: 20060108309Abstract: A swiveling work machine includes a swivel deck mounted to be pivotable about a vertical axis and a side cover for covering one lateral side on the swivel deck, an accommodating space capable of accommodating a work machine accessory being provided inside the lateral cover. The accommodating space accommodates, as the implement accessory, a work oil tank, a fuel tank and a control valve unit. The work oil tank is disposed at a fore-and-aft intermediate portion on one lateral side on the swivel deck. The fuel tank is disposed forwardly of the work oil tank with forming a gap relative thereto. The control valve unit is disposed upwardly of the fuel tank and longitudinally along the fore/aft direction.Type: ApplicationFiled: September 13, 2005Publication date: May 25, 2006Applicant: Kubota CorporationInventors: Fumiki Sato, Shizuo Shimoie, Yoshihiro Kato, Takanori Matsumoto, Kenzo Koga
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Publication number: 20060108171Abstract: A swivel work machine includes a traveling unit, a swivel base plate supported on the traveling unit to be pivotable about a vertical swivel axis, the swivel base plate having a first lateral side and a second lateral side provided across said vertical axis, a pair of upper and lower support brackets disposed at a front end of the swivel base plate with an offset toward the first lateral side and adapted for supporting an implement, a pair of left and right vertical ribs extending rearward from the support brackets and fixed to the swivel base plate and a cabin mounted on the swivel base plate. The cabin is disposed with an offset toward the second lateral side relative to the support brackets, a bottom of the cabin being disposed downwardly of the upper support bracket. The vertical rib disposed on the side of the second lateral side extends, from its front portion to its intermediate portion, parallel with a side face of the cabin on the side of the first lateral side.Type: ApplicationFiled: September 13, 2005Publication date: May 25, 2006Applicant: Kubota CorporationInventors: Kenzo Koga, Shizuo Shimoie, Yoshihiro Kato, Fumiki Sato, Takanori Matsumoto, Naoki Miyata
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Patent number: 6998225Abstract: A method of producing a compound semiconductor device using a lift-off process. The lift-off process includes forming a resist mask having an electrode opening on an active layer of a compound semiconductor that is on a substrate of a compound semiconductor; forming a metal layer on the resist mask and the active layer in the electrode opening; and dissolving the resist mask and removing the metal layer on the resist mask, leaving the metal layer on the active layer in the electrode opening as an electrode. The resist mask is removed sufficiently by using a resist remover consisting essentially of at least one compound selected from an amine-including compound and nitrogen-including cyclic compounds so that the residual resist mask need not be removed by ashing.Type: GrantFiled: April 9, 2003Date of Patent: February 14, 2006Assignees: Mitsubishi Denki Kabushiki Kaisha, EKC Technology Kabushiki KaishaInventors: Akiyoshi Kudo, Hiroshi Kobayashi, Takanori Matsumoto
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Patent number: 6989073Abstract: A semiconductor device manufacturing system has a vacuum chamber which is provided with a cathode electrode for holding a substrate to be processed and into which a reactive gas for generating discharging plasma by the application of a high-frequency electric power is introduced, a measuring circuit which measures at least one of the impedance of a system including the plasma, the peak-to-peak voltage of a high-frequency signal applied to the plasma, and a self-bias voltage applied to the cathode electrode, and a sense circuit which compares the measured value from the measuring circuit with previously prepared data and senses the change of processing characteristics with time for the substrate in using the discharging plasma or the cleaning time of the inside of the vacuum chamber.Type: GrantFiled: December 23, 2003Date of Patent: January 24, 2006Assignee: Kabushiki Kaisha ToshibaInventors: Takanori Matsumoto, Satoshi Shimonishi, Fumio Sato, Masaki Narita
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Publication number: 20060014360Abstract: A method of fabricating a semiconductor device includes forming a coating type carbon film on a semiconductor substrate, patterning the coating type carbon film according to trenches formed in the semiconductor substrate and having different opening widths, and etching the semiconductor substrate with the patterned coating type carbon film serving as a mask, thereby simultaneously forming a deeper trench in a part with a larger opening width and a shallower trench in another part with a smaller opening width.Type: ApplicationFiled: July 14, 2005Publication date: January 19, 2006Applicant: Kabushiki Kaisha ToshibaInventor: Takanori Matsumoto
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Publication number: 20050230780Abstract: A semiconductor device such as a flash memory includes a semiconductor substrate having a surface, and a plurality of trenches formed in the substrate so as to be open at the surface of the substrate, the trenches having opening widths different from each other. The trench with a smaller opening width is formed so as to have a first depth and the trench with a larger opening width has a bottom including opposite ends each of which has a second depth deeper than the first depth and a central portion shallower than the second depth.Type: ApplicationFiled: March 23, 2005Publication date: October 20, 2005Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Katsuya Ito, Hiroaki Tsunoda, Takanori Matsumoto
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Publication number: 20050221579Abstract: A semiconductor device includes a semiconductor substrate and first and second trenches. The first trench with a high aspect ratio is formed in a surface of the semiconductor substrate and has a bottom, two sidewalls and an open end. The first trench is formed so that at the bottom side, an inclination of each sidewall relative to the bottom has a first angle approximate to a right angle and at the bottom side, the inclination of each sidewall relative to the bottom has a second angle smaller than the first angle. The second trench has a lower aspect ratio than the first trench. The second trench has a bottom, two sidewalls and an open end and is formed so that an inclination of each sidewall relative to the bottom is substantially uniform from the bottom side to the open end side and has a third angle which is approximate to the second angle.Type: ApplicationFiled: March 22, 2005Publication date: October 6, 2005Applicant: KABUSHIKI KAISHA TOSHIBAInventor: Takanori Matsumoto
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Publication number: 20050040439Abstract: A semiconductor device comprising a semiconductor substrate having a substrate top surface on which a device is to be formed; a gate electrode electrically insulated from said semiconductor substrate by a gate-insulating film; a trench formed through said gate electrode into said semiconductor substrate to electrically isolate a device region for forming a device from the remainder region of said substrate top surface; and a boundary portion which is defined between a side surface of said trench and a bottom surface of said trench; wherein said boundary portion have spherical shapes having a curvature radius not smaller than 80 nm.Type: ApplicationFiled: September 24, 2004Publication date: February 24, 2005Inventors: Masahisa Sonoda, Hiroaki Tsunoda, Eiji Sakagami, Hidemi Kanetaka, Kenji Matsuzaki, Takanori Matsumoto
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Publication number: 20050014372Abstract: When etching a silicon layer 210 with a processing gas containing a mixed gas constituted of HBr gas, and O2 gas and SiF4 gas and further mixed with both of or either of SF6 gas and NF3 gas by using a pre-patterned mask having a silicon oxide film layer 204 inside an airtight processing container 102, high-frequency power with a first frequency is applied from a first high-frequency source 118 and high-frequency power with a second frequency lower than the first frequency is applied from a second high-frequency source 138 to a lower electrode 104 on which a workpiece is placed. Through this etching process, holes or grooves achieving a high aspect ratio are formed in a desirable shape at the silicon layer.Type: ApplicationFiled: June 25, 2004Publication date: January 20, 2005Inventors: Satoshi Shimonishi, Takanori Matsumoto, Katsumi Horiguchi, Kenji Yamamoto, Fumihiko Higuchi
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Publication number: 20040149698Abstract: A semiconductor device manufacturing system has a vacuum chamber which is provided with a cathode electrode for holding a substrate to be processed and into which a reactive gas for generating discharging plasma by the application of a high-frequency electric power is introduced, a measuring circuit which measures at least one of the impedance of a system including the plasma, the peak-to-peak voltage of a high-frequency signal applied to the plasma, and a self-bias voltage applied to the cathode electrode, and a sense circuit which compares the measured value from the measuring circuit with previously prepared data and senses the change of processing characteristics with time for the substrate in using the discharging plasma or the cleaning time of the inside of the vacuum chamber.Type: ApplicationFiled: December 23, 2003Publication date: August 5, 2004Applicant: Kabushiki Kaisha ToshibaInventors: Takanori Matsumoto, Satoshi Shimonishi, Fumio Sato, Masaki Narita
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Publication number: 20040134609Abstract: A semiconductor device manufacturing system has a vacuum chamber which is provided with a cathode electrode for holding a substrate to be processed and into which a reactive gas for generating discharging plasma by the application of a high-frequency electric power is introduced, a measuring circuit which measures at least one of the impedance of a system including the plasma, the peak-to-peak voltage of a high-frequency signal applied to the plasma, and a self-bias voltage applied to the cathode electrode, and a sense circuit which compares the measured value from the measuring circuit with previously prepared data and senses the change of processing characteristics with time for the substrate in using the discharging plasma or the cleaning time of the inside of the vacuum chamber.Type: ApplicationFiled: December 23, 2003Publication date: July 15, 2004Applicant: Kabushiki Kaisha ToshibaInventors: Takanori Matsumoto, Satoshi Shimonishi, Fumio Sato, Masaki Narita
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Publication number: 20040134610Abstract: A semiconductor device manufacturing system has a vacuum chamber which is provided with a cathode electrode for holding a substrate to be processed and into which a reactive gas for generating discharging plasma by the application of a high-frequency electric power is introduced, a measuring circuit which measures at least one of the impedance of a system including the plasma, the peak-to-peak voltage of a high-frequency signal applied to the plasma, and a self-bias voltage applied to the cathode electrode, and a sense circuit which compares the measured value from the measuring circuit with previously prepared data and senses the change of processing characteristics with time for the substrate in using the discharging plasma or the cleaning time of the inside of the vacuum chamber.Type: ApplicationFiled: December 23, 2003Publication date: July 15, 2004Applicant: Kabushiki Kaisha ToshibaInventors: Takanori Matsumoto, Satoshi Shimonishi, Fumio Sato, Masaki Narita
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Publication number: 20040137746Abstract: A semiconductor device manufacturing system has a vacuum chamber which is provided with a cathode electrode for holding a substrate to be processed and into which a reactive gas for generating discharging plasma by the application of a high-frequency electric power is introduced, a measuring circuit which measures at least one of the impedance of a system including the plasma, the peak-to-peak voltage of a high-frequency signal applied to the plasma, and a self-bias voltage applied to the cathode electrode, and a sense circuit which compares the measured value from the measuring circuit with previously prepared data and senses the change of processing characteristics with time for the substrate in using the discharging plasma or the cleaning time of the inside of the vacuum chamber.Type: ApplicationFiled: December 23, 2003Publication date: July 15, 2004Applicant: Kabushiki Kaisha ToshibaInventors: Takanori Matsumoto, Satoshi Shimonishi, Fumio Sato, Masaki Narita
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Patent number: 6685797Abstract: A semiconductor device manufacturing system has a vacuum chamber which is provided with a cathode electrode for holding a substrate to be processed and into which a reactive gas for generating discharging plasma by the application of a high-frequency electric power is introduced, a measuring circuit which measures at least one of the impedance of a system including the plasma, the peak-to-peak voltage of a high-frequency signal applied to the plasma, and a self-bias voltage applied to the cathode electrode, and a sense circuit which compares the measured value from the measuring circuit with previously prepared data and senses the change of processing characteristics with time for the substrate in using the discharging plasma or the cleaning time of the inside of the vacuum chamber.Type: GrantFiled: March 17, 2000Date of Patent: February 3, 2004Assignee: Kabushiki Kaisha ToshibaInventors: Takanori Matsumoto, Satoshi Shimonishi, Fumio Sato, Masaki Narita
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Publication number: 20030194656Abstract: The present invention provides a method of producing a compound semiconductor device having a lift-off process. The lift-off process includes a step of forming a resist mask having an electrode opening on an active layer of a compound semiconductor formed on a substrate of a compound semiconductor; a step of forming a metal layer on the resist mask and the active layer in the electrode opening; and a releasing step of dissolving the resist mask and removing the metal layer formed on the resist mask to leave the metal layer on the active layer in the electrode opening as an electrode. In the releasing step, the resist mask is removed sufficiently by using a resist remover essentially consisting one or more compounds selected from a group consisting of an amine-including compound and nitrogen-including cyclic compounds so that the residual resist mask need not be removed by ashing.Type: ApplicationFiled: April 9, 2003Publication date: October 16, 2003Applicants: Mitsubishi Denki Kabushiki Kaisha, EKC Technology Kabushiki KaishaInventors: Akiyoshi Kudo, Hiroshi Kobayashi, Takanori Matsumoto
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Publication number: 20030127188Abstract: A semiconductor device manufacturing system has a vacuum chamber which is provided with a cathode electrode for holding a substrate to be processed and into which a reactive gas for generating discharging plasma by the application of a high-frequency electric power is introduced, a measuring circuit which measures at least one of the impedance of a system including the plasma, the peak-to-peak voltage of a high-frequency signal applied to the plasma, and a self-bias voltage applied to the cathode electrode, and a sense circuit which compares the measured value from the measuring circuit with previously prepared data and senses the change of processing characteristics with time for the substrate in using the discharging plasma or the cleaning time of the inside of the vacuum chamber.Type: ApplicationFiled: March 17, 2000Publication date: July 10, 2003Inventors: Takanori Matsumoto, Satoshi Shimonishi, Fumio Sato, Masaki Narita
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Publication number: 20030057484Abstract: A semiconductor device comprising a semiconductor substrate having a substrate top surface on which a device is to be formed; a gate electrode electrically insulated from said semiconductor substrate by a gate-insulating film; a trench formed through said gate electrode into said semiconductor substrate to electrically isolate a device region for forming a device from the remainder region of said substrate top surface; and a boundary portion which is defined between a side surface of said trench and a bottom surface of said trench; wherein said boundary portion have spherical shapes having a curvature radius not smaller than 80 nm.Type: ApplicationFiled: September 26, 2002Publication date: March 27, 2003Applicant: Kabushiki Kaisha ToshibaInventors: Masahisa Sonoda, Hiroaki Tsunoda, Eiji Sakagami, Hidemi Kanetaka, Kenji Matsuzaki, Takanori Matsumoto
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Patent number: 6303466Abstract: A method for manufacturing a semiconductor device capable of improving properties during etching without degrading original properties of a doped oxide film as a hard mask includes a step of baking the doped oxide film after patterned but prior to etching. Thereby, changes in configuration or shape upon etching caused by absorption of moisture is prevented.Type: GrantFiled: March 20, 2000Date of Patent: October 16, 2001Assignee: Kabushiki Kaisha ToshibaInventors: Satoshi Shimonishi, Takanori Matsumoto