Patents by Inventor Takao Nishimura
Takao Nishimura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7528460Abstract: A semiconductor device capable of preventing contact between electrode terminals and a die pad as well as capable of surely performing wire bonding to the electrode terminals. A passive component is formed such that a vertical height of each electrode terminal is higher than that of an element part. More specifically, each cross-sectional area of the electrode terminals is slightly larger than that of the element part. Therefore, an upper part and lower part of each electrode terminal are slightly higher than (project from) the element part. Through an adhesive, the passive component is fixed such that the element part is located on the high position part so as to be nearly parallel to a substrate surface. Further, a part of each electrode terminal (bottom part) is located in each space within concave parts. Thus, a predetermined space is formed between each of the electrode terminals and the die pad.Type: GrantFiled: May 1, 2006Date of Patent: May 5, 2009Assignee: Fujitsu Microelectronics LimitedInventors: Takao Nishimura, Tetsuya Hiraoka
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Publication number: 20090057891Abstract: A semiconductor device includes a supporting base whereupon an electrode terminal is placed; an intermediate member mounted on said supporting base; a semiconductor element, a portion thereof being supported with said intermediate member, and placed on said supporting base; and a convex-shaped member which corresponds to the electrode terminal of said semiconductor element and placed on said supporting base or said intermediate member; wherein the electrode terminal of said semiconductor element and the electrode terminal of said supporting base are connected with a bonding wire.Type: ApplicationFiled: August 21, 2008Publication date: March 5, 2009Applicant: FUJITSU LIMITEDInventor: Takao Nishimura
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Publication number: 20090008798Abstract: A semiconductor device is provided that forms a three-dimensional semiconductor device having semiconductor devices stacked on one another. In this semiconductor device, a hole is formed in a silicon semiconductor substrate that has an integrated circuit unit and an electrode pad formed on a principal surface on the outer side. The hole is formed by etching, with the electrode pad serving as an etching stopper layer. An embedded electrode is formed in the hole. This embedded electrode serves to electrically lead the electrode pad to the principal surface on the bottom side of the silicon semiconductor substrate.Type: ApplicationFiled: September 15, 2008Publication date: January 8, 2009Applicant: FUJITSU LIMITEDInventors: Eiji Yoshida, Takao Ohno, Yoshito Akutagawa, Koji Sawahata, Masataka Mizukoshi, Takao Nishimura, Akira Takashima, Mitsuhisa Watanabe
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Publication number: 20080230950Abstract: A resin sealing method includes the steps of providing an intermediate mold between an upper mold and a lower mold, the intermediate mold having a cavity forming part where a resin sealed part is received; and introducing sealing resin into the cavity forming part of the intermediate mold and another main surface of the intermediate mold via a runner, the runner being provided in a vicinity of the cavity forming part of the intermediate mold and piercing the intermediate mold in a thickness direction.Type: ApplicationFiled: March 17, 2008Publication date: September 25, 2008Applicant: FUJITSU LIMITEDInventors: Takao NISHIMURA, Kazunari KOSAKAI
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Publication number: 20080224325Abstract: A wiring board includes a main surface where an electronic component is mounted in a face-down manner so that a surface of the electronic component having plurality of external connecting terminals faces the main surface of the wiring board, the electronic component being fixed to the wiring board by an adhesive; an insulating layer formed on the main surface where the electronic component is mounted; an opening part formed in the insulating layer so that a plurality of adjacent wiring patterns are commonly and partially opened, the adjacent wiring patterns having electrodes where electrodes of the electronic component are connected; wherein an outer periphery of the opening part situated at a center side of the wiring board is formed in an oblique direction against extending directions of the wiring patters.Type: ApplicationFiled: March 13, 2008Publication date: September 18, 2008Applicant: FUJITSU LIMITEDInventors: Takao NISHIMURA, Yoshikazu KUMAGAYA
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Publication number: 20080223608Abstract: A wiring substrate includes a plurality of electrode terminals, to which external connection terminals of an electronic component are coupled, arranged in a row on one principal surface thereof, wherein the electrode terminals each include: a first linear portion; a second linear portion extending from an end of the first linear portion in a direction different from a direction of the first linear portion; and a bent portion that is a part where the first linear portion and the second linear portion are connected.Type: ApplicationFiled: March 12, 2008Publication date: September 18, 2008Applicant: FUJITSU LIMITEDInventor: Takao NISHIMURA
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Publication number: 20080196245Abstract: A method for mounting electronic components includes a step of providing an adhesive on each of plural electronic component mounting parts on a wiring board; and a step of fixing one of the electronic components on each of the plural electronic component mounting parts via the adhesive. When the adhesive is provided on each of the plural electronic component mounting parts, the center of gravity of a volume of the adhesive provided on the mounting part where an Nth electronic component is to be mounted is shifted in a direction closer to the mounting part where an (N minus 1 or greater)th electronic component is provided neighboring and adjacent to the mounting part where the Nth electronic component is to be mounted.Type: ApplicationFiled: January 3, 2008Publication date: August 21, 2008Applicant: FUJITSU LIMITEDInventors: Takao Nishimura, Yoshiaki Narisawa
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Publication number: 20080188058Abstract: The present invention provides a method for manufacturing a semiconductor device which includes at least supplying an adhesive for bonding an electronic component which has a plurality of bumps with a substrate which has a plurality of bonding pads corresponding to the bumps, to at least a portion of the substrate, between the electronic component and the substrate, flow-casting the adhesive on the substrate by a flow-casting unit, in such a manner that the expression S1/S0>1 is satisfied, where S0 is the total contact surface area with the substrate of the adhesive supplied to the substrate, and S1 is the total contact surface area with the substrate of the adhesive after the flow-casting, and curing the adhesive while making the adhesive contact with the electronic component and the substrate in a state where the bumps are abutted against the bonding pads.Type: ApplicationFiled: April 7, 2008Publication date: August 7, 2008Applicant: FUJITSU LIMITEDInventors: Takao NISHIMURA, Kouichi Nakamura
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Publication number: 20080179738Abstract: A wiring board where an electronic component is mounted on a main surface via a bump and at least a part of the periphery of the electronic component is covered with resin, the wiring board includes a dam provided at least at a part of the periphery of an area where the electronic component is mounted, on the main surface of the wiring board; wherein a surface of the dam contacting the resin has a configuration where a curved line is continuously formed.Type: ApplicationFiled: January 4, 2008Publication date: July 31, 2008Applicant: FUJITSU LIMITEDInventors: Takao NISHIMURA, Kazuyuki AIBA
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Patent number: 7394356Abstract: An information presenting method and apparatus for a vehicle which may process display information based on a predicted direction of movement of the vehicle, detect an object near the vehicle, determine whether the object is a dangerous object, and control a presentation direction so that the display information is a direction of movement of the vehicle during operation, and if the object is a dangerous object, the information presenting method or apparatus moves the presentation direction from the direction of movement of the vehicle to a direction of the object and presents the display information of areas outside the vehicle.Type: GrantFiled: November 28, 2005Date of Patent: July 1, 2008Assignee: Denso CorporationInventors: Hajime Kumabe, Naohiko Tsuru, Takao Nishimura
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Publication number: 20080150157Abstract: A semiconductor device, includes a wiring board; a first semiconductor element mounted on the wiring board; a second semiconductor element mounted on the first semiconductor element so that a position of the second semiconductor element is shifted relative to a position of the first semiconductor element; wherein a part of a main surface of the second semiconductor element faces the first semiconductor element; and an electrode pad provided on the main surface of the second semiconductor element is connected to a second semiconductor element connection pad of the wiring board by a connection part.Type: ApplicationFiled: October 5, 2007Publication date: June 26, 2008Applicant: FUJITSU LIMITEDInventors: Takao NISHIMURA, Yoshiaki NARISAWA
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Publication number: 20080150120Abstract: In a semiconductor chip, a first semiconductor chip 21 is provided on a chip-mounting component 11, and bonding wires 36 connected to electrode pads 21E of the first semiconductor chip 21 are fixed by being covered with a first insulating adhesive 31. A second semiconductor chip 22 is mounted by being stacked on the first semiconductor chip 21, with the first insulating adhesive 31 therebetween. This structure can prevent problems such as breaking and short-circuits of bonding wires of the chip disposed directly on a substrate when another chip is mounted by being stacked.Type: ApplicationFiled: February 25, 2008Publication date: June 26, 2008Applicant: FUJITSU LIMITEDInventors: Takao Nishimura, Yoshiaki Narisawa
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Publication number: 20080042300Abstract: A circuit substrate for improving the reliability and productivity of a semiconductor device, and that semiconductor device. In a circuit substrate to which a semiconductor element is to be flip-chip mounted, at least one island-shaped electrically conductive layer is selectively disposed together with a wiring layer at an element mounting area where the semiconductor element is to be mounted, and an insulating resin layer is disposed over the island-shaped electrically conductive layer. The semiconductor element is secured at the element mounting area to the circuit substrate by an adhesion material to make a semiconductor device. With this, delaminating of the wiring layer inside the semiconductor device is suppressed, and the damage of an electrode is suppressed. The circuit substrate has high reliability and the semiconductor device, having the circuit substrate, is implemented.Type: ApplicationFiled: February 20, 2007Publication date: February 21, 2008Applicant: FUJITSU LIMITEDInventors: Takao Nishimura, Kazuyuki Aiba
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Publication number: 20080023831Abstract: To provide a small, high-performance semiconductor device in which contact between adjacent wires is prevented for increased flexibility in designing a wiring layout, and an efficient method for manufacturing the semiconductor device. The semiconductor device includes a substrate 10 having an electrode 21A arranged on its surface; and a first semiconductor element 11A which includes an electrode 22 arranged on its surface and which is supported by the substrate 10, wherein a first wire 41 is connected through a first bump 31 to at least one of the electrodes over the substrate 10 and semiconductor element 11A (i.e., at least one of the electrodes 21 and 22), and a second wire 42 is connected through a second bump 32 to a bonding portion of the wire 41.Type: ApplicationFiled: December 22, 2006Publication date: January 31, 2008Applicant: FUJITSU LIMITEDInventors: Takao Nishimura, Yoshiaki Narisawa
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Patent number: 7292940Abstract: In a vehicle control system performing collision avoiding control when a collision with a preceding vehicle cannot be avoided by normal running condition control, driving safety is improved by prompting a driver to intervene in the vehicle's control in a reliable manner. When a set switch is turned on in the “cancel” state, the transition to the “in-control, inter-vehicle distance control” sub-state occurs and an inter-vehicle distance control is performed. If a collision with a preceding vehicle cannot be avoided by the inter-vehicle distance control (if the collision alarm flag XA=1), transition to the “in-control, collision alarm” sub-state occurs and a collision alarm is generated. If the acceleration required for avoiding collision is further increased (if the collision avoiding control flag XC=1), the state transits to the “in-control, collision avoiding control” sub-state, and a collision avoiding control is performed.Type: GrantFiled: February 24, 2004Date of Patent: November 6, 2007Assignee: DENSO CORPORATIONInventors: Akira Isogai, Eiji Teramura, Takao Nishimura
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Publication number: 20070182019Abstract: To provide a high-performance, highly-reliable semiconductor device in which an adhesive used to mount (e.g., flip-chip mount) a semiconductor chip on a substrate has less air bubbles, and a low-cost, efficient method for manufacturing the same. Semiconductor device 10 of the present invention includes semiconductor chip 11 having a plurality of electrode pads 12, and substrate 14 having a plurality of electrode terminals 15 at positions corresponding to electrode pads 12. A plurality of bumps 13, each composed of base part 13A and protruding part 13B having a diameter smaller than the diameter of base part 13A, is formed on at least one of electrode pads 12 in such a way that the respective base parts 13A of bumps 13 are in contact with each other, and semiconductor chip 11 is bonded to substrate 14 with adhesive 17 in a state where bumps 13 are electrically connected to electrode terminals 15.Type: ApplicationFiled: July 17, 2006Publication date: August 9, 2007Applicant: FUJITSU LIMITEDInventor: Takao Nishimura
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Publication number: 20070170600Abstract: A semiconductor device capable of preventing contact between electrode terminals and a die pad as well as capable of surely performing wire bonding to the electrode terminals. A passive component is formed such that a vertical height of each electrode terminal is higher than that of an element part. More specifically, each cross-sectional area of the electrode terminals is slightly larger than that of the element part. Therefore, an upper part and lower part of each electrode terminal are slightly higher than (project from) the element part. Through an adhesive, the passive component is fixed such that the element part is located on the high position part so as to be nearly parallel to a substrate surface. Further, a part of each electrode terminal (bottom part) is located in each space within concave parts. Thus, a predetermined space is formed between each of the electrode terminals and the die pad.Type: ApplicationFiled: May 1, 2006Publication date: July 26, 2007Applicant: FUJITSU LIMITEDInventors: Takao Nishimura, Tetsuya Hiraoka
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Publication number: 20070132102Abstract: A relay board provided in a semiconductor device, including an entire main surface that is made of a conductive material. The relay board may further include a substrate made of the same material as at least one semiconductor element provided in the semiconductor device. The main surface of the relay board may be formed at an upper part of the substrate.Type: ApplicationFiled: March 17, 2006Publication date: June 14, 2007Applicant: FUJITSU LIMITEDInventors: Takao Nishimura, Yoshiaki Narisawa, Yoshikazu Kumagaya
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Patent number: 7217993Abstract: A stacked-type semiconductor device includes a first wiring substrate on which a semiconductor device element is mounted, a second wiring substrate stacked on the first wiring substrate through a plurality of electrode terminals which are electrically connected with the first wiring substrate, and a conductor supporting member disposed around the semiconductor device element, and connected with grounding wiring layers provided in the first and second wiring substrate.Type: GrantFiled: June 16, 2004Date of Patent: May 15, 2007Assignee: Fujitsu LimitedInventor: Takao Nishimura
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Publication number: 20070075437Abstract: A relay board provided in a semiconductor device includes a first terminal, and a plurality of second terminals connecting to the first terminal by a wiring. The wiring connecting to the first terminal is split on the way so that the wiring connects to each of the second terminals.Type: ApplicationFiled: December 7, 2005Publication date: April 5, 2007Applicant: FUJITSU LIMITEDInventors: Takao Nishimura, Kouichi Nakamura