Patents by Inventor Takao Yamazaki

Takao Yamazaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11143257
    Abstract: A steel wire for a spring includes a steel wire that has Ca or Na adhered thereto in an amount of 0.2 g/m2 or less. The steel wire has an oxide film on a surface thereof, and the oxide film has a thickness of, for example, from 2.0 ?m to 20 ?m.
    Type: Grant
    Filed: January 24, 2017
    Date of Patent: October 12, 2021
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Takafumi Uwano, Taketoshi Sasaki, Takao Yamazaki
  • Publication number: 20190101176
    Abstract: A steel wire for a spring has Ca or Na adhered thereto in an amount of 0.2 g/m2 or less.
    Type: Application
    Filed: January 24, 2017
    Publication date: April 4, 2019
    Applicant: Sumitomo (SEI) Steel Wire Corp.
    Inventors: Takafumi Uwano, Taketoshi Sasaki, Takao Yamazaki
  • Patent number: 9157805
    Abstract: According to the present invention, the gas adsorption capability of a getter can be maintained while the characteristics of an infrared ray sensor element are prevented from being deteriorated. An infrared ray sensor package has an infrared ray sensor element, a base substrate, a housing, an infrared ray transmission window, and a getter. The infrared ray sensor element is vacuum-sealed in a space surrounded by the base substrate, the housing, and the infrared ray transmission window. A spacer is disposed between the infrared ray sensor element and the base substrate to form a gap between the infrared ray sensor element and the base substrate. The getter is arranged in the gap formed between the infrared ray sensor element and the base substrate. A heat shielding member is disposed between the infrared ray sensor element and the getter. The heat shielding member is a heater for heating the infrared ray sensor element or an element formed of alloy containing Ni or heat-resistant glass.
    Type: Grant
    Filed: March 18, 2013
    Date of Patent: October 13, 2015
    Assignee: NEC CORPORATION
    Inventors: Takao Yamazaki, Seiji Kurashina
  • Patent number: 8956915
    Abstract: Provided is a semiconductor device including a flexible circuit board which includes a first external electrode provided on a first face and second and third external electrodes provided on a second face; a plurality of memory devices and passive components; a supporter which is provided with a groove on one face; and a computing processor device. The memory devices and the passive components are connected to the first external electrode, the one face of the supporter is bonded on the first face of the flexible circuit board so that the groove houses the memory devices and the passive components. The flexible circuit board is bent along a perimeter of the supporter to be wrapped around a side face and another face of the supporter. On the flexible circuit board, the second external electrode is provided on the second face which is opposite to the first external electrode, and the third external electrode is provided on the second face which is bent to the another face of the supporter.
    Type: Grant
    Filed: November 19, 2012
    Date of Patent: February 17, 2015
    Assignees: NEC Corporation, NEC AccessTechnica Ltd.
    Inventors: Takao Yamazaki, Shinji Watanabe, Shizuaki Masuda, Katsuhiko Suzuki
  • Patent number: 8785853
    Abstract: An infrared sensor package includes a housing member, which includes an upper-surface section provided with a transmission member which transmits infrared radiation and a lower-surface section and whose inner space is vacuum-sealed, a plate-like heater member which is disposed within the inner space of the housing member and generates heat, an infrared detection element which is fixed onto the heater member and detects the infrared radiation which is transmitted by the transmission member, and a heat-insulating member which has a low thermal conductivity and a smaller cross-sectional area than that of the heater member, and supports the heater member while being fixed onto the lower-surface section.
    Type: Grant
    Filed: December 6, 2011
    Date of Patent: July 22, 2014
    Assignee: NEC Corporation
    Inventors: Takao Yamazaki, Koji Kato, Tokuhito Sasaki
  • Publication number: 20140022718
    Abstract: A vacuum sealed package includes a package main body portion in which a first main body portion and a second main body portion are bonded via a hollow portion, and a getter material and an electronic device that are provided within the hollow portion, and in the state of the hollow portion being evacuated via a through-hole that brings the inside and the outside of the hollow portion into communication, the package main body portion is sealed with a sealing member, the getter material and the electronic device are connected to a first conductor pad and a second conductor pad, the first conductor pad is connected with a third conductor pad via a thermally conductive material, and the second conductor pad is electrically connected with a fourth conductor pad on a wiring substrate.
    Type: Application
    Filed: September 23, 2013
    Publication date: January 23, 2014
    Applicant: NEC CORPORATION
    Inventors: TAKAO YAMAZAKI, MASAHIKO SANO, SEIJI KURASHINA
  • Publication number: 20130291380
    Abstract: The present invention is: a package main body section having a hollow section; and an electronic device provided in the hollow section in the package main body section, in the package main body section, there being formed a through hole, through which the hollow section communicates with outside of the package main body section, and in the through hole, there being provided a sealing section in which a vicinity of the through hole is partly heated and a constituent material of the package main body section is melted to thereby block the through hole.
    Type: Application
    Filed: July 2, 2013
    Publication date: November 7, 2013
    Applicant: NEC CORPORATION
    Inventors: TAKAO YAMAZAKI, MASAHIKO SANO, SEIJI KURASHIMA, YOSHIMICHI SOGAWA
  • Publication number: 20130234295
    Abstract: Passivation films 3a, 3b are formed to cover both surfaces of semiconductor substrate 1 which comprises terminal pads 2a, 2b on both surfaces. Openings 3c, 3d are provided at positions on passivation films 3a. 3b which match with terminal pads 2a, 2b. Throughholes 9 are formed inside of openings 3c, 3d to extend through terminal pad 2a, semiconductor substrate 1, and terminal pad 2b. Insulating layer 4 made of SiO2, SiN, SiO, or the like is formed on the inner surfaces of throughholes 9. Buffer layer 5 made of a conductive adhesive is formed to cover insulating layer 4 and terminal pads 2a, 2b in openings 3c, 3d. Further, conductive layer 6 made of a metal film is formed on buffer layer 5 by electrolytic plating, non-electrolytic plating, or the like.
    Type: Application
    Filed: April 16, 2013
    Publication date: September 12, 2013
    Applicants: RENESAS ELECTRONICS CORPORATION, NEC CORPORATION
    Inventors: Yoshimichi Sogawa, Takao Yamazaki, Ichirou Hazeyama, Sakae Kitajou, Nobuaki Takahashi
  • Patent number: 8525323
    Abstract: The present invention is: a package main body section having a hollow section; and an electronic device provided in the hollow section in the package main body section, in the package main body section, there being formed a through hole, through which the hollow section communicates with outside of the package main body section, and in the through hole, there being provided a sealing section in which a vicinity of the through hole is partly heated and a constituent material of the package main body section is melted to thereby block the through hole.
    Type: Grant
    Filed: January 28, 2009
    Date of Patent: September 3, 2013
    Assignee: NEC Corporation
    Inventors: Takao Yamazaki, Masahiko Sano, Seiji Kurashina, Yoshimichi Sogawa
  • Patent number: 8411450
    Abstract: The present invention is directed to provide a semiconductor package and the like realizing reduced manufacturing cost and improved reliability by enhancing a ground line and/or a power supply line. A semiconductor package 50 includes: a semiconductor device 1 including a circuit face on which an external electrode is formed; an insertion substrate 2 forming a housing part in which the semiconductor device 1 is disposed; and an interposer substrate 5 including a wiring pattern 7 and whose both ends are bent along the insertion substrate 2. The insertion substrate 2 is made of a conductive material and is electrically connected to a ground line or a power supply line in the wiring pattern 7 in the interposer substrate 5.
    Type: Grant
    Filed: January 25, 2007
    Date of Patent: April 2, 2013
    Assignee: NEC Corporation
    Inventors: Takao Yamazaki, Yoshimichi Sogawa, Tomohiro Nishiyama
  • Patent number: 8338940
    Abstract: Provided is a semiconductor device including a flexible circuit board which includes a first external electrode provided on a first face and second and third external electrodes provided on a second face; a plurality of memory devices and passive components; a supporter which is provided with a groove on one face; and a computing processor device. The memory devices and the passive components are connected to the first external electrode, the one face of the supporter is bonded on the first face of the flexible circuit board so that the groove houses the memory devices and the passive components. The flexible circuit board is bent along a perimeter of the supporter to be wrapped around a side face and another face of the supporter. On the flexible circuit board, the second external electrode is provided on the second face which is opposite to the first external electrode, and the third external electrode is provided on the second face which is bent to the another face of the supporter.
    Type: Grant
    Filed: March 26, 2009
    Date of Patent: December 25, 2012
    Assignees: NEC Corporation, NEC Accesstechnia Ltd.
    Inventors: Takao Yamazaki, Shinji Watababe, Shizuaki Masuda, Katsuhiko Suzuki
  • Patent number: 8236616
    Abstract: There is provided a low-cost semiconductor device that commercial and quality-assured (inspected) chip size packages can be stacked and has a small co-planarity value and a high mounting reliability. A semiconductor device in which a flexible circuit substrate is adhered to at least a part of a lateral side of a semiconductor package, and the flexible circuit substrate, which is on a side facing solder balls of the semiconductor package, is folded at a region inside of an edge of the semiconductor package.
    Type: Grant
    Filed: February 3, 2011
    Date of Patent: August 7, 2012
    Assignee: NEC Corporation
    Inventor: Takao Yamazaki
  • Publication number: 20120181683
    Abstract: A three-dimensionally integrated semiconductor device includes a flexible circuit substrate which has a lower portion, an upper portion, and at least one side portion, a support body which supports the upper portion of the flexible circuit substrate, and at least two devices mounted on the flexible circuit substrate and wherein at least one of the devices is mounted on an upper surface of the lower portion of the flexible circuit substrate, at least one of the other devices is mounted on a lower surface of the upper portion of the flexible circuit substrate, and a gap is provided between the device mounted on the upper surface of the lower portion of the flexible circuit substrate and the device mounted on the lower surface of the upper portion of the flexible circuit substrate.
    Type: Application
    Filed: January 17, 2012
    Publication date: July 19, 2012
    Inventors: TAKAO YAMAZAKI, Shizuaki Masuda
  • Publication number: 20120138803
    Abstract: An infrared sensor package includes a housing member, which includes an upper-surface section provided with a transmission member which transmits infrared radiation and a lower-surface section and whose inner space is vacuum-sealed, a plate-like heater member which is disposed within the inner space of the housing member and generates heat, an infrared detection element which is fixed onto the heater member and detects the infrared radiation which is transmitted by the transmission member, and a heat-insulating member which has a low thermal conductivity and a smaller cross-sectional area than that of the heater member, and supports the heater member while being fixed onto the lower-surface section.
    Type: Application
    Filed: December 6, 2011
    Publication date: June 7, 2012
    Inventors: TAKAO YAMAZAKI, Koji Kato, Tokuhito Sasaki
  • Publication number: 20120106085
    Abstract: A vacuum sealed package includes a package main body portion in which a first main body portion and a second main body portion are bonded via a hollow portion, and a getter material and an electronic device that are provided within the hollow portion, and in the state of the hollow portion being evacuated via a through-hole that brings the inside and the outside of the hollow portion into communication, the package main body portion is sealed with a sealing member, the getter material and the electronic device are connected to a first conductor pad and a second conductor pad, the first conductor pad is connected with a third conductor pad via a thermally conductive material, and the second conductor pad is electrically connected with a fourth conductor pad on a wiring substrate.
    Type: Application
    Filed: January 27, 2010
    Publication date: May 3, 2012
    Inventors: Takao Yamazaki, Masahiko Sano, Seiji Kurashina
  • Patent number: 8130503
    Abstract: A mounting structure comprises at least one semiconductor device having solder bumps on a lower surface thereof as outer terminals and a flexible wiring board with wiring formed thereon. The semiconductor device is wrapped in a flexible wiring board; the mounting structure is provided with outer electrodes on both of a side on which the outer terminals of the semiconductor device are formed and an opposite side thereto; at least one wiring layer is formed on the flexible wiring board; and a supporting member is affixed between a lower surface of the semiconductor device on which the outer terminals are formed and the flexible wiring board.
    Type: Grant
    Filed: March 26, 2009
    Date of Patent: March 6, 2012
    Assignee: NEC Corporation
    Inventors: Shinji Watanabe, Takao Yamazaki
  • Patent number: 8120921
    Abstract: A device having electronic components mounted therein has a first electronic component having an external terminal on a first surface and a heat spreader on a second surface, at least one second electronic component that is placed in the direction of a second surface of the first electronic component, a flexible circuit board that is electrically connected to the first electronic component and at least one second electronic component, and at least the part to which at least one second electronic component is connected is located on the second surface side of the first electronic component, and a spacer that is located between at least part of the flexible circuit board and the second surface of the first electronic component. The spacer can prevent heat from the first electronic component from being directly transferred to the second electronic component.
    Type: Grant
    Filed: July 18, 2008
    Date of Patent: February 21, 2012
    Assignees: NEC Corporation, NEC Access Technica, Ltd.
    Inventors: Takao Yamazaki, Shinji Watanabe, Tomoo Murakami, Yuuki Fujimura, Ryoji Osu, Katsuhiko Suzuki, Shizuaki Masuda, Nobuyuki Sato, Kikuo Wada
  • Publication number: 20120028419
    Abstract: There is provided a low-cost semiconductor device that commercial and quality-assured (inspected) chip size packages can be stacked and has a small co-planarity value and a high mounting reliability. A semiconductor device in which a flexible circuit substrate is adhered to at least a part of a lateral side of a semiconductor package, and the flexible circuit substrate, which is on a side facing solder balls of the semiconductor package, is folded at a region inside of an edge of the semiconductor package (FIG. 1).
    Type: Application
    Filed: February 3, 2011
    Publication date: February 2, 2012
    Inventor: TAKAO YAMAZAKI
  • Patent number: 8093709
    Abstract: There is provided a low-cost semiconductor device that commercial and quality-assured (inspected) chip size packages can be stacked and has a small co-planarity value and a high mounting reliability. A semiconductor device in which a flexible circuit substrate is adhered to at least a part of a lateral side of a semiconductor package, and the flexible circuit substrate, which is on a side facing solder balls of the semiconductor package, is folded at a region inside of an edge of the semiconductor package (FIG. 1).
    Type: Grant
    Filed: February 10, 2011
    Date of Patent: January 10, 2012
    Assignee: NEC Corporation
    Inventor: Takao Yamazaki
  • Patent number: 8093706
    Abstract: A mounting structure includes: at least one semiconductor device having solder bumps as outer terminals and a flexible wiring board with wiring formed thereon. The semiconductor device is structured to be wrapped by the flexible wiring board, the mounting structure is provided with outer electrodes on both sides of the flexible wiring board, one side being a side where outer terminals of the semiconductor device are formed, and the other side being an opposite side thereof. At least one wiring layer is formed on the flexible wiring board. A supporting member is provided covering side faces and a surface of the semiconductor device opposite to the side where the outer terminals are formed and protruding from the side faces of the semiconductor device and extending toward the surface on which the outer terminals are formed.
    Type: Grant
    Filed: March 24, 2009
    Date of Patent: January 10, 2012
    Assignee: NEC Corporation
    Inventors: Shinji Watanabe, Takao Yamazaki