Abstract: An automatic disc changer has a casing for the automatic disc changer, and a plurality of disc holders arranged in the casing. The disc holder stores a plurality of discs in vertical position so that each disc can be removed from the disc holder. A plurality of reproducing devices are provided in the casing to be moved along the disc holder. The reproducing device has an opening at a side confronting the disc holder. A loading arm is provided for loading the disc passing through the opening. A wire is connected to opposite sides of the casing along the disc holders so as to prevent the disc stored in the disc holder from removing. A plurality of rollers are disposed in the reproducing device around the opening. The wire is engaged with the rollers so as not to obstruct the opening and to allow each reproducing device to be independently moved from the other reproducing device.

Abstract: An automatic disc changer has a casing for the automatic disc changer, and a plurality of disc holders arranged in the casing. The disc holder stores a plurality of disks in vertical positions. A reproducing device is provided in the casing to be moved along the disc holder. A movable frame is provided on the disc holder to be shifted by a pitch of the space in a direction of the arrangement of the disc holders. A plurality of guide projections are provided on the movable frame, which are disposed adjacent to ends of the holding plates. The guide projections are arranged by a pitch which is twice as much as the pitch of the space. Each guide projection has a triangular section, the bottom of which is approximately equal to a width of the space, so as to close a corresponding space.

Abstract: A multiplying circuit for forming a partial product in accordance with a Booth's algorithm, performing a sign correcting process of the partial product, and adding the partial product so as to multiply a multiplicand by a multiplier, includes: initial value setting circuit for setting an initial value and for supplying data necessary for the sign correcting process and adding circuit for adding the partial product and data supplied from a preceding circuit. The initial value setting circuit is adapted to output the data necessary for the sign correcting process in a format where the data accords with at least a part of a data input format of the adding circuit. In the adding circuit at least a part of a data input format of data thereof is the same as at least a part of a data output format thereof.

Abstract: In a sampling rate converter for converting a sampling frequency L of a digital signal to a sampling frequency M (L:M conversion) or for converting a sampling frequency M of a digital signal to a sampling frequency L (M:L conversion), the same filter coefficients are utilized and a constant predetermined DC gain is maintained for both conversions. An over-sampler multiplies the sampling frequency L or M by M or L, respectively, during the L:M conversion and the M:L conversion, respectively. A filter, which receives the output of the over-sampler, restricts the frequency band of the output.

Abstract: In order to improve mixing efficiency of highly viscous fluid, while structural simplicity being maintained, two types of stirring impellers are employed in a single stirring apparatus. One of such stirring impellers is a large flat impeller and the other is a slanted or screw-shaped impeller to cause an up-and-down flow. This principle is further utilized in a stirring tower type polymerization reaction apparatus which has an array of mixing areas, each of which corresponds to the stirring apparatus above, and partitions between the mixing areas. The partitions are disposed so that the temperature of reaction can be controlled easily. Undesirable effects such as "dead space", space in which flow is insufficient, and the attachment of gelled material to the rotational shaft can be avoided while rather obvious, but no less important, advantages of efficient and uniform mixing, etc., are secured.

Abstract: A digital adder circuit has a plurality of adders for adding binary numbers. A carry calculator calculates carry data to a higher bit on the basis of added results of the plurality of adders, and a carry corrector adds the carry data to the added results of the plurality of adders. An accumulator accumulates a plurality of binary numbers sequentially supplied thereto. The accumulator includes more than two adders of a plurality of bits, a delay register for delaying each of outputs and each of carry outputs of the adders by a predetermined time. The binary numbers sequentially supplied thereto and a delayed output of the delay register are sequentially added by the adders, and a carry corrector supplied with an accumulated result expressed as redundant by each of outputs of the adders corrects each of the outputs by each of the carry outputs to generate an accumulated added result having no redundancy.

Abstract: A digital filter has an input terminal provided with an input digital signal. A delay circuit connected to the input terminal produces a plurality of delayed digital signals each having a different delay time with respect to the input digital signal. A first circuit adds the input digital signal and/or the plurality of delayed digital signals to one or more digital coefficient signals of the same value so as to produce one or more added digital signals. A circuit multiplies the one or more respective digital coefficient signals by the one or more added digital signals and/or one or more of the plurality of delayed digital signals to produce a plurality of multiplied digital signals.

Abstract: In an IIR digital filter, the same polynomial is multiplied to both the denominator and the numerator of the system function for the IIR digital filter so as to eliminate the first order term from the denominator of the system function. Thereby, an IIR digital filter for a high-speed signal can be attained using an operation element of relatively low speed and small power consumption.

Abstract: A digital multiplying circuit in a parallel multiplying circuit which can multiply an input which changes at a high data rate by the pipeline processing. A multiplicand is inputted to this circuit. Partial product signal generating circuits of the number corresponding to only the number of partial product signals which are needed are provided. The partial product signal generating circuits produce the partial product signals in accordance with the state of predetermined bits of a multiplier. Each partial product signal is added, thereby obtaining a multiplication output of the multiplicand. The pipeline processing is performed in the adding operation of each partial product signal. The multiplier and multiplicand are delayed. The predetermined partial product signal generating circuits are arranged immediately before the adders which need the partial product signals, thereby obtaining the partial product.

Abstract: A cutting method to be applied to producing helical springs by cold-forming a thick high-strength wire having a tensile strength in the range of 1765 to 2157 N/mm.sup.2 and a diameter in the range of 8 to 16 mm on a coiling machine, and then the wire is cut at the end coil of the coiled portion to provide a helical spring. A predetermined range about a position on the wire at a distance coresponding to the length of wire in the helical spring from the free end of the wire fed to the coiling machine is heated to a temperature within a predetermined temperature range. Therefore, the end coil of the helical spring is formed by the heated portion of the wire, and hence the helical spring is cut off the wire at a position in the heated portion.

Abstract: There is provided a digital time base corrector in which a digital input signal of one block consisting of a continuous data time sequence is converted to a digital signal including data lack intervals or vice versa by a variable delay circuit. A signal selecting circuit is divided into N first unit selecting circuits and a second unit selecting circuit. M of the output signals of a shift register are inputted to the first unit selecting circuits, by which one of them is selected. The outputs of the N first unit selecting circuits are supplied to the second unit selecting circuit, by which one of them is selected. A pipeline process is performed by inserting a delay circuit to delay the signal for the time of one clock period into the input/output line of the second unit selecting circuit. Further, the selecting signal can be made variable for every one clock and a delay circuit is inserted on the output side of a selecting signal forming circuit.

Abstract: The present invention relates to a high-strength spring steel and its manufacturing process. More specifically, it relates to a high-strength spring steel characterized in that it is obtained by heating the surface of the material steel to over the AC.sub.3 transformation point by the high-frequency induction heating or the like, stopping the heating and then decreasing the surface temperature of said material steel to below the Ar.sub.1 transformation point, this short-time heating of the surface being repeated to secure heating throughout the entire steel body or a condition close to it, under which the steel is quenched, whereby the crystal grains in the steel become increasingly finer from the core to the surface layer of the steel, the crystal grain size of the metal in the surface layer being extraordinarily fine; the invention also relates to the process of manufacturing the steel.

Abstract: A restriction indicator having a contactless switch device for indicating a restriction in filter elements of fluid filters having an intake side and a negative pressure side. The restriction indicator includes a photointerrupter having a light emitting device and a light receiving device. The light receiving device provides an electrical signal indicative of increased negative pressure in the negative pressure side.