Patents by Inventor Takashi Ide

Takashi Ide has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240142707
    Abstract: A virtual image display device includes a display panel being a display element configured to emit image light, a light-guiding member including a first total reflection surface and a second total reflection surface, a first diffraction element being provided on a light incidence side in association with the light-guiding member, a second diffraction element being provided on a light emission side in association with the light-guiding member, and a stray light suppression filter being provided on an external side of an image extraction part provided with the second diffraction element and being configured to limit passage of diffracted light from the second diffraction element.
    Type: Application
    Filed: October 25, 2023
    Publication date: May 2, 2024
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Katsutoshi INOMOTO, Mitsutaka IDE, Masayuki TAKAGI, Takashi TAJIRI
  • Publication number: 20240120168
    Abstract: An electron beam emitted from a photoexcited electron gun is increased in luminance. An electron gun 15 includes: a photocathode 1 including a substrate 11 and a photoelectric film 10; a light source 7 that emits pulsed excitation light; a condenser lens 2 that focuses the pulsed excitation light toward the photocathode; and an extractor electrode 3 that faces the photocathode and that accelerates an electron beam generated from the photoelectric film by focusing the pulsed excitation light by the condenser lens, transmitting the pulsed excitation light through the substrate of the photocathode, and causing the pulsed excitation light to be incident on the photocathode. The pulsed excitation light is condensed at different timings at different positions on the photoelectric film of the photocathode.
    Type: Application
    Filed: October 31, 2019
    Publication date: April 11, 2024
    Applicants: Hitachi High-Tech Corporation, Hitachi High-Tech Corporation
    Inventors: Takashi Ohshima, Hideo Morishita, Tatsuro Ide, Naohiro Kohmu, Momoyo Enyama, Yoichi Ose, Toshihide Agemura, Junichi Katane
  • Patent number: 11933897
    Abstract: A distance measurement device includes: a mirror disposed so as to be tilted relative to a rotation center axis; a drive unit configured to rotate the mirror about the rotation center axis; a photodetector configured to detect reflected light, of laser light, reflected in a distance measurement region; and a condensing lens disposed on the rotation center axis and configured to condense the reflected light reflected by the mirror, on the photodetector. The mirror has a shape elongated in one direction and is disposed such that a short axis thereof is tilted relative to the rotation center axis in a direction parallel to a plane including the rotation center axis. A width in a short-axis direction of the mirror is smaller than a width of a lens portion of the condensing lens as viewed in a direction parallel to the rotation center axis.
    Type: Grant
    Filed: October 1, 2020
    Date of Patent: March 19, 2024
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Kazuhisa Ide, Masaomi Inoue, Hirotaka Ueno, Kouichi Kumamaru, Masahiro Shiihara, Kouichi Bairin, Takashi Haruguchi, Kiyoshi Hibino
  • Patent number: 11216337
    Abstract: A memory system includes a nonvolatile memory, a memory controller included in a first package, and a memory interface circuit included in a second package that is different from the first package. The memory controller includes an encoder for performing encoding for error correction. The memory controller is configured to encode first data into second data using the encoder, and program the second data into a location in the nonvolatile memory. The memory interface circuit is interposed between the memory and the memory controller. The memory interface circuit includes a decoder for performing decoding for error correction. The memory interface circuit is configured to read third data from a first location in the nonvolatile memory, diagnose the third data by decoding the third data using the decoder, and convey a result of the diagnosis to the memory controller.
    Type: Grant
    Filed: March 30, 2020
    Date of Patent: January 4, 2022
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Takashi Ide, Yoshihisa Kojima
  • Patent number: 11015740
    Abstract: A support member-attached wire harness includes a wire harness including an electrical wire and a support member that includes a fitting portion formed in a partially cylindrical shape that is opened partially in a circumferential direction so as to be capable of being fitted to an outer peripheral portion of a bar-shaped member. On at least one of the wire harness and the support member, a support portion for supporting the wire harness disposed along an outer periphery of the fitting portion at a fixed position with respect to the fitting portion is formed.
    Type: Grant
    Filed: June 1, 2018
    Date of Patent: May 25, 2021
    Assignees: AUTONETWORKS TECHNOLOGIES, LTD., SUMITOMO WIRING SYSTEMS, LTD., SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Haruka Nakano, Shigeki Ikeda, Daisuke Fukai, Tetsuya Nishimura, Motohiro Yokoi, Housei Mizuno, Takashi Ide, Daiki Nagayasu, Daisuke Ebata
  • Patent number: 10985542
    Abstract: An object of the present invention is to reduce the constraints on the mounting of a wire protecting protector to a wire, while achieving a reduction in the weight of the wire protecting protector. A wire protecting protector is made of a foamed resin and is formed in a shape having a wire housing recess capable of housing a wire, and a surface of the wire protecting protector that includes an inner circumferential surface on the wire housing recess side is a surface formed through molding. Preferably, a reinforcing film is formed on at least a part of the surface of the wire protecting protector.
    Type: Grant
    Filed: March 22, 2018
    Date of Patent: April 20, 2021
    Assignee: SUMITOMO WIRING SYSTEMS, LTD.
    Inventors: Takashi Ide, Junya Yonekawa, Tsutomu Sakata, Daiki Nagayasu
  • Publication number: 20200231924
    Abstract: Provided are a substrate for test use that is preferable for use in a test such as a culture test, and a method for manufacturing the substrate for test use. The substrate for test use, in which a solution retaining part for retaining water or an aqueous solution, is formed at a surface of a substrate of polydimethylsiloxane (PDMS). The solution retaining part is a concave part having a hydrophilic surface layer. The surface layer has a maximum thickness of 1 ?m or larger.
    Type: Application
    Filed: May 17, 2018
    Publication date: July 23, 2020
    Applicants: IWASAKI ELECTRIC CO., LTD., NATIONAL INSTITUTES FOR QUANTUM AND RADIOLOGICAL SCIENCE AND TECHNOLOGY
    Inventors: Shinobu KINOSHITA, Takashi IDE, Tomoko OYAMA, Mitsumasa TAGUCHI, Bin Jeremiah Duenas BARBA
  • Publication number: 20200226022
    Abstract: A memory system includes a nonvolatile memory, a memory controller included in a first package, and a memory interface circuit included in a second package that is different from the first package. The memory controller includes an encoder for performing encoding for error correction. The memory controller is configured to encode first data into second data using the encoder, and program the second data into a location in the nonvolatile memory. The memory interface circuit is interposed between the memory and the memory controller. The memory interface circuit includes a decoder for performing decoding for error correction. The memory interface circuit is configured to read third data from a first location in the nonvolatile memory, diagnose the third data by decoding the third data using the decoder, and convey a result of the diagnosis to the memory controller.
    Type: Application
    Filed: March 30, 2020
    Publication date: July 16, 2020
    Applicant: TOSHIBA MEMORY CORPORATION
    Inventors: Takashi IDE, Yoshihisa KOJIMA
  • Patent number: 10649844
    Abstract: A memory system includes a nonvolatile memory, a memory controller included in a first package, and a memory interface circuit included in a second package that is different from the first package. The memory controller includes an encoder for performing encoding for error correction. The memory controller is configured to encode first data into second data using the encoder, and program the second data into a location in the nonvolatile memory. The memory interface circuit is interposed between the memory and the memory controller. The memory interface circuit includes a decoder for performing decoding for error correction. The memory interface circuit is configured to read third data from a first location in the nonvolatile memory, diagnose the third data by decoding the third data using the decoder, and convey a result of the diagnosis to the memory controller.
    Type: Grant
    Filed: March 14, 2018
    Date of Patent: May 12, 2020
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Takashi Ide, Yoshihisa Kojima
  • Publication number: 20200141518
    Abstract: A support member-attached wire harness includes a wire harness including an electrical wire and a support member that includes a fitting portion formed in a partially cylindrical shape that is opened partially in a circumferential direction so as to be capable of being fitted to an outer peripheral portion of a bar-shaped member. On at least one of the wire harness and the support member, a support portion for supporting the wire harness disposed along an outer periphery of the fitting portion at a fixed position with respect to the fitting portion is formed.
    Type: Application
    Filed: June 1, 2018
    Publication date: May 7, 2020
    Applicants: AutoNetworks Technologies, Ltd., Sumitomo Wiring Systems, Ltd., SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Haruka NAKANO, Shigeki IKEDA, Daisuke FUKAI, Tetsuya NISHIMURA, Motohiro YOKOI, Housei MIZUNO, Takashi IDE, Daiki NAGAYASU, Daisuke EBATA
  • Publication number: 20200112152
    Abstract: An object of the present invention is to reduce the constraints on the mounting of a wire protecting protector to a wire, while achieving a reduction in the weight of the wire protecting protector. A wire protecting protector is made of a foamed resin and is formed in a shape having a wire housing recess capable of housing a wire, and a surface of the wire protecting protector that includes an inner circumferential surface on the wire housing recess side is a surface formed through molding. Preferably, a reinforcing film is formed on at least a part of the surface of the wire protecting protector.
    Type: Application
    Filed: March 22, 2018
    Publication date: April 9, 2020
    Inventors: Takashi IDE, Junya YONEKAWA, Tsutomu SAKATA, Daiki NAGAYASU
  • Publication number: 20200071573
    Abstract: An adhesive sheet including a substrate and adhesive layers that are arranged on one surface of the substrate with a primer layer being interposed therebetween, wherein the adhesive layers include a natural rubber and a tackifier, the adhesive sheet has a volume resistivity of 1×1010? cm or more and a tensile modulus at 100% elongation of 50 MPa or less as determined in accordance with JIS K 6251, the adhesive layers have a probe tack of 10N/cm2 or less as determined in accordance with ASTM D 2979, the adhesive force between the adhesive layers having a width of 15 mm is 1.5 N or more, and the adhesive force between the substrate and the adhesive layers having a width of 15 mm is 1.5 N or less.
    Type: Application
    Filed: March 15, 2018
    Publication date: March 5, 2020
    Applicants: DENKA COMPANY LIMITED, SUMITOMO WIRING SYSTEMS, LTD.
    Inventors: Manabu YOKOZUKA, Mizuki HASUMI, Manabu KUME, Takashi IDE
  • Patent number: 10566183
    Abstract: Characteristics of a semiconductor device are improved. A method of manufacturing a semiconductor device of the invention includes a step of forming a gate insulating film over a nitride semiconductor layer. The step includes steps of forming a crystalline Al2O3 film on the nitride semiconductor layer, forming a SiO2 film on the Al2O3 film, and forming an amorphous Al2O3 film on the SiO2 film. The step further includes steps of performing heat treatment on the amorphous Al2O3 to crystallize the amorphous Al2O3, thereby forming a crystalline Al2O3 film, and forming a SiO2 film on the crystalline Al2O3 film. In this way, since a film stack, which is formed by alternately stacking the crystalline Al2O3 films and the SiO2 films from a bottom side, is used as the gate insulating film, threshold voltage can be cumulatively increased.
    Type: Grant
    Filed: August 2, 2018
    Date of Patent: February 18, 2020
    Assignee: Renesas Electronics Corporation
    Inventors: Yasuhiro Okamoto, Takashi Ide
  • Publication number: 20190076913
    Abstract: Pin body has lightening hole having one-end-side and another-end-side large diameter parts formed on both end sides in the longitudinal direction; a central small diameter part; one-end-side and another-end-side first rounded parts each being provided between the large diameter part and the central small diameter part, having an inner diameter decreasing from each large diameter part side toward the central small part side, and having a rate of change of the inner diameter increasing from each large diameter part side toward the central small diameter part side; and one-end-side and another-end-side second rounded parts each being provided between each first rounded part and the central small diameter part, having an inner diameter decreasing from each first rounded part toward the central small diameter part side, and having a rate of change of the inner diameter decreasing from each first rounded part toward the central small diameter part side.
    Type: Application
    Filed: January 20, 2017
    Publication date: March 14, 2019
    Applicant: HITACHI AUTOMOTIVE SYSTEMS, LTD.
    Inventors: Yuto HIGASA, Shin KOIZUMI, Minoru ZENKE, Takashi IDE
  • Publication number: 20190074174
    Abstract: Characteristics of a semiconductor device are improved. A method of manufacturing a semiconductor device of the invention includes a step of forming a gate insulating film over a nitride semiconductor layer. The step includes steps of forming a crystalline Al2O3 film on the nitride semiconductor layer, forming a SiO2 film on the Al2O3 film, and forming an amorphous Al2O3 film on the SiO2 film. The step further includes steps of performing heat treatment on the amorphous Al2O3 to crystallize the amorphous Al2O3, thereby forming a crystalline Al2O3 film, and forming a SiO2 film on the crystalline Al2O3 film. In this way, since a film stack, which is formed by alternately stacking the crystalline Al2O3 films and the SiO2 films from a bottom side, is used as the gate insulating film, threshold voltage can be cumulatively increased.
    Type: Application
    Filed: August 2, 2018
    Publication date: March 7, 2019
    Inventors: Yasuhiro OKAMOTO, Takashi IDE
  • Publication number: 20180276073
    Abstract: A memory system includes a nonvolatile memory, a memory controller included in a first package, and a memory interface circuit included in a second package that is different from the first package. The memory controller includes an encoder for performing encoding for error correction. The memory controller is configured to encode first data into second data using the encoder, and program the second data into a location in the nonvolatile memory. The memory interface circuit is interposed between the memory and the memory controller. The memory interface circuit includes a decoder for performing decoding for error correction. The memory interface circuit is configured to read third data from a first location in the nonvolatile memory, diagnose the third data by decoding the third data using the decoder, and convey a result of the diagnosis to the memory controller.
    Type: Application
    Filed: March 14, 2018
    Publication date: September 27, 2018
    Applicant: TOSHIBA MEMORY CORPORATION
    Inventors: Takashi IDE, Yoshihisa KOJIMA
  • Patent number: 10074740
    Abstract: To enhance electromigration resistance of an electrode. A drain electrode is partially formed on a side surface of a drain pad. In this case, the drain electrode is integrated with the drain pad and extends from the side surface of the drain pad in a first direction (y direction). A recessed portion is located in a region overlapping with the drain electrode in a plan view. At least a part of the drain electrode is buried in the recessed portion. A side surface of the recessed portion, which faces the drain pad, enters the drain pad in the first direction (y direction).
    Type: Grant
    Filed: July 5, 2017
    Date of Patent: September 11, 2018
    Assignee: Renesas Electronics Corporation
    Inventors: Hideaki Tsuchiya, Hiroshi Kimura, Takashi Ide, Yorinobu Kunimune
  • Publication number: 20170301782
    Abstract: To enhance electromigration resistance of an electrode. A drain electrode is partially formed on a side surface of a drain pad. In this case, the drain electrode is integrated with the drain pad and extends from the side surface of the drain pad in a first direction (y direction). A recessed portion is located in a region overlapping with the drain electrode in a plan view. At least a part of the drain electrode is buried in the recessed portion. A side surface of the recessed portion, which faces the drain pad, enters the drain pad in the first direction (y direction).
    Type: Application
    Filed: July 5, 2017
    Publication date: October 19, 2017
    Inventors: Hideaki Tsuchiya, Hiroshi Kimura, Takashi Ide, Yorinobu Kunimune
  • Patent number: 9739233
    Abstract: A piston of an internal combustion engine includes a crown portion; a pair of thrust-side and counter-thrust-side skirt portions; and a pair of apron portions connecting the thrust-side skirt portion with the counter-thrust-side skirt portion. Each of the pair of apron portions includes an upper end wall connected with the crown portion, and a pin boss portion supporting a piston pin. A reverse-surface-side portion of the crown portion is formed with a hollow portion extending along an outer surface of the upper end wall of the apron portion. The upper end wall of the apron portion includes a bending portion between an outside surface of the pin boss portion and a circumferential end of the skirt portion. The bending portion bends in a step-like manner from the outside surface of the pin boss portion toward the circumferential end of the skirt portion.
    Type: Grant
    Filed: December 22, 2014
    Date of Patent: August 22, 2017
    Assignee: HITACHI AUTOMOTIVE SYSTEMS, LTD.
    Inventors: Toshiyuki Funahashi, Takashi Ide, Toshiro Fushimi
  • Patent number: 9722066
    Abstract: To enhance electromigration resistance of an electrode. A drain electrode is partially formed on a side surface of a drain pad. In this case, the drain electrode is integrated with the drain pad and extends from the side surface of the drain pad in a first direction (y direction). A recessed portion is located in a region overlapping with the drain electrode in a plan view. At least a part of the drain electrode is buried in the recessed portion. A side surface of the recessed portion, which faces the drain pad, enters the drain pad in the first direction (y direction).
    Type: Grant
    Filed: February 28, 2016
    Date of Patent: August 1, 2017
    Assignee: Renesas Electronics Corporation
    Inventors: Hideaki Tsuchiya, Hiroshi Kimura, Takashi Ide, Yorinobu Kunimune