Patents by Inventor Takashi Imura
Takashi Imura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 8502513Abstract: A voltage regulator has an output transistor that outputs an output voltage. A first circuit controls a control terminal voltage to increase the output voltage when an undershoot has occurred in the output voltage. A second circuit controls the control terminal voltage to prevent an output current from exceeding an overcurrent when the output current becomes the overcurrent, and disables the first circuit when the output current is prevented from exceeding the overcurrent so that the first circuit does not control the control terminal voltage to increase the output voltage.Type: GrantFiled: December 15, 2009Date of Patent: August 6, 2013Assignee: Seiko Instruments Inc.Inventor: Takashi Imura
-
Patent number: 8476967Abstract: Provided is a constant current circuit and a reference voltage circuit with improved line regulation without needing a start-up circuit. The constant current circuit includes: a constant current generation circuit including NMOS transistors and a resistor; a current mirror circuit including a pair of depletion mode NMOS transistors, for allowing a current of the constant current generation circuit to flow; and a feedback circuit for maintaining constant voltages of source terminals of the pair of depletion mode NMOS transistors.Type: GrantFiled: November 9, 2011Date of Patent: July 2, 2013Assignee: Seiko Instruments Inc.Inventors: Yuji Kobayashi, Takashi Imura, Masakazu Sugiura, Atsushi Igarashi
-
Patent number: 8451571Abstract: Provided is a power supply integrated circuit including an overheat protection circuit with high detection accuracy. The overheat protection circuit includes: a current generation circuit including: a first metal oxide semiconductor (MOS) transistor including a gate terminal and a drain terminal that are connected to each other, the first MOS transistor operating in a weak inversion region; a second MOS transistor including a gate terminal connected to the gate terminal of the first MOS transistor, the second MOS transistor having the same conductivity type as the first MOS transistor and operating in a weak inversion region; and a first resistive element connected to a source terminal of the second MOS transistor; and a comparator for comparing a reference voltage having positive temperature characteristics and a temperature voltage having negative temperature characteristics, which are obtained based on a current generated by the current generation circuit.Type: GrantFiled: May 28, 2010Date of Patent: May 28, 2013Assignee: Seiko Instruments Inc.Inventors: Takashi Imura, Takao Nakashimo, Masakazu Sugiura, Atsushi Igarashi, Masahiro Mitani
-
Patent number: 8450986Abstract: Provided is a voltage regulator capable of setting an accurate short-circuit current. Used as a circuit for determining a current value of a short-circuit current of an overcurrent protection circuit is not a resistor for converting current into voltage but a circuit for controlling in the form of current, that is, a circuit of an N-channel depletion type transistor including a gate and a drain that are connected to each other and operating in a non-saturated state. The N-channel depletion type transistor has process fluctuations that are linked with those of a detection transistor, and hence an accurate short-circuit current may be set without trimming.Type: GrantFiled: September 27, 2010Date of Patent: May 28, 2013Assignee: Seiko Instruments Inc.Inventors: Takashi Imura, Teruo Suzuki, Takao Nakashimo, Yotaro Nihei
-
Patent number: 8436603Abstract: Provided is a voltage regulator having a structure in which an output terminal of a first differential amplifier circuit is connected to a second differential amplifier circuit to control an output transistor by the second differential amplifier circuit. When low current consumption is required, the first differential amplifier circuit is suspended. When high-speed response is required, the first differential amplifier circuit is activated. The low-current consumption operation and the high-speed operation are switched with a minimum circuit area.Type: GrantFiled: September 23, 2010Date of Patent: May 7, 2013Assignee: Seiko Instruments Inc.Inventor: Takashi Imura
-
Publication number: 20120286751Abstract: Provided is a voltage regulator including an overcurrent protection circuit, which does not need a test circuit. The voltage regulator has a configuration in which a reference voltage circuit includes an element that determines a reference voltage and an overcurrent protection circuit includes an element that determines a maximum output current, the element of the reference voltage circuit and the element of the overcurrent protection circuit having the same characteristics. Accordingly, there is a correlation between an output voltage before trimming and the maximum output current for overcurrent protection. Thus, a maximum output current before trimming can be estimated without performing evaluation by a test circuit.Type: ApplicationFiled: May 2, 2012Publication date: November 15, 2012Inventors: Kaoru Sakaguchi, Takashi Imura
-
Patent number: 8212545Abstract: In order to realize a reference voltage circuit that operates with lower current consumption while maintaining an operation at lower voltage without causing deterioration of a power supply rejection ratio, provided is a reference voltage circuit in which a depletion transistor of an ED type reference voltage circuit is constituted of a plurality of depletion transistors connected in series, and in which a gate terminal of a cascode depletion transistor is connected to a connection point between the depletion transistors of the ED type reference voltage circuit.Type: GrantFiled: June 10, 2010Date of Patent: July 3, 2012Assignee: Seiko Instruments Inc.Inventor: Takashi Imura
-
Publication number: 20120126873Abstract: Provided is a constant current circuit and a reference voltage circuit with improved line regulation without needing a start-up circuit. The constant current circuit includes: a constant current generation circuit including NMOS transistors and a resistor; a current mirror circuit including a pair of depletion mode NMOS transistors, for allowing a current of the constant current generation circuit to flow; and a feedback circuit for maintaining constant voltages of source terminals of the pair of depletion mode NMOS transistors.Type: ApplicationFiled: November 9, 2011Publication date: May 24, 2012Inventors: Yuji Kobayashi, Takashi Imura, Masakazu Sugiura, Atsushi Igarashi
-
Patent number: 8174309Abstract: Provided is a reference voltage circuit in which a temperature characteristic of a reference voltage is excellent and a circuit scale is small. In the reference voltage circuit, for example, a temperature correction circuit separated from the reference voltage circuit is not used and a difference voltage between threshold voltages of two E-type NMOS transistors (14 and 15) is added to a threshold voltage of a D-type NMOS transistor to generate a reference voltage (Vref). Therefore, the influence of the D-type NMOS transistor on the reference voltage (Vref), which is a degradation factor of the temperature characteristic of the reference voltage (Vref), may be reduced to suppress a change in tilt and curve of the reference voltage (Vref) with respect to a temperature.Type: GrantFiled: September 23, 2010Date of Patent: May 8, 2012Assignee: Seiko Instruments Inc.Inventors: Hideo Yoshino, Takashi Imura
-
Patent number: 8102163Abstract: Provided is a voltage regulator which can achieve high-speed response and is not susceptible to a ripple. An amplifier (19) and an amplifier (23) provide push-pull output to an output transistor (14). Therefore, even when an idling current is small, a sink current and a source current with respect to a gate of the output transistor (14) can be increased in a balanced manner. Thus, the voltage regulator can easily achieve high-speed response. In addition, even when the ripple is superimposed on an input voltage, an output voltage is not influenced by the ripple.Type: GrantFiled: May 28, 2009Date of Patent: January 24, 2012Assignee: Seiko Instruments Inc.Inventor: Takashi Imura
-
Patent number: 8085018Abstract: Provided is a voltage regulator capable of performing appropriate phase compensation. Even when a difference between an input voltage and an output voltage is small, an appropriate phase compensation voltage based on an output voltage (Vout) is generated in a resistor circuit (19), and the appropriate phase compensation voltage is applied to a phase compensation capacitor (20). Accordingly, the voltage regulator is capable of performing appropriate phase compensation.Type: GrantFiled: June 3, 2009Date of Patent: December 27, 2011Assignee: Seiko Instruments Inc.Inventors: Yotaro Nihei, Takashi Imura, Tadashi Kurozo
-
Patent number: 8072198Abstract: To provide a voltage regulator having improved response characteristics in case of overshoot. The voltage regulator includes: a transistor (303) for detecting an overshoot at an output terminal; and a current mirror circuit connected to the transistor (303). If the transistor (303) detects the overshoot, a control transistor (16) is turned ON to discharge a voltage of the output terminal.Type: GrantFiled: February 10, 2010Date of Patent: December 6, 2011Assignee: Seiko Instruments Inc.Inventor: Takashi Imura
-
Patent number: 8026708Abstract: A voltage regulator stably operates even when an operating current of a differential amplifier circuit is increased according to an output current. In the voltage regulator, a current mirror circuit for detecting the output current and increasing the operating current of the differential amplifier circuit is provided with a function of providing a delay according to an operation state of the voltage regulator. A simultaneous action of a main feedback system and a feedback system for the output current is eliminated, whereby an internal operating point can be prevented from fluctuating and therefore stability of the operation is improved.Type: GrantFiled: February 24, 2009Date of Patent: September 27, 2011Assignee: Seiko Instruments Inc.Inventor: Takashi Imura
-
Patent number: 8013588Abstract: Provided is a reference voltage circuit capable of generating a temperature-independent reference voltage more stably. Each of N-type metal oxide semiconductor (NMOS) transistors (1) and (2) has a source and a back gate that are short-circuited, and hence threshold voltages (Vth1) and (Vth2) of the NMOS transistors (1) and (2) respectively depend only on process fluctuations in the NMOS transistors (1) and (2) and not on process fluctuations in other elements. As a result, a temperature-independent reference voltage (Vref) may be generated more stably.Type: GrantFiled: December 17, 2009Date of Patent: September 6, 2011Assignee: Seiko Instruments Inc.Inventor: Takashi Imura
-
Patent number: 8004257Abstract: A voltage regulator has a first error amplifier circuit that amplifies a difference between a first reference voltage and a voltage based on an output voltage of an output transistor, and an overcurrent protection circuit that detects an overcurrent flowing through the output transistor and limits a current of the output transistor.Type: GrantFiled: February 11, 2009Date of Patent: August 23, 2011Assignee: Seiko Instruments Inc.Inventors: Takashi Imura, Takao Nakashimo
-
Patent number: 7956588Abstract: A voltage regulator has an error amplifier circuit, and a phase compensation circuit having a capacitor connected in parallel to first and second series-connected resistors. A control transistor has its source-drain path connected between input and output terminals of the phase compensation circuit and its gate connected to a junction point between the first and second resistors. In a transient stage in which the output voltage of the error amplifier circuit changes, the resistance of the phase compensation circuit decreases thereby improving the transient response characteristics of the voltage regulator.Type: GrantFiled: November 6, 2008Date of Patent: June 7, 2011Assignee: Seiko Instruments Inc.Inventor: Takashi Imura
-
Patent number: 7932707Abstract: Provided is a voltage regulator having satisfactory transient response characteristics. Because a PMOS (25) and an NMOS (24) pass drain currents (charge and discharge currents with respect to gate of PMOS (26)) based on the square of voltage (?IR) according to change (?I) in drain currents of NMOSs (16 and 17), a maximum value (Imax) of the charge and discharge currents becomes larger, transition time (t) of gate voltage of the PMOS (26) becomes shorter, and the transient response characteristics of the voltage regulator become better.Type: GrantFiled: June 20, 2008Date of Patent: April 26, 2011Assignee: Seiko Instruments Inc.Inventor: Takashi Imura
-
Publication number: 20110074508Abstract: Provided is a voltage regulator having a structure in which an output terminal of a first differential amplifier circuit is connected to a second differential amplifier circuit to control an output transistor by the second differential amplifier circuit. When low current consumption is required, the first differential amplifier circuit is suspended. When high-speed response is required, the first differential amplifier circuit is activated. The low-current consumption operation and the high-speed operation are switched with a minimum circuit area.Type: ApplicationFiled: September 23, 2010Publication date: March 31, 2011Inventor: Takashi Imura
-
Publication number: 20110074496Abstract: Provided is a reference voltage circuit in which a temperature characteristic of a reference voltage is excellent and a circuit scale is small. In the reference voltage circuit, for example, a temperature correction circuit separated from the reference voltage circuit is not used and a difference voltage between threshold voltages of two E-type NMOS transistors (14 and 15) is added to a threshold voltage of a D-type NMOS transistor to generate a reference voltage (Vref). Therefore, the influence of the D-type NMOS transistor on the reference voltage (Vref), which is a degradation factor of the temperature characteristic of the reference voltage (Vref), may be reduced to suppress a change in tilt and curve of the reference voltage (Vref) with respect to a temperature.Type: ApplicationFiled: September 23, 2010Publication date: March 31, 2011Inventors: Hideo Yoshino, Takashi Imura
-
Publication number: 20110074370Abstract: Provided is a voltage regulator capable of setting an accurate short-circuit current. Used as a circuit for determining a current value of a short-circuit current of an overcurrent protection circuit is not a resistor for converting current into voltage but a circuit for controlling in the form of current, that is, a circuit of an N-channel depletion type transistor including a gate and a drain that are connected to each other and operating in a non-saturated state. The N-channel depletion type transistor has process fluctuations that are linked with those of a detection transistor, and hence an accurate short-circuit current may be set without trimming.Type: ApplicationFiled: September 27, 2010Publication date: March 31, 2011Inventors: Takashi Imura, Teruo Suzuki, Takao Nakashimo, Yotaro Nihei