Abstract: In order to realize a reference voltage circuit that operates with lower current consumption while maintaining an operation at lower voltage without causing deterioration of a power supply rejection ratio, provided is a reference voltage circuit in which a depletion transistor of an ED type reference voltage circuit is constituted of a plurality of depletion transistors connected in series, and in which a gate terminal of a cascode depletion transistor is connected to a connection point between the depletion transistors of the ED type reference voltage circuit.

Abstract: Provided is a power supply integrated circuit including an overheat protection circuit with high detection accuracy. The overheat protection circuit includes: a current generation circuit including: a first metal oxide semiconductor (MOS) transistor including a gate terminal and a drain terminal that are connected to each other, the first MOS transistor operating in a weak inversion region; a second MOS transistor including a gate terminal connected to the gate terminal of the first MOS transistor, the second MOS transistor having the same conductivity type as the first MOS transistor and operating in a weak inversion region; and a first resistive element connected to a source terminal of the second MOS transistor; and a comparator for comparing a reference voltage having positive temperature characteristics and a temperature voltage having negative temperature characteristics, which are obtained based on a current generated by the current generation circuit.

Abstract: To provide a voltage regulator having low current consumption. [Solving Means] In a case of a light load, activation currents flowing through NMOS transistors (22) and (25) to activate a voltage control circuit (92) become substantially zero, and hence the current consumption of the voltage regulator is reduced by a corresponding amount.

Abstract: To provide a voltage regulator having improved response characteristics in case of overshoot. The voltage regulator includes: a transistor (303) for detecting an overshoot at an output terminal; and a current mirror circuit connected to the transistor (303). If the transistor (303) detects the overshoot, a control transistor (16) is turned ON to discharge a voltage of the output terminal.

Abstract: Provided is a voltage level shift circuit including: a first voltage level shift circuit formed of a P-channel enhancement type transistor (M1) and an N-channel depletion type MOS transistor (M3); and a second voltage level shift circuit formed of a P-channel enhancement type transistor (M2) and an N-channel depletion type MOS transistor (M4). In the voltage level shift circuit, a cascode circuit using an N-channel depletion type transistor (M5) is serially connected to the first voltage level shift circuit, a cascode circuit using an N-channel depletion type transistor (M6) is serially connected to the second voltage level shift circuit, and a unit for complementarily controlling bias voltages of the respective cascode circuits. As a result, an output signal of the voltage level shift circuit connected to an input of a differential amplifier circuit, for expanding an input voltage range of a signal, is not affected by fluctuations in power supply voltage.

Abstract: Provided is a reference voltage circuit capable of generating a temperature-independent reference voltage more stably. Each of N-type metal oxide semiconductor (NMOS) transistors (1) and (2) has a source and a back gate that are short-circuited, and hence threshold voltages (Vth1) and (Vth2) of the NMOS transistors (1) and (2) respectively depend only on process fluctuations in the NMOS transistors (1) and (2) and not on process fluctuations in other elements. As a result, a temperature-independent reference voltage (Vref) may be generated more stably.

Abstract: Provided is a voltage regulator capable of performing a stable circuit operation while improving undershoot characteristics thereof. When an undershoot has occurred in an output voltage (VOUT), an undershoot improvement circuit (40) controls a control signal (VC) so that the output voltage (VOUT) may increase. When an output current becomes an overcurrent, an output current limiting circuit (50) controls the control signal (VC) so that the output current may be prevented from exceeding the overcurrent, and the output current limiting circuit (50) disables the undershoot improvement circuit (40).

Abstract: Provided is a reference voltage circuit whose power supply rejection ratio is large even in a case where a power supply voltage is low. Even in a case where the power supply voltage of a power supply terminal (10) becomes lower and thus an NMOS transistor (71) operates in non-saturation to reduce an output resistance (ro71) of the NMOS transistor (71), when a gain (Ao) of a differential amplifier circuit (60) is large, the power supply rejection ratio (PSRRLF) is also large. Therefore, even when a minimum operating voltage of the reference voltage circuit is low, the power supply rejection ratio (PSRRLF) can be made larger. In other words, since the gain (Ao) of the differential amplifier circuit (60) contributes to the power supply rejection ratio (PSRRLF), when the gain (Ao) of the differential amplifier circuit (60) increases, the power supply rejection ratio (PSRRLF) also becomes larger by the increase.

Abstract: Provided is a voltage regulator having an overcurrent protective circuit, which is excellent in detection precision and small in current consumption. The voltage regulator having the overcurrent protective circuit which detects that overcurrent flows in an output transistor, and limits the current of the output transistor, includes a regulated cascode circuit that makes a voltage at a source of the output transistor equal to a voltage at a source of the output current detection transistor, in which the operating current of the regulated cascode circuit is supplied by a transistor that is controlled by the output voltage of an error amplifier circuit.

Abstract: Provided is a voltage regulator capable of performing appropriate phase compensation. Even when a difference between an input voltage and an output voltage is small, an appropriate phase compensation voltage based on an output voltage (Vout) is generated in a resistor circuit (19), and the appropriate phase compensation voltage is applied to a phase compensation capacitor (20). Accordingly, the voltage regulator is capable of performing appropriate phase compensation.

Abstract: Provided is a voltage regulator which can achieve high-speed response and is not susceptible to a ripple. An amplifier (19) and an amplifier (23) provide push-pull output to an output transistor (14). Therefore, even when an idling current is small, a sink current and a source current with respect to a gate of the output transistor (14) can be increased in a balanced manner. Thus, the voltage regulator can easily achieve high-speed response. In addition, even when the ripple is superimposed on an input voltage, an output voltage is not influenced by the ripple.

Abstract: Provided is a voltage level shift circuit including: a first voltage level shift circuit formed of a P-channel enhancement type transistor (M1) and an N-channel depletion type MOS transistor (M3); and a second voltage level shift circuit formed of a P-channel enhancement type transistor (M2) and an N-channel depletion type MOS transistor (M4). In the voltage level shift circuit, a cascode circuit using an N-channel depletion type transistor (M5) is serially connected to the first voltage level shift circuit, a cascode circuit using an N-channel depletion type transistor (M6) is serially connected to the second voltage level shift circuit, and a unit for complementarily controlling bias voltages of the respective cascode circuits. As a result, an output signal of the voltage level shift circuit connected to an input of a differential amplifier circuit, for expanding an input voltage range of a signal, is not affected by fluctuations in power supply voltage.

Abstract: A voltage regulator stably operates even when an operating current of a differential amplifier circuit is increased according to an output current. In the voltage regulator, a current mirror circuit for detecting the output current and increasing the operating current of the differential amplifier circuit is provided with a function of providing a delay according to an operation state of the voltage regulator. A simultaneous action of a main feedback system and a feedback system for the output current is eliminated, whereby an internal operating point can be prevented from fluctuating and therefore stability of the operation is improved.

Abstract: Provided is a voltage regulator including an overcurrent protection circuit, which is capable of enhancing accuracy of a limit current value and a short-circuit current value, and suppressing electric power loss when an overcurrent flows through an output transistor. The overcurrent protection circuit includes: an output current detection transistor controlled by an output voltage of an error amplifier circuit, for feeding a detection current; a detection resistor for generating a detection voltage based on the detection current; a second error amplifier circuit for amplifying a difference between a voltage set by a second reference voltage and a divided voltage, and the voltage of the detection resistor, and outputting the amplified difference; and an output current limiting circuit in which a gate thereof is controlled by an output of the second error amplifier circuit, for controlling a gate voltage of the output transistor.

Abstract: Provided is a voltage level shift circuit including: a first voltage level shift circuit formed of a P-channel enhancement type transistor (M1) and an N-channel depletion type MOS transistor (M3); and a second voltage level shift circuit formed of a P-channel enhancement type transistor (M2) and an N-channel depletion type MOS transistor (M4). In the voltage lever shift circuit, a cascode circuit using an N-channel depletion type transistor (M5) is serially connected to the first voltage level shift circuit, a cascode circuit using an N-channel depletion type transistor (M6) is serially connected to the second voltage level shift circuit, and a unit for complementarily controlling bias voltages of the respective cascode circuits. As a result, an output signal of the voltage level shift circuit connected to an input of a differential amplifier circuit, for expanding an input voltage range of a signal, is not affected by fluctuations in power supply voltage.

Abstract: Provided is a voltage regulator that is excellent in transient response characteristics even if a resistance of a resistor in a phase compensation circuit is large. In the voltage regulator, the resistor of the phase compensation circuit is so configured as to change the resistance thereof according to a voltage across both ends of the resistor. In a transient state in which an output voltage of an error amplifier circuit changes, the resistance of the resistor in the phase compensation circuit is decreased, to thereby improve the transient response characteristics of the voltage regulator.

Abstract: Provided is a reference voltage circuit whose power supply rejection ratio is large even in a case where a power supply voltage is low. Even in a case where the power supply voltage of a power supply terminal (10) becomes lower and thus an NMOS transistor (71) operates in non-saturation to reduce an output resistance (ro71) of the NMOS transistor (71), when a gain (Ao) of a differential amplifier circuit (60) is large, the power supply rejection ratio (PSRRLF) is also large. Therefore, even when a minimum operating voltage of the reference voltage circuit is low, the power supply rejection ratio (PSRRLF) can be made larger. In other words, since the gain (Ao) of the differential amplifier circuit (60) contributes to the power supply rejection ratio (PSRRLF), when the gain (Ao) of the differential amplifier circuit (60) increases, the power supply rejection ratio (PSRRLF) also becomes larger by the increase.

Abstract: Provided is a voltage regulator having satisfactory transient response characteristics. Because a PMOS (25) and an NMOS (24) pass drain currents (charge and discharge currents with respect to gate of PMOS (26)) based on the square of voltage (?IR) according to change (?I) in drain currents of NMOSs (16 and 17), a maximum value (Imax) of the charge and discharge currents becomes larger, transition time (t) of gate voltage of the PMOS (26) becomes shorter, and the transient response characteristics of the voltage regulator become better.

Abstract: A reference voltage circuit having a high power supply rejection ratio, and can operate at low voltage is provided. The reference voltage circuit includes a bias circuit constructed such that a depletion type transistor (3) is connected in series to a power supply voltage supply terminal of a load circuit, an enhancement type MOS transistor (4) for detecting current through the load circuit to operate as a current source is connected to the load circuit, a depletion type MOS transistor (5) is connected in series to the transistor (4), and a gate terminal of the transistor (5) is connected to a source terminal of the transistor (5), in which the gate terminal of the depletion type transistor (3) is connected to the source terminal of the depletion type transistor (5).

Abstract: Provided is a voltage regulator having an overcurrent protective circuit, which is excellent in detection precision and small in current consumption. The voltage regulator having the overcurrent protective circuit which detects that overcurrent flows in an output transistor, and limits the current of the output transistor, includes a regulated cascode circuit that makes a voltage at a source of the output transistor equal to a voltage at a source of the output current detection transistor, in which the operating current of the regulated cascode circuit is supplied by a transistor that is controlled by the output voltage of an error amplifier circuit.