Abstract: In a method of manufacturing a stacked-type semiconductor device, firstly, a first semiconductor substrate having a first device formed thereon is covered with an interlayer insulating layer and a planarized polycrystalline silicon layer is formed on the interlayer insulating layer. The first semiconductor substrate and a second semiconductor substrate are joined together by putting the surface of the polycrystalline silicon layer in close contact with the surface of a refractory metal layer formed on the second semiconductor substrate, applying thermal treatment at 700.degree. C. or below and changing the refractory metal layer to silicide.

Abstract: A method of forming single-crystal semiconductor films, in which a single-crystal semiconductor substrate having a crystal axis transferred from a single-crystal semiconductor substrate is formed on an insulator layer via a seed hole which goes through the insulator layer which is formed on the single-crystal semiconductor substrate, comprises the steps of: forming a non-single-crystal semiconductor substrate connected to a single-crystal semiconductor substrate via a seed hole on an insulator layer; irradiating a compound beam which includes a first energy beam having a power density which is capable of melting a non-single-crystal semiconductor film and a second energy beam having a power density which is not capable of melting the non-single-crystal semiconductor film but capable of softening the insulator layer positioned below the non-single-crystal semiconductor film; and epitaxially growing the single-crystal semiconductor film in such a way that the non-single-crystal semiconductor film is melted and

Abstract: Disclosed herein is a semiconductor pressure sensor which can improve a withstand voltage across piezoresistance and interconnection layers and a semiconductor substrate. In this semiconductor pressure sensor, a plurality of dot seeds, which are regions for serving as seed crystals for growing monocrystals, are arranged to enclose the piezoresistance, and the interconnection layer is formed to pass through a clearance between adjacent ones of the dot seeds.

Abstract: A manufacturing method of a semiconductor device having a planar single crystal semiconductor surface is disclosed. In the manufacturing method of a semiconductor device, an insulating film is formed on a semiconductor substrate, a noncrystal semiconductor film is formed on the insulating film, a stripe-like anti-reflection film is formed on the noncrystal semiconductor film, and laser beam is irradiated along the anti-reflection film. Because of the difference in temperature, a film with thicknesses different in a substrate region in which the anti-reflection film is formed and a region around it is formed. A film to be a machining allowance for polishing is formed on the single crystal semiconductor film, polishing is performed from the side of said film to be a machining allowance for polishing so that desired planar film thickness of the single crystal semiconductor film is implemented.

Abstract: A method of producing so-called SOI structures according to this invention includes the step of forming an opening for seeding after an insulating layer of predetermined thickness has been formed on a first monocrystal silicon layer. Further, a non-monocrystal layer, e.g., a polycrystal silicon layer is formed on the surface of the insulating layer. The surface of the polycrystal silicon layer is smoothed as by grinding. A reflection-preventive film is formed on the smoothed surface of the polycrystal silicon layer. The reflection-preventive film has a thin film region whose reflectance is substantially zero and a thick film region having a predetermined reflectance. During laser annealing, the reflection-preventive film produces a predetermined temperature distribution in the polycrystal silicon layer.

Abstract: A field effect transistor is formed as a first semiconductor element on a main surface of a first semiconductor layer (1). An interlayer insulating film (10) constituted by a first insulating layer (101) and a second insulating layer (102) is formed on the first semiconductor element. The first insulating layer (101) is formed of a BPSG film having a glass transition point no higher than 750.degree. C. The second insulating layer (102) is formed of a silicon oxide film having a glass transition point higher than 750.degree. C. and a thickness no less than 2000 .ANG. and no more than 1 .mu.m formed on the first insulating layer (101). A second semiconductor layer (11) is formed on the second insulating layer (102) of the interlayer insulating film (10). The second semiconductor layer (11) is formed to be an island, with the peripheral portions isolated. A field effect transistor as a second semiconductor element is formed in the second semiconductor layer (11).