Patents by Inventor Takashi Kano

Takashi Kano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100300168
    Abstract: The object of the present invention is to provide a method for shot peening by which a compressive residual stress that is higher than any achieved by the conventional method can be achieved while the thickness of the processed material that is scraped is suppressed. The method is characterized in that the shot materials are shot against the processed material that has the hardness of 750 HV or more that is calculated from equations (1) to (3) below. The shot materials have Vickers hardness that is higher than the hardness of the processed material by 50 HV to 250 HV. The thickness of the processed material that is to be scraped is suppressed to 5 ?m or less. HV(m)={f(C)?f(T,t)}(1??R/100)+400×?R/100??Equation (1) f(C)=?660C2+1373C+278??Equation (2) f(T,t)=0.
    Type: Application
    Filed: November 21, 2008
    Publication date: December 2, 2010
    Inventors: Ryohei Ishikura, Takashi Kano, Makio Kato, Yuji Kobayashi, Satoru Ujihashi, Kiyoshi Okumura
  • Publication number: 20100252913
    Abstract: A GaN layer is grown on a sapphire substrate, an SiO2 film is formed on the GaN layer, and a GaN semiconductor layer including an MQW active layer is then grown on the GaN layer and the SiO2 film using epitaxial lateral overgrowth. The GaN based semiconductor layer is removed by etching except in a region on the SiO2 film, and a p electrode is then formed on the top surface of the GaN based semiconductor layer on the SiO2 film, to join the p electrode on the GaN based semiconductor layer to an ohmic electrode on a GaAs substrate. An n electrode is formed on the top surface of the GaN based semiconductor layer.
    Type: Application
    Filed: June 18, 2010
    Publication date: October 7, 2010
    Applicant: SANYO ELECTRIC CO., LTD.
    Inventors: Nobuhiko Hayashi, Takashi Kano
  • Patent number: 7807490
    Abstract: Provided is a manufacturing method of a nitride semiconductor device having a nitride semiconductor substrate (e.g. GaN substrate) in which dislocation concentrated regions align in stripe formation, the dislocation concentrated regions extending from a front surface to a back surface of the substrate, the manufacturing method being for stacking each of a plurality of nitride semiconductor layers on the front surface of the substrate in a constant film thickness. Grooves are formed on the nitride semiconductor substrate in the immediate areas of dislocation concentrated regions. Each of the nitride semiconductor layers is formed as a crystal growth layer on the main surface of the nitride semiconductor substrate to which the grooves have been formed.
    Type: Grant
    Filed: July 14, 2008
    Date of Patent: October 5, 2010
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Takashi Kano, Tsutomu Yamaguchi, Hiroaki Izu, Masayuki Hata, Yasuhiko Nomura
  • Patent number: 7768030
    Abstract: A GaN layer is grown on a sapphire substrate, an SiO2 film is formed on the GaN layer, and a GaN semiconductor layer including an MQW active layer is then grown on the GaN layer and the SiO2 film using epitaxial lateral overgrowth. The GaN based semiconductor layer is removed by etching except in a region on the SiO2 film, and a p electrode is then formed on the top surface of the GaN based semiconductor layer on the SiO2 film, to join the p electrode on the GaN based semiconductor layer to an ohmic electrode on a GaAs substrate. An n electrode is formed on the top surface of the GaN based semiconductor layer.
    Type: Grant
    Filed: May 12, 2008
    Date of Patent: August 3, 2010
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Nobuhiko Hayashi, Takashi Kano
  • Patent number: 7751931
    Abstract: A design support apparatus that can easily verify the conveyance design for a flexible medium based on input design information. A transit time is calculated when a flexible medium passes a characteristic point on a conveying path based a conveying conditions that are set.
    Type: Grant
    Filed: April 26, 2007
    Date of Patent: July 6, 2010
    Assignee: Canon Kabushiki Kaisha
    Inventor: Takashi Kano
  • Publication number: 20100139451
    Abstract: The invention relates to a crankshaft member having high fatigue strength and good bending correctability, and its method of manufacture. The steel made crankshaft member mainly consists of a two-phase structure of ferrite and perlite. The steel includes C, Ni, Mn, and Cr as required elements and Si, Cu, Mo, Ti, V, Nb, Ca, and S as optional elements that may be included, in the amounts of C within the range of 0.20 to 0.50 wt %, Si within the range of 0 to 0.6 wt %, Mn within the range of 0.5 to 1.5 wt %, Cu within the range of 0 to 0.7 wt %, Ni within the range of 0.05 to 1.5 wt %, Cr within the range of 0.05 to 0.45 wt %, and Mo within the range of 0 to 0.5 wt % to satisfy the condition 115?70 C+8 Si+23 Mn+11 Cu+128 Cr+83 Mo?50. A portion of the member surface is provided at least with a hard nitride layer having an average hardness within the range of 300 to 450 HV. Lamellar spacing of the perlite is 0.3 ?m or less.
    Type: Application
    Filed: December 3, 2009
    Publication date: June 10, 2010
    Applicants: HONDA MOTOR CO., LTD., DAIDO STEEL CO., LTD.
    Inventors: Isamu SAITO, Yoshihiro Takitani, Shinichiro Kato, Makoto Hobo, Keiichiro Kamiya, Takahiro Miyazaki, Takashi Kano
  • Publication number: 20100025701
    Abstract: A nitride-based semiconductor light-emitting device capable of suppressing reduction of characteristics and a yield and method of fabricating the same is described. The method of fabricating includes the steps of forming a groove portion on a nitride-based semiconductor substrate by selectively removing a prescribed region of a second region of the nitride-based semiconductor substrate other than a first region corresponding to a light-emitting portion of a nitride-based semiconductor layer up to a prescribed depth and forming the nitride-based semiconductor layer having a different composition from the nitride-based semiconductor substrate on the first region and the groove portion of the nitride-based semiconductor substrate.
    Type: Application
    Filed: October 9, 2009
    Publication date: February 4, 2010
    Applicant: Sanyo Electric Co., Ltd.
    Inventors: Takashi KANO, Masayuki HATA, Yasuhiko NOMURA
  • Publication number: 20090262772
    Abstract: A semiconductor laser device capable of reducing the threshold current and improving luminous efficiency and a method of fabricating the same are obtained. This semiconductor laser device comprises a semiconductor substrate having a principal surface and a semiconductor element layer, formed on the principal surface of the semiconductor substrate, having a principal surface substantially inclined with respect to the principal surface of the semiconductor substrate and including an emission layer.
    Type: Application
    Filed: June 26, 2009
    Publication date: October 22, 2009
    Applicant: Sanyo Electric Co., Ltd.
    Inventors: Tsutomu Yamaguchi, Masayuki Hata, Takashi Kano, Masayuki Shono, Hiroki Ohbo, Yasuhiko Nomura, Hiroaki Izu
  • Patent number: 7567605
    Abstract: A semiconductor laser device capable of reducing the threshold current and improving luminous efficiency and a method of fabricating the same are obtained. This semiconductor laser device comprises a semiconductor substrate having a principal surface and a semiconductor element layer, formed on the principal surface of the semiconductor substrate, having a principal surface substantially inclined with respect to the principal surface of the semiconductor substrate and including an emission layer.
    Type: Grant
    Filed: March 31, 2006
    Date of Patent: July 28, 2009
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Tsutomu Yamaguchi, Masayuki Hata, Takashi Kano, Masayuki Shono, Hiroki Ohbo, Yasuhiko Nomura, Hiroaki Izu
  • Publication number: 20090174035
    Abstract: A semiconductor device includes a semiconductor substrate formed of at least two kinds of group III elements and nitrogen, an active layer formed on the semiconductor substrate, and a nitride semiconductor layer formed on a surface of the semiconductor substrate and formed between the semiconductor substrate and the active layer. The nitride semiconductor layer is formed of the same constituent elements of the semiconductor substrate. A composition ratio of the lightest element among the group III elements of the nitride semiconductor layer is higher than a composition ratio of the corresponding element of the semiconductor substrate.
    Type: Application
    Filed: March 11, 2009
    Publication date: July 9, 2009
    Applicant: SANYO ELECTRIC CO., LTD.
    Inventors: Takashi Kano, Masayuki Hata, Yasuhiko Nomura
  • Patent number: 7552038
    Abstract: It is an object of the present invention to provide a simulation tool, which can overcome complications of examinations by simulations as described above and can provide a designer with easy examinations. A simulation based on a design parameter of a unit is implemented. Furthermore, a simulation result implemented by the control device is output on a display screen as a graph. Then, the unit design parameter is corrected in accordance with a correction in the graph displayed on the display screen. Thus, the simulation can be retried easily.
    Type: Grant
    Filed: September 8, 2004
    Date of Patent: June 23, 2009
    Assignee: Canon Kabushiki Kaisha
    Inventors: Kazuhiko Ishiwata, Kazuhito Watanabe, Toshihiko Horikoshi, Kazuki Nakanishi, Takashi Kano
  • Publication number: 20090114941
    Abstract: A GaN layer is grown on a sapphire substrate, an SiO2 film is formed on the GaN layer, and a GaN semiconductor layer including an MQW active layer is then grown on the GaN layer and the SiO2 film using epitaxial lateral overgrowth. The GaN based semiconductor layer is removed by etching except in a region on the SiO2 film, and a p electrode is then formed on the top surface of the GaN based semiconductor layer on the SiO2 film, to join the p electrode on the GaN based semiconductor layer to an ohmic electrode on a GaAs substrate. An n electrode is formed on the top surface of the GaN based semiconductor layer.
    Type: Application
    Filed: May 12, 2008
    Publication date: May 7, 2009
    Applicant: SANYO ELECTRIC CO., LTD.
    Inventors: Nobuhiko Hayashi, Takashi Kano
  • Patent number: 7518204
    Abstract: A semiconductor device includes a semiconductor substrate formed of at least two kinds of group III elements and nitrogen, an active layer formed on the semiconductor substrate, and a nitride semiconductor layer formed on a surface of the semiconductor substrate and formed between the semiconductor substrate and the active layer. The nitride semiconductor layer is formed of the same constituent elements of the semiconductor substrate. A composition ratio of the lightest element among the group III elements of the nitride semiconductor layer is higher than a composition ratio of the corresponding element of the semiconductor substrate.
    Type: Grant
    Filed: September 11, 2006
    Date of Patent: April 14, 2009
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Takashi Kano, Masayuki Hata, Yasuhiko Nomura
  • Patent number: 7485902
    Abstract: A nitride-based semiconductor light-emitting device capable of improving luminous efficiency by reducing light absorption loss in a contact layer is provided. This nitride-based semiconductor light-emitting device comprises a first conductivity type first nitride-based semiconductor layer formed on a substrate, an active layer, formed on the first nitride-based semiconductor layer, consisting of a nitride-based semiconductor layer, a second conductivity type second nitride-based semiconductor layer formed on the active layer, an undoped contact layer formed on the second nitride-based semiconductor layer and an electrode formed on the undoped contact layer.
    Type: Grant
    Filed: September 17, 2003
    Date of Patent: February 3, 2009
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Daijiro Inoue, Yasuhiko Nomura, Masayuki Hata, Takashi Kano, Tsutomu Yamaguchi
  • Publication number: 20090010292
    Abstract: A nitride-based semiconductor laser device capable of elongating the life thereof is obtained. This nitride-based semiconductor laser device comprises a first cladding layer consisting of a first conductivity type nitride-based semiconductor, an emission layer, formed on the first cladding layer, consisting of a nitride-based semiconductor and a second cladding layer, formed on the emission layer, consisting of a second conductivity type nitride-based semiconductor, while the emission layer includes an active layer emitting light, a light guiding layer for confining light and a carrier blocking layer, arranged between the active layer and the light guiding layer, having a larger band gap than the light guiding layer.
    Type: Application
    Filed: June 26, 2008
    Publication date: January 8, 2009
    Applicant: SANYO ELECTRIC CO., LTD.
    Inventors: Yasuhiko Nomura, Takashi Kano
  • Patent number: 7453102
    Abstract: A nitride-based semiconductor laser device capable of elongating the life thereof is obtained. This nitride-based semiconductor laser device comprises a first cladding layer consisting of a first conductivity type nitride-based semiconductor, an emission layer, formed on the first cladding layer, consisting of a nitride-based semiconductor and a second cladding layer, formed on the emission layer, consisting of a second conductivity type nitride-based semiconductor, while the emission layer includes an active layer emitting light, a light guiding layer for confining light and a carrier blocking layer, arranged between the active layer and the light guiding layer, having a larger band gap than the light guiding layer.
    Type: Grant
    Filed: June 8, 2005
    Date of Patent: November 18, 2008
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Yasuhiko Nomura, Takashi Kano
  • Publication number: 20080280445
    Abstract: Provided is a manufacturing method of a nitride semiconductor device having a nitride semiconductor substrate (e.g. GaN substrate) in which dislocation concentrated regions align in stripe formation, the dislocation concentrated regions extending from a front surface to a back surface of the substrate, the manufacturing method being for stacking each of a plurality of nitride semiconductor layers on the front surface of the substrate in a constant film thickness. Grooves are formed on the nitride semiconductor substrate in the immediate areas of dislocation concentrated regions. Each of the nitride semiconductor layers is formed as a crystal growth layer on the main surface of the nitride semiconductor substrate to which the grooves have been formed.
    Type: Application
    Filed: July 14, 2008
    Publication date: November 13, 2008
    Applicant: SANYO ELECTRIC CO., LTD.
    Inventors: Takashi Kano, Tsutomu Yamaguchi, Hiroaki Izu, Masayuki Hata, Yasuhiko Nomura
  • Publication number: 20080248603
    Abstract: A method of preparing a nitride semiconductor capable of forming a nitride-based semiconductor layer having a small number of dislocations as well as a small number of crystal defects resulting from desorption with excellent crystallinity on the upper surface of a substrate through a small number of growth steps is proposed. The method of preparing a nitride-based semiconductor comprises steps of forming a mask layer on the upper surface of a substrate to partially expose the upper surface of the substrate, forming a buffer layer on the exposed part of the upper surface of the substrate and the upper surface of the mask layer and thereafter growing a nitride-based semiconductor layer. Thus, the outermost growth surface of the nitride-based semiconductor layer laterally grown on the mask layer does not come into contact with the mask layer.
    Type: Application
    Filed: June 10, 2008
    Publication date: October 9, 2008
    Applicant: SANYO ELECTRIC CO., LTD.
    Inventors: Tatsuya Kunisato, Hiroki Ohbo, Nobuhiko Hayashi, Takashi Kano
  • Patent number: 7405096
    Abstract: Provided is a manufacturing method of a nitride semiconductor device having a nitride semiconductor substrate (e.g. GaN substrate) in which dislocation concentrated regions align in stripe formation, the dislocation concentrated regions extending from a front surface to a back surface of the substrate, the manufacturing method being for stacking each of a plurality of nitride semiconductor layers on the front surface of the substrate in a constant film thickness. Grooves are formed on the nitride semiconductor substrate in the immediate areas of dislocation concentrated regions. Each of the nitride semiconductor layers is formed as a crystal growth layer on the main surface of the nitride semiconductor substrate to which the grooves have been formed.
    Type: Grant
    Filed: March 16, 2005
    Date of Patent: July 29, 2008
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Takashi Kano, Tsutomu Yamaguchi, Hiroaki Izu, Masayuki Hata, Yasuhiko Nomura
  • Patent number: RE42074
    Abstract: A method of manufacturing a light emitting device, including the steps of: forming an active layer composed of a compound semiconductor containing indium by a vapor phase growth method; and forming a cap layer composed of a compound semiconductor on said active layer by a vapor phase growth method at a growth temperature approximately equal to or lower than a growth temperature for said active layer.
    Type: Grant
    Filed: December 18, 2002
    Date of Patent: January 25, 2011
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Tatsuya Kunisato, Takashi Kano, Yasuhiro Ueda, Yasuhiko Matsushita, Katsumi Yagi