Patents by Inventor Takashi Kitae
Takashi Kitae has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7875496Abstract: A flip chip mounting method includes holding a circuit board (213) and a semiconductor chip (206), aligning the circuit board (213) with the semiconductor chip (206) while holding them with a predetermined gap therebetween, heating the circuit board (213) or the semiconductor chip (206) to a temperature at which solder powder in a solder resin composition (216) formed of solder powder (214) and a resin (215) is melted, supplying the solder resin composition (216) by a capillary phenomenon, and curing the resin (215), wherein the melted solder powder (214) in the solder resin composition (216) is moved through the predetermined gap across which the circuit board (213) and the semiconductor chip (206) are held, and self-assembled and grown, whereby the connection terminals (211) and the electrode terminals (207) are connected to each other electrically.Type: GrantFiled: March 30, 2006Date of Patent: January 25, 2011Assignee: Panasonic CorporationInventors: Seiichi Nakatani, Seiji Karashima, Takashi Kitae, Yoshihisa Yamashita, Takashi Ichiryu
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Patent number: 7820021Abstract: A flip chip mounting method which is applicable to the flip chip mounting of a next-generation LSI and high in productivity and reliability as well as a method for connecting substrates are provided. A circuit board 10 having a plurality of connecting terminals 11 and a semiconductor chip 20 having a plurality of electrode terminals 21 are disposed in mutually facing relation and a resin 13 containing conductive particles 12 and a gas bubble generating agent is supplied into the space therebetween. In this state, the resin 13 is heated to generate gas bubbles 30 from the gas bubble generating agent contained in the resin 13. The resin 13 is pushed toward the outside of the generated gas bubbles 30 by the growth thereof. The resin 13 pushed to the outside is self-assembled in the form of columns between the respective terminals of the circuit board 10 and the semiconductor chip 20.Type: GrantFiled: April 8, 2008Date of Patent: October 26, 2010Assignee: Panasonic CorporationInventors: Seiji Karashima, Takashi Kitae, Seiichi Nakatani
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Patent number: 7799607Abstract: A process for forming bumps wherein a plurality of fine bumps are uniformly formed with high productivity. In this process, a resin (13) including solder powder and a convection additive (12) is supplied onto a substrate (10) having a plurality of electrodes (11) thereon. And subsequently the substrate (10) is heated to a temperature that enables the solder powder to melt while keeping a flat plate (14) in contact with a surface of the supplied resin (13). During this heating step, the molten solder powder is allowed to self-assemble onto the electrodes (11) so that a plurality of solder balls, resulting from the grown molten solder powder, are concurrently formed on the electrodes (11) in self-alignment manner. Finally, the flat plate (14) is moved away from the surface of the supplied resin (13), and then the resin (13) is removed to provide a substrate (10) having bumps (16) formed on the plurality of the electrodes.Type: GrantFiled: August 30, 2005Date of Patent: September 21, 2010Assignee: Panasonic CorporationInventors: Seiji Karashima, Yoshihisa Yamashita, Satoru Tomekawa, Takashi Kitae, Seiichi Nakatani
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Publication number: 20100224986Abstract: A mounted body (100) of the present invention includes: a semiconductor element (10) having a surface (10a) on which element electrodes (12) are formed and a rear surface (10b) opposing the surface (10a); and a mounting board (30) on which wiring patterns (35) each having an electrode terminal (32) are formed. The rear surface (10b) of the semiconductor element (10) is in contact with the mounting board (30), and the element electrodes (12) of the semiconductor element (10) are connected electrically to the electrode terminals (32) of the wiring pattern (35) formed on the mounting board (30) via solder connectors (20) formed of solder particles assembled into a bridge shape. With this configuration, fine pitch connection between the element electrodes of the semiconductor element and the electrode terminals of the mounting board becomes possible.Type: ApplicationFiled: March 22, 2010Publication date: September 9, 2010Applicant: PANASONIC CORPORATIONInventors: Toshiyuki Kojima, Seiichi Nakatani, Yoshihisa Yamashita, Takashi Kitae, Shingo Komatsu
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Publication number: 20100203675Abstract: The flip chip mounted body of the present invention includes: a circuit board (213) having a plurality of connection terminals (211); a semiconductor chip (206) having a plurality of electrode terminals (207) that are disposed opposing the connection terminals (211); and a porous sheet (205) having a box shape that is provided on an opposite side of a formation surface of the electrode terminal (207) of the semiconductor chip (206), is folded on an outer periphery of the semiconductor chip (206) on the formation surface side of the electrode terminal (207) and is in contact with the circuit board (213), wherein the connection terminal (211) of the circuit board (213) and the electrode terminal (207) of the semiconductor chip (206) are connected electrically via a solder layer (215), and the circuit board (213) and the semiconductor chip (206) are fixed by a resin (217).Type: ApplicationFiled: April 21, 2010Publication date: August 12, 2010Applicant: PANASONIC CORPORATIONInventors: Seiichi NAKATANI, Takashi KITAE, Yoshihisa YAMASHITA, Takashi ICHIRYU, Seiji KARASHIMA
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Patent number: 7759162Abstract: A flip chip mounting process includes the steps of supplying a resin (13) containing solder powder and a convection additive (12) onto a wiring substrate (10) having a plurality of electrode terminals (11), then bringing a semiconductor chip (20) having a plurality of connecting terminals (11) into contact with a surface of the supplied resin (13), and then heating the wiring substrate (10) to a temperature that enables the solder powder to melt. The heating step is carried out at a temperature that is higher than the boiling point of the convection additive (12) to allow the boiling convection additive (12) to move within the resin (12). During this heating step, the melted solder powder is allowed to self-assemble into the region between each electrode terminal (11) of the wiring substrate (10) and each connecting terminal (21) of the semiconductor chip to form an electrical connection between each electrode terminal (11) and each connecting terminal (21).Type: GrantFiled: September 7, 2005Date of Patent: July 20, 2010Assignee: Panasonic CorporationInventors: Seiji Karashima, Yoshihisa Yamashita, Satoru Tomekawa, Takashi Kitae, Seiichi Nakatani
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Publication number: 20100148376Abstract: A flip chip mounting process includes the steps of supplying a resin (13) containing solder powder and a convection additive (12) onto a wiring substrate (10) having a plurality of electrode terminals (11), then bringing a semiconductor chip (20) having a plurality of connecting terminals (11) into contact with a surface of the supplied resin (13), and then heating the wiring substrate (10) to a temperature that enables the solder powder to melt. The heating step is carried out at a temperature that is higher than the boiling point of the convection additive (12) to allow the boiling convection additive (12) to move within the resin (12). During this heating step, the melted solder powder is allowed to self-assemble into the region between each electrode terminal (11) of the wiring substrate (10) and each connecting terminal (21) of the semiconductor chip to form an electrical connection between each electrode terminal (11) and each connecting terminal (21).Type: ApplicationFiled: March 4, 2010Publication date: June 17, 2010Inventors: Seiji Karashima, Yoshihisa Yamashita, Satoru Tomekawa, Takashi Kitae, Seiichi Nakatani
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Patent number: 7732920Abstract: The flip chip mounted body of the present invention includes: a circuit board (213) having a plurality of connection terminals (211); a semiconductor chip (206) having a plurality of electrode terminals (207) that are disposed opposing the connection terminals (211); and a porous sheet (205) having a box shape that is provided on an opposite side of a formation surface of the electrode terminal (207) of the semiconductor chip (206), is folded on an outer periphery of the semiconductor chip (206) on the formation surface side of the electrode terminal (207) and is in contact with the circuit board (213), wherein the connection terminal (211) of the circuit board (213) and the electrode terminal (207) of the semiconductor chip (206) are connected electrically via a solder layer (215), and the circuit board (213) and the semiconductor chip (206) are fixed by a resin (217).Type: GrantFiled: March 14, 2006Date of Patent: June 8, 2010Assignee: Panasonic CorporationInventors: Seiichi Nakatani, Takashi Kitae, Yoshihisa Yamashita, Takashi Ichiryu, Seiji Karashima
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Patent number: 7714444Abstract: The present invention provides a conductive resin composition for connecting electrodes electrically, in which metal particles are dispersed in a flowing medium, wherein the flowing medium includes a first flowing medium that has relatively high wettability with the metal particles and a second flowing medium that has relatively low wettability with the metal particles, and the first flowing medium and the second flowing medium are dispersed in a state of being incompatible with each other. Thereby, a flip chip packaging method that can be applied to flip chip packaging of LSI and has high productivity and high reliability is provided.Type: GrantFiled: April 16, 2009Date of Patent: May 11, 2010Assignee: Panasonic CorporationInventors: Seiichi Nakatani, Seiji Karashima, Takashi Kitae, Susumu Sawada
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Patent number: 7713787Abstract: A mounted body (100) of the present invention includes: a semiconductor element (10) having a surface (10a) on which element electrodes (12) are formed and a rear surface (10b) opposing the surface (10a); and a mounting board (30) on which wiring patterns (35) each having an electrode terminal (32) are formed. The rear surface (10b) of the semiconductor element (10) is in contact with the mounting board (30), and the element electrodes (12) of the semiconductor element (10) are connected electrically to the electrode terminals (32) of the wiring pattern (35) formed on the mounting board (30) via solder connectors (20) formed of solder particles assembled into a bridge shape. With this configuration, fine pitch connection between the element electrodes of the semiconductor element and the electrode terminals of the mounting board becomes possible.Type: GrantFiled: February 21, 2006Date of Patent: May 11, 2010Assignee: Panasonic CorporationInventors: Toshiyuki Kojima, Seiichi Nakatani, Yoshihisa Yamashita, Takashi Kitae, Shingo Komatsu
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Publication number: 20100044091Abstract: An electrode structure 100 on which a solder bump is placed includes an electrode pattern 50 made of an electrode-constituting material selected from the group consisting of Cu, Al, Cr, and Ti, a Ni layer 52 formed on a part of the electrode pattern 50, a Pd layer 54 formed on at least a part of a region other than the part of the electrode pattern 50, and an Au layer 56 formed on the Ni layer 52 and the Pd layer 54.Type: ApplicationFiled: November 27, 2007Publication date: February 25, 2010Applicant: PANASONIC CORPORATIONInventors: Yasushi Taniguchi, Seiichi Nakatani, Takashi Kitae, Seiji Karashima, Kenichi Hotehama
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Publication number: 20100011572Abstract: A process for producing an electronic component assembly, comprising the steps of: (1) preparing a first electronic component whose surface (A) is provided with a plurality of electrodes (a) and a second electronic component whose surface (B) is provided with a plurality of electrodes (b) wherein at least one concave portion is formed in the surface (A) (except for a surface region on which the electrodes (a) are provided) and/or the surface (B) (except for a surface region on which the electrodes (b) are provided); (2) supplying a resin that comprises a solder powder onto the surface (A) of the first electronic component; (3) bringing the second electronic component into contact with a surface of the resin such that the plurality of electrodes (a) of the first electronic component are opposed to the plurality of electrodes (b) of the second electronic component; and (4) heating the first electronic component and/or the second electronic component, and thereby forming solder connections from the solder powderType: ApplicationFiled: April 24, 2008Publication date: January 21, 2010Inventors: Takashi Kitae, Seiichi Nakatani, Seiji Karashima
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Publication number: 20100007033Abstract: A resin containing a conductive particle and a gas bubble generating agent is supplied in a space between the substrates each having a plurality of electrodes. The resin is then heated to melt the conductive particle contained in the resin and generate gas bubbles from the gas bubble generating agent. A step portion is formed on at least one of the substrates. In the process of heating the resin, the resin is pushed aside by the growing gas bubbles, and as a result of that, the conductive particle contained in the resin is led to a space between the electrodes, and a connector is formed in the space. At the same time, the resin is led to a space between parts of the substrates at which the step portion is formed, and cured to fix the distance between the substrates.Type: ApplicationFiled: July 6, 2009Publication date: January 14, 2010Inventors: Takashi KITAE, Seiji Karashima, Susumu Sawada, Seiichi Nakatani
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Publication number: 20100001411Abstract: A resin containing conductive particles and a gas bubble generating agent is supplied between a first substrate and a second substrate, and then the resin is heated to generate gas bubbles from the gas bubble generating agent contained in the resin so that the resin is self-assembled between electrodes. Then, the resin is further heated to melt the conductive particles contained in the resin, thereby forming connectors between electrodes. A partition member sealing the gap between the substrates is provided near a peripheral portion of the resin, and gas bubbles in the resin are discharged to the outside through the peripheral portion of the resin where the partition member is absent.Type: ApplicationFiled: June 23, 2009Publication date: January 7, 2010Inventors: Susumu SAWADA, Seiichi NAKATANI, Seiji KARASHIMA, Takashi KITAE
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Patent number: 7640659Abstract: [Problem] To provide a conductive pattern formation method in which a fine pattern can be formed in a simple way at low cost. [Means for Solving Problem] A flat plate having a convex pattern on its surface is provided so as to oppose a substrate, a fluid body including conductive particles and a gas bubble generating agent is supplied into a gap between the substrate and the flat plate, and thereafter, the fluid body is heated for generating gas bubbles from the gas bubble generating agent included in the fluid body. The fluid body is forced out of the gas bubbles as the gas bubbles generated from the gas bubble generating agent grow, so as to self-assemble between the convex pattern formed on the flat plate and the substrate owing to interfacial force, and an aggregate of the conductive particles included in the fluid body having self-assembled is made into a conductive pattern formed on the substrate.Type: GrantFiled: August 11, 2005Date of Patent: January 5, 2010Assignee: Panasonic CorporationInventors: Seiji Karashima, Takashi Kitae, Seiichi Nakatani
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Patent number: 7640654Abstract: A pickup device comprising a pickup surface to which an electronic component retaining liquid is to be applied and capable of adjusting a wet area of the electronic component retaining liquid on the pickup surface is prepared, and the electronic component retaining liquid is applied to the pickup surface in a first step. The electronic component is retained on the pickup surface via the electronic component retaining liquid in a state where the wet area is extended in a second step.Type: GrantFiled: February 2, 2007Date of Patent: January 5, 2010Assignee: Panasonic CorporationInventors: Seiichi Nakatani, Seiji Karashima, Takashi Kitae
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Patent number: 7638883Abstract: A flip chip mounting method which is applicable to the flip chip mounting of a next-generation LSI and high in productivity and reliability as well as a bump forming method are provided. After a resin 14 containing a solder powder 16 and a gas bubble generating agent is supplied to a space between a circuit board 21 having a plurality of connecting terminals 11 and a semiconductor chip 20 having a plurality of electrode terminals 12, the resin 14 is heated to generate gas bubbles 30 from the gas bubble generating agent contained in the resin 14. The resin 14 is pushed toward the outside of the generated gas bubbles 30 by the growth thereof and self-assembled between the connecting terminals 11 and the electrode terminals 12. By further heating the resin 14 and melting the solder powder 16 contained in the resin 14 self-assembled between the terminals, connectors 22 are formed between the terminals to complete a flip chip mounting body.Type: GrantFiled: April 30, 2008Date of Patent: December 29, 2009Assignee: Panasonic CorporationInventors: Seiji Karashima, Takashi Kitae, Seiichi Nakatani
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Patent number: 7611040Abstract: A method for forming solder bumps for realizing high density mounting and a highly reliable method for mounting a semiconductor device is provided. A flat plate having a plurality of projections or recesses thereon is prepared; the flat plate is aligned to oppose an electronic component and a resin composition including a solder powder is supplied to a gap between the flat plate and the electronic component; the resin composition is annealed to melt the solder powder included in the resin composition for growing the solder powder up to the level of the surface of the flat plate by allowing the melted solder powder to self-assemble on terminals, so as to form solder bumps on the terminals; and the flat plate is removed after cooling and solidifying the solder bumps. Thus, the solder bumps having pits corresponding to the projections or having protrusions corresponding to the recesses are formed.Type: GrantFiled: April 25, 2006Date of Patent: November 3, 2009Assignee: Panasonic CorporationInventors: Takashi Kitae, Seiichi Nakatani, Toshiyuki Kojima, Shingo Komatsu, Yoshihisa Yamashita
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Publication number: 20090229120Abstract: In a method for forming bumps 19 on electrodes 32 of a wiring board 31, a fluid 14 containing conductive particles 16 and a gas bubble generating agent is supplied onto a first region 17 including the electrodes 32 on the wiring board 31. Then, a substrate 40 which has a protruding surface 13 having the same area as that of the first region 17 and formed on a main surface 18 of the substrate 40 having a larger area than that of the first region 17 is disposed so that the protruding surface 13 faces the first region 17 of the wiring board 31. Then, the fluid 14 is heated to generate gas bubbles 30 from the gas bubble generating agent contained in the fluid 14.Type: ApplicationFiled: February 22, 2007Publication date: September 17, 2009Inventors: Yasushi Taniguchi, Seiichi Nakatani, Seiji Karashima, Takashi Kitae, Susumu Matsuoka, Masayoshi Koyama
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Publication number: 20090230546Abstract: A mounted body of the present invention includes: a multilayer semiconductor chip 20 including a plurality of semiconductor chips 10 (10a, 10b) that are stacked; and a mounting board 13 on which the multilayer semiconductor chip 20 is mounted. In this mounted body, each of the semiconductor chips 10 (10a, 10b) in the multilayer semiconductor chip 20 has a plurality of element electrodes 12 (12a, 12b) on a chip surface 21 (21a, 21b) facing toward the mounting board 13. On the mounting board 13, electrode terminals 14 are formed so as to correspond to the plurality of element electrodes (12a, 12b), respectively, and the electrode terminals 14 of the mounting board and the element electrodes (12a, 12b) are connected electrically to each other via solder bump formed as a result of assembly of solder particles. With this configuration, a mounted body on which a stacked package is mounted can be manufactured easily.Type: ApplicationFiled: February 28, 2006Publication date: September 17, 2009Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTDInventors: Shingo Komatsu, Seiichi Nakatani, Seiji Karashima, Toshiyuki Kojima, Takashi Kitae, Yoshihisa Yamashita