Patents by Inventor Takashi Kitae

Takashi Kitae has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090223705
    Abstract: An electronic component mounting method includes a step of applying a resin composition (3) including solder powder, convective additive and resin having fluidity at the melting temperature of the solder powder on a main surface of a wiring substrate (1) provided with conductive wirings and connecting terminals, a step of preparing a group of electronic components consisting of a plurality of electronic components (7, 8 and 9) including at least a passive component, the respective electronic components comprising electrode terminals, position-aligning connecting terminals with the electrode terminals, and making the group of electronic components abut a surface of the resin composition, a step of heating at least the resin composition so as to melt solder powder and make the solder powder self-assembled between the connecting terminals and the electrode terminals by the convective additive, and thereby connecting the connecting terminals and the electrode terminals by soldering, and a step of fixedly adhering
    Type: Application
    Filed: March 23, 2006
    Publication date: September 10, 2009
    Inventors: Yoshihisa Yamashita, Seiji Karashima, Takashi Kitae, Seiichi Nakatani, Toshiyuki Kojima, Shingo Komatsu
  • Publication number: 20090200522
    Abstract: The present invention provides a conductive resin composition for connecting electrodes electrically, in which metal particles are dispersed in a flowing medium, wherein the flowing medium includes a first flowing medium that has relatively high wettability with the metal particles and a second flowing medium that has relatively low wettability with the metal particles, and the first flowing medium and the second flowing medium are dispersed in a state of being incompatible with each other. Thereby, a flip chip packaging method that can be applied to flip chip packaging of LSI and has high productivity and high reliability is provided.
    Type: Application
    Filed: April 16, 2009
    Publication date: August 13, 2009
    Applicant: PANASONIC CORPORATION
    Inventors: Seiichi NAKATANI, Seiji KARASHIMA, Takashi KITAE, Susumu SAWADA
  • Publication number: 20090203170
    Abstract: A flip chip mounting method includes holding a circuit board (213) and a semiconductor chip (206), aligning the circuit board (213) with the semiconductor chip (206) while holding them with a predetermined gap therebetween, heating the circuit board (213) or the semiconductor chip (206) to a temperature at which solder powder in a solder resin composition (216) formed of solder powder (214) and a resin (215) is melted, supplying the solder resin composition (216) by a capillary phenomenon, and curing the resin (215), wherein the melted solder powder (214) in the solder resin composition (216) is moved through the predetermined gap across which the circuit board (213) and the semiconductor chip (206) are held, and self-assembled and grown, whereby the connection terminals (211) and the electrode terminals (207) are connected to each other electrically.
    Type: Application
    Filed: March 30, 2006
    Publication date: August 13, 2009
    Applicant: Matsushita Electric Industrial Co., Ltd
    Inventors: Seiichi Nakatani, Seiji Karashima, Takashi Kitae, Yoshihisa Yamashita, Takashi Ichiryu
  • Publication number: 20090133901
    Abstract: [Summary] [Problem] To provide a conductive pattern formation method in which a fine pattern can be formed in a simple way at low cost. [Means for solving problem] A flat plate having a convex pattern on its surface is provided so as to oppose a substrate, a fluid body including conductive particles and a gas bubble generating agent is supplied into a gap between the substrate and the flat plate, and thereafter, the fluid body is heated for generating gas bubbles from the gas bubble generating agent included in the fluid body. The fluid body is forced out of the gas bubbles as the gas bubbles generated from the gas bubble generating agent grow, so as to self-assemble between the convex pattern formed on the flat plate and the substrate owing to interfacial force, and an aggregate of the conductive particles included in the fluid body having self-assembled is made into a conductive pattern formed on the substrate.
    Type: Application
    Filed: August 11, 2005
    Publication date: May 28, 2009
    Inventors: Seiji Karashima, Takashi Kitae, Seiichi Nakatani
  • Patent number: 7537961
    Abstract: The present invention provides a conductive resin composition for connecting electrodes electrically, in which metal particles are dispersed in a flowing medium, wherein the flowing medium includes a first flowing medium that has relatively high wettability with the metal particles and a second flowing medium that has relatively low wettability with the metal particles, and the first flowing medium and the second flowing medium are dispersed in a state of being incompatible with each other. Thereby, a flip chip packaging method that can be applied to flip chip packaging of LSI and has high productivity and high reliability is provided.
    Type: Grant
    Filed: March 8, 2007
    Date of Patent: May 26, 2009
    Assignee: Panasonic Corporation
    Inventors: Seiichi Nakatani, Seiji Karashima, Takashi Kitae, Susumu Sawada
  • Publication number: 20090126876
    Abstract: A flip chip mounting method which is applicable to the flip chip mounting of a next-generation LSI and high in productivity and reliability as well as a method for connecting substrates are provided. A circuit board 10 having a plurality of connecting terminals 11 and a semiconductor chip 20 having a plurality of electrode terminals 21 are disposed in mutually facing relation and a resin 13 containing conductive particles 12 and a gas bubble generating agent is supplied into the space therebetween. In this state, the resin 13 is heated to generate gas bubbles 30 from the gas bubble generating agent contained in the resin 13. The resin 13 is pushed toward the outside of the generated gas bubbles 30 by the growth thereof. The resin 13 pushed to the outside is self-assembled in the form of columns between the respective terminals of the circuit board 10 and the semiconductor chip 20.
    Type: Application
    Filed: April 8, 2008
    Publication date: May 21, 2009
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Seiji Karashima, Takashi Kitae, Seiichi Nakatani
  • Patent number: 7531385
    Abstract: A flip chip mounting method which is applicable to the flip chip mounting of a next-generation LSI and high in productivity and reliability as well as a method for connecting substrates are provided. A circuit board 10 having a plurality of connecting terminals 11 and a semiconductor chip 20 having a plurality of electrode terminals 21 are disposed in mutually facing relation and a resin 13 containing conductive particles 12 and a gas bubble generating agent is supplied into the space therebetween. In this state, the resin 13 is heated to generate gas bubbles 30 from the gas bubble generating agent contained in the resin 13. The resin 13 is pushed toward the outside of the generated gas bubbles 30 by the growth thereof. The resin 13 pushed to the outside is self-assembled in the form of columns between the respective terminals of the circuit board 10 and the semiconductor chip 20.
    Type: Grant
    Filed: March 16, 2006
    Date of Patent: May 12, 2009
    Assignee: Panasonic Corporation
    Inventors: Seiji Karashima, Takashi Kitae, Seiichi Nakatani
  • Patent number: 7531387
    Abstract: A flip chip mounting method which is applicable to the flip chip mounting of a next-generation LSI and high in productivity and reliability as well as a bump forming method are provided. After a resin 14 containing a solder powder 16 and a gas bubble generating agent is supplied to a space between a circuit board 21 having a plurality of connecting terminals 11 and a semiconductor chip 20 having a plurality of electrode terminals 12, the resin 14 is heated to generate gas bubbles 30 from the gas bubble generating agent contained in the resin 14. The resin 14 is pushed toward the outside of the generated gas bubbles 30 by the growth thereof and self-assembled between the connecting terminals 11 and the electrode terminals 12. By further heating the resin 14 and melting the solder powder 16 contained in the resin 14 self-assembled between the terminals, connectors 22 are formed between the terminals to complete a flip chip mounting body.
    Type: Grant
    Filed: March 16, 2006
    Date of Patent: May 12, 2009
    Assignee: Panasonic Corporation
    Inventors: Seiji Karashima, Takashi Kitae, Seiichi Nakatani
  • Publication number: 20090117688
    Abstract: A flip chip mounting method which is applicable to the flip chip mounting of a next-generation LSI and high in productivity and reliability as well as a bump forming method are provided. After a resin 14 containing a solder powder 16 and a gas bubble generating agent is supplied to a space between a circuit board 21 having a plurality of connecting terminals 11 and a semiconductor chip 20 having a plurality of electrode terminals 12, the resin 14 is heated to generate gas bubbles 30 from the gas bubble generating agent contained in the resin 14. The resin 14 is pushed toward the outside of the generated gas bubbles 30 by the growth thereof and self-assembled between the connecting terminals 11 and the electrode terminals 12. By further heating the resin 14 and melting the solder powder 16 contained in the resin 14 self-assembled between the terminals, connectors 22 are formed between the terminals to complete a flip chip mounting body.
    Type: Application
    Filed: March 16, 2006
    Publication date: May 7, 2009
    Inventors: Seiji Karashima, Takashi Kitae, Seiichi Nakatani
  • Publication number: 20090115071
    Abstract: A flip chip mounting method which is applicable to the flip chip mounting of a next-generation LSI and high in productivity and reliability as well as a method for connecting substrates are provided. A circuit board 10 having a plurality of connecting terminals 11 and a semiconductor chip 20 having a plurality of electrode terminals 21 are disposed in mutually facing relation and a resin 13 containing conductive particles 12 and a gas bubble generating agent is supplied into the space therebetween. In this state, the resin 13 is heated to generate gas bubbles 30 from the gas bubble generating agent contained in the resin 13. The resin 13 is pushed toward the outside of the generated gas bubbles 30 by the growth thereof. The resin 13 pushed to the outside is self-assembled in the form of columns between the respective terminals of the circuit board 10 and the semiconductor chip 20.
    Type: Application
    Filed: March 16, 2006
    Publication date: May 7, 2009
    Inventors: Seiji Karashima, Takashi Kitae, Siichi Nakatani
  • Publication number: 20090102064
    Abstract: A connection structure (package 10) has a first plate body 101 and a second plate body; in the first plate body 101, a wiring pattern having a plurality of connection terminals 102 is formed, and the second plate body has at least two connection terminals (electrode terminals 104) arranged facing the connection terminals of the first plate body 101. The connection terminals of the first and second plate bodies are connection terminals formed as projections on the surfaces of the first and second plate bodies. A conductive substance 108 is accumulated to cover at least a part of each side face of the connection terminals opposed to each other of the first and second plate bodies, and the connection terminals thus opposed are connected to each other via the conductive substance. The package thus formed is ready for a high-pin-count, narrow-pitch configuration of a next-generation semiconductor chip, and exhibits excellent productivity and reliability.
    Type: Application
    Filed: April 18, 2007
    Publication date: April 23, 2009
    Applicant: PANASONIC CORPORATION
    Inventors: Susumu Sawada, Seiichi Nakatani, Seiji Karashima, Takashi Kitae
  • Publication number: 20090085227
    Abstract: A flip chip mounting body in which a circuit substrate having a plurality of connection terminals and an electronic part (semiconductor chip) having a plurality of electrode terminals are aligned face to face with each other, with a resin composition composed of solder powder, a resin and a convection additive being sandwiched in between, while a means such as spacers is interposed in between so as to provide a uniform gap between the two parts, or the electronic part (semiconductor chip) is placed inside a plate-shaped member having two or more protruding portions, so that the solder powder is allowed to move through boiling of the convection additive and to be self-aggregated to form a solder layer, thereby electrically connecting the connection terminals and the electrode terminals; and a mounting method for such a mounting body.
    Type: Application
    Filed: May 9, 2006
    Publication date: April 2, 2009
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Tsukasa Shiraishi, Seiichi Nakatani, Seiji Karashima, Koichi Hirano, Takashi Kitae, Yoshihisa Yamashita, Takashi Ichiryu
  • Publication number: 20090078746
    Abstract: A method for forming bumps 19 on electrodes 32 of a wiring board 31 includes the steps of: (a) supplying a fluid 14 containing conductive particles 16 and a gas bubble generating agent onto a first region 17 including the electrodes 32 on the wiring board 31; (b) disposing a substrate 40 having a wall surface 45 formed near the electrodes 32 for forming a meniscus 55 of the fluid 14, so that the substrate 40 faces the wiring board 31; and (c) heating the fluid 14 to generate gas bubbles 30 from the gas bubble generating agent contained in the fluid 14.
    Type: Application
    Filed: February 22, 2007
    Publication date: March 26, 2009
    Inventors: Seiji Karashima, Yasushi Taniguchi, Seiichi Nakatani, Kenichi Hotehama, Takashi Kitae, Susumu Sawada
  • Publication number: 20090023245
    Abstract: The invention involves mounting a solder resin composition (6) including a solder powder (5a) and a resin (4) on the first electronic component (2); arranging such that the connecting terminals (3) of the first electronic component (2) and the electrode terminals (7) of the second electronic component (8) are facing each other; ejecting a gas (9a) from a gas generation source (1) included in the first electronic component (2) by heating the first electronic component (2) and the solder resin composition; and inducing the flow of the solder powder (5a) in the solder resin composition (6) by inducing convection of the gas (9a) in the solder resin composition (6), and electrically connecting the connecting terminals (3) and the electrode terminals (7) by self-assembly on the connecting terminals (3) and the electrode terminals (7).
    Type: Application
    Filed: March 16, 2006
    Publication date: January 22, 2009
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD
    Inventors: Takashi Kitae, Seiichi Nakatani, Seiji Karashima, Yoshihisa Yamashita, Takashi Ichiryu
  • Publication number: 20090008776
    Abstract: In an electronic component mounted body, an electrode of a first electronic component and an electrode of a second electronic component are electrically connected by a solder connecter, and the solder connecter contains solder and insulation filler. Alternatively, a solder bump is formed on the electrode of the electronic component, and the solder bump includes the insulation filler.
    Type: Application
    Filed: February 23, 2007
    Publication date: January 8, 2009
    Inventors: Takashi Kitae, Seiichi Nakatani, Seiji Karashima, Susumu Sawada, Kenichi Hotehama
  • Publication number: 20090008800
    Abstract: The flip chip mounted body of the present invention includes: a circuit board (213) having a plurality of connection terminals (211); a semiconductor chip (206) having a plurality of electrode terminals (207) that are disposed opposing the connection terminals (211); and a porous sheet (205) having a box shape that is provided on an opposite side of a formation surface of the electrode terminal (207) of the semiconductor chip (206), is folded on an outer periphery of the semiconductor chip (206) on the formation surface side of the electrode terminal (207) and is in contact with the circuit board (213), wherein the connection terminal (211) of the circuit board (213) and the electrode terminal (207) of the semiconductor chip (206) are connected electrically via a solder layer (215), and the circuit board (213) and the semiconductor chip (206) are fixed by a resin (217).
    Type: Application
    Filed: March 14, 2006
    Publication date: January 8, 2009
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Seiichi Nakatani, Takashi Kitae, Yoshihisa Yamashita, Takashi Ichiryu, Seiji Karashima
  • Publication number: 20080284046
    Abstract: A flip chip mounting method which is applicable to the flip chip mounting of a next-generation LSI and high in productivity and reliability as well as a bump forming method are provided. After a resin 14 containing a solder powder 16 and a gas bubble generating agent is supplied to a space between a circuit board 21 having a plurality of connecting terminals 11 and a semiconductor chip 20 having a plurality of electrode terminals 12, the resin 14 is heated to generate gas bubbles 30 from the gas bubble generating agent contained in the resin 14. The resin 14 is pushed toward the outside of the generated gas bubbles 30 by the growth thereof and self-assembled between the connecting terminals 11 and the electrode terminals 12. By further heating the resin 14 and melting the solder powder 16 contained in the resin 14 self-assembled between the terminals, connectors 22 are formed between the terminals to complete a flip chip mounting body.
    Type: Application
    Filed: April 30, 2008
    Publication date: November 20, 2008
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Seiji Karashima, Takashi Kitae, Seiichi Nakatani
  • Publication number: 20080251894
    Abstract: A mounted body (100) of the present invention includes: a semiconductor element (10) having a surface (10a) on which element electrodes (12) are formed and a rear surface (10b) opposing the surface (10a); and a mounting board (30) on which wiring patterns (35) each having an electrode terminal (32) are formed. The rear surface (10b) of the semiconductor element (10) is in contact with the mounting board (30), and the element electrodes (12) of the semiconductor element (10) are connected electrically to the electrode terminals (32) of the wiring pattern (35) formed on the mounting board (30) via solder connectors (20) formed of solder particles assembled into a bridge shape. With this configuration, fine pitch connection between the element electrodes of the semiconductor element and the electrode terminals of the mounting board becomes possible.
    Type: Application
    Filed: February 21, 2006
    Publication date: October 16, 2008
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toshiyuki Kojima, Seiichi Nakatani, Yoshihisa Yamashita, Takashi Kitae, Shingo Komatsu
  • Publication number: 20080197173
    Abstract: [Problem] To provide a method for forming solder bumps for realizing high density mounting and a highly reliable method for mounting a semiconductor device. [Means for Solving Problem] A flat plate 10 or 30 having a plurality of projections 12 or recesses 32 thereon is prepared; the flat plate is aligned to oppose an electronic component 14 or 34 and a resin composition 18 or 19 including a solder powder 22 or 23 is supplied to a gap between the flat plate and the electronic component; the resin composition is annealed to melt the solder powder included in the resin composition for growing the solder powder up to the level of the surface of the flat plate by allowing the melted solder powder to self-assemble on terminals 16 or 36, so as to form solder bumps 24 or 38 on the terminals; and the flat plate is removed after cooling and solidifying the solder bumps.
    Type: Application
    Filed: April 25, 2006
    Publication date: August 21, 2008
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Takashi Kitae, Seiichi Nakatani, Toshiyuki Kojima, Shingo Komatsu, Yoshihisa Yamashita
  • Publication number: 20080128664
    Abstract: There is provided a flip-chip mounting resin composition which can be used for a flip-chip mounting process that is high in productivity and reliability and thus can be applicable to a flip-chip mounting of a next-generation LSI. This flip-chip mounting resin composition comprises a resin, metal particles and a convection additive 12 that boils upon heating the resin 13. Upon the heating of the resin 13, the metal particles melt and the boiling convection additive 12 convects within the resin 13. This flip-chip mounting resin composition is supplied between a circuit substrate 10 and a semiconductor chip 20, and subsequently the resin 13 is heated so that the molten metal particles self-assemble into the region between each electrode of the circuit substrate and each electrode of the semiconductor chip. As a result, an electrical connection is formed between each electrode of the circuit substrate and each electrode of the semiconductor chip.
    Type: Application
    Filed: December 14, 2005
    Publication date: June 5, 2008
    Inventors: Takashi Kitae, Seiji Karashima, Koichi Hirano, Toshiyuki Kojima, Seiichi Nakatani, Shingo Komatsu, Yoshihisa Yamashita