Patents by Inventor Takashi Suga

Takashi Suga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120119757
    Abstract: A noise current passing through a substrate on which an electronic component is mounted is suppressed in a housing, to provide a malfunction of an electronic device. A substrate (103) on which an electronic component is mounted is secured to a housing (102) by a metal spacer (108) and a screw (104). A noise control member (100) mainly composed of an insulation substance is disposed between the metal spacer (108) and the substrate (103). A first conductive film is formed on the metal spacer-side of the noise control member (100), and a second conductive film is formed on the substrate-side of the noise control member (100). A resistance member (101) is disposed between the first conductive film and the second conductive film. A noise current introduced from the housing to the substrate can be suppressed by the resistance member.
    Type: Application
    Filed: May 26, 2010
    Publication date: May 17, 2012
    Applicant: Hitachi, Ltd.
    Inventors: Satoshi Nakamura, Takashi Suga, Yutaka Uetmatsu
  • Patent number: 8089291
    Abstract: A junction-current probe is provided which can measure a current flowing in a junction port adapted to connect a circuit board or an electronic apparatus to a chassis under the condition that the circuit board or electronic apparatus is packaged to the chassis. Structurally, the current probe has a circular or rectangular insulator having a hole in the center, a coiled conductor wire for converting linkage flux into voltage, an insulating member for preventing the insulator from making electrical contact with surroundings, an extraction lead for connecting opposite ends of the conductor wire to a cable and the cable for connection to a measurement unit. The current probe is reduced in thickness within in a range in which the condition of packaging to the chassis can remain unchanged.
    Type: Grant
    Filed: June 17, 2010
    Date of Patent: January 3, 2012
    Assignee: Hitachi, Ltd.
    Inventors: Hiroki Funato, Takashi Suga
  • Publication number: 20110320995
    Abstract: To provide a simulation technology of ending multiphysics analysis on heat, vibration, and EMC within a practical time and with a low-price computation process at an early stage of product designing, in a noise analysis designing method for an electric device, such as an inverter for automobile, this electric device includes one or more energy sources, a propagation path through which energy from the energy source propagates, and a noise occurring part where an electromagnetic radiated noise occurs due to the energy coming from the propagation path, the method has a step of estimating the occurring noise, such as a occurring radiated noise, by analyzing a path specified by a user by using a calculator, and the path specified by the user is a path of the energy flowing through the propagation path.
    Type: Application
    Filed: November 13, 2009
    Publication date: December 29, 2011
    Applicant: HITACHI, LTD.
    Inventors: Hideki Osaka, Takashi Suga, Makoto Torigoe
  • Patent number: 8085548
    Abstract: There is provided a circuit substrate to be mounted in an electronic apparatus, and the circuit substrate has a power supply and a GND. The GND of the circuit substrate is electrically connected to GNDs of other components of the electronic apparatus through connecting parts. The circuit substrate has a part or circuit that implements a low impedance in an intended frequency range between the peripheral conductor of the connecting part opening to be used for the connection and the power supply of the circuit substrate.
    Type: Grant
    Filed: August 30, 2007
    Date of Patent: December 27, 2011
    Assignee: Hitachi, Ltd.
    Inventors: Hiroki Funato, Takashi Suga
  • Publication number: 20110235270
    Abstract: The object is to provide a power converter which is capable of minimizing an extent to which the power converter components other than the semiconductor module are thermally affected by the heat originating from the semiconductor module. A casing houses: semiconductor modules constituting a main circuit for power conversion; a capacitor electrically connected to the main circuit; drive circuits that provide the main circuit with a drive signal used in power conversion operation; a control circuit that provides the drive circuit with a control signal used to prompt the drive circuit to provide the drive signal. Within the casing, a cooling chamber including a coolant passage is formed, and a chamber wall of the cooling chamber is formed with a thermally conductive material. At least the semiconductor modules are housed inside the cooling chamber, and at least the capacitor and the control circuit are disposed outside the cooling chamber.
    Type: Application
    Filed: May 20, 2011
    Publication date: September 29, 2011
    Applicant: Hitachi, Ltd.
    Inventors: Kinya NAKATSU, Takayoshi Nakamura, Ryuichi Saito, Takashi Suga, Hiroki Funato
  • Publication number: 20110175594
    Abstract: An apparatus for measuring the magnitude of an electric field having an antenna open to the field. The antenna is connected to a data converter which generates an output signal proportional to the magnitude or power of the electric field detected by the antenna. The data converter provides an output signal to a memory unit which stores the magnitude of the electric field. The data converter and memory unit are contained within a housing and the antenna protrudes outwardly from that housing so that the housing and antenna may be positioned within the area of the electric field.
    Type: Application
    Filed: January 19, 2010
    Publication date: July 21, 2011
    Applicant: Hitachi, Ltd.
    Inventors: Hiroki Funato, Masayoshi Takahashi, Liang Shao, Takashi Suga
  • Patent number: 7978468
    Abstract: The object is to provide a power converter which is capable of minimizing an extent to which the power converter components other than the semiconductor module are thermally affected by the heat originating from the semiconductor module. A casing houses: semiconductor modules 20, 30 constituting a main circuit for power conversion; a capacitor 50 electrically connected to the main circuit; drive circuits 70, 71 that provide main circuit with a drive signal used in power conversion operation; a control circuit 74 that provides the drive circuit with a control signal used to prompt the drive circuit to provide the drive signal. Within the casing, a cooling chamber including a coolant passage 28 is formed, and a chamber wall of the cooling chamber is formed with a thermally conductive material.
    Type: Grant
    Filed: March 2, 2010
    Date of Patent: July 12, 2011
    Assignee: Hitachi, Ltd.
    Inventors: Kinya Nakatsu, Takayoshi Nakamura, Ryuichi Saito, Takashi Suga, Hiroki Funato
  • Patent number: 7969735
    Abstract: The object is to provide a power converter which is capable of minimizing an extent to which the power converter components other than the semiconductor module are thermally affected by the heat originating from the semiconductor module. A casing houses: semiconductor modules 20, 30 constituting a main circuit for power conversion; a capacitor 50 electrically connected to the main circuit; drive circuits 70, 71 that provide the main circuit with a drive signal used in power conversion operation; a control circuit 74 that provides the drive circuit with a control signal used to prompt the drive circuit to provide the drive signal. Within the casing, a cooling chamber including a coolant passage 28 is formed, and a chamber wall of the cooling chamber is formed with a thermally conductive material. At least the semiconductor modules 20, 30 are housed inside the cooling chamber, and at least the capacitor 50 and the control circuit 74 are disposed outside the cooling chamber.
    Type: Grant
    Filed: January 17, 2007
    Date of Patent: June 28, 2011
    Assignee: Hitachi, Ltd.
    Inventors: Kinya Nakatsu, Takayoshi Nakamura, Ryuichi Saito, Takashi Suga, Hiroki Funato
  • Patent number: 7851898
    Abstract: Disclosed is a multichip package or system-in package which the logic chip includes a selector circuit which, by transmitting a test mode select signal or a test mode select command to the logic chip, enables access from a logic signal pin connected to the logic chip, to a memory control signal to each of the “m” number of memory chips; and the memory control signal, when viewed from the logic chip, is connected using a one-for-one wiring scheme or a one-for-up-to-m branch wiring scheme, between the selector circuit and each of the “m” number of memory chips. This multichip package or system-in package is low in noise and high in operational reliability.
    Type: Grant
    Filed: March 21, 2006
    Date of Patent: December 14, 2010
    Assignees: Hitachi, Ltd., Elpida Memory, Inc.
    Inventors: Satoshi Nakamura, Takashi Suga, Mitsuaki Katagiri, Yukitoshi Hirose
  • Patent number: 7830689
    Abstract: First and second bases and composing a coolant path structure are arranged at the middle stage of the power converter, and semiconductor modules and a capacitor are arranged on both surfaces of the coolant path structure. Furthermore, through-holes are formed in the first and second bases, and cables of DC and AC circuits are laid via the through-holes.
    Type: Grant
    Filed: November 1, 2007
    Date of Patent: November 9, 2010
    Assignee: Hitachi, Ltd.
    Inventors: Takayoshi Nakamura, Kinya Nakatsu, Ryuichi Saito, Takashi Suga, Hiroki Funato
  • Publication number: 20100253367
    Abstract: A junction-current probe is provided which can measure a current flowing in a junction port adapted to connect a circuit board or an electronic apparatus to a chassis under the condition that the circuit board or electronic apparatus is packaged to the chassis. Structurally, the current probe has a circular or rectangular insulator having a hole in the center, a coiled conductor wire for converting linkage flux into voltage, an insulating member for preventing the insulator from making electrical contact with surroundings, an extraction lead for connecting opposite ends of the conductor wire to a cable and the cable for connection to a measurement unit. The current probe is reduced in thickness within in a range in which the condition of packaging to the chassis can remain unchanged.
    Type: Application
    Filed: June 17, 2010
    Publication date: October 7, 2010
    Inventors: Hiroki Funato, Takashi Suga
  • Patent number: 7772856
    Abstract: A junction-current probe is provided which can measure a current flowing in a junction port adapted to connect a circuit board or an electronic apparatus to a chassis under the condition that the circuit board or electronic apparatus is packaged to the chassis. Structurally, the current probe has a circular or rectangular insulator having a hole in the center, a coiled conductor wire for converting linkage flux into voltage, an insulating member for preventing the insulator from making electrical contact with surroundings, an extraction lead for connecting opposite ends of the conductor wire to a cable and the cable for connection to a measurement unit. The current probe is reduced in thickness within in a range in which the condition of packaging to the chassis can remain unchanged.
    Type: Grant
    Filed: August 11, 2006
    Date of Patent: August 10, 2010
    Assignee: Hitachi, Ltd.
    Inventors: Hiroki Funato, Takashi Suga
  • Publication number: 20100188813
    Abstract: The object is to provide a power converter which is capable of minimizing an extent to which the power converter components other than the semiconductor module are thermally affected by the heat originating from the semiconductor module. A casing houses: semiconductor modules 20, 30 constituting a main circuit for power conversion; a capacitor 50 electrically connected to the main circuit; drive circuits 70, 71 that provide the main circuit with a drive signal used in power conversion operation; a control circuit 74 that provides the drive circuit with a control signal used to prompt the drive circuit to provide the drive signal. Within the casing, a cooling chamber including a coolant passage 28 is formed, and a chamber wall of the cooling chamber is formed with a thermally conductive material. At least the semiconductor modules 20, 30 are housed inside the cooling chamber, and at least the capacitor 50 and the control circuit 74 are disposed outside the cooling chamber.
    Type: Application
    Filed: January 17, 2007
    Publication date: July 29, 2010
    Applicant: Hitachi, Ltd.
    Inventors: Kinya Nakatsu, Takayoshi Nakamura, Ryuichi Saito, Takashi Suga, Hiroki Funato
  • Publication number: 20100188814
    Abstract: The object is to provide a power converter which is capable of minimizing an extent to which the power converter components other than the semiconductor module are thermally affected by the heat originating from the semiconductor module. A casing houses: semiconductor modules 20, 30 constituting a main circuit for power conversion; a capacitor 50 electrically connected to the main circuit; drive circuits 70, 71 that provide the main circuit with a drive signal used in power conversion operation; a control circuit 74 that provides the drive circuit with a control signal used to prompt the drive circuit to provide the drive signal. Within the casing, a cooling chamber including a coolant passage 28 is formed, and a chamber wall of the cooling chamber is formed with a thermally conductive material. At least the semiconductor modules 20, 30 are housed inside the cooling chamber, and at least the capacitor 50 and the control circuit 74 are disposed outside the cooling chamber.
    Type: Application
    Filed: March 2, 2010
    Publication date: July 29, 2010
    Applicant: Hitachi, Ltd.
    Inventors: Kinya NAKATSU, Takayoshi Nakamura, Ryuichi Saito, Takashi Suga, Hiroki Funato
  • Patent number: 7694245
    Abstract: A method for designing a semiconductor package is disclosed, wherein the semiconductor package comprises a semiconductor chip and an adjustment target. A first target variable is calculated in consideration of a first transition state where an output level of the semiconductor chip changes from a low level to a high level. A second target variable is calculated in consideration of a second transition state where an output level of the semiconductor chip changes from the high level to the low level. Inferior one of the first and the second target variables is selected as a main target variable. The main target variable and a predetermined constraint represented in frequency domain are compared to decide design guidelines for the adjustment target.
    Type: Grant
    Filed: February 27, 2007
    Date of Patent: April 6, 2010
    Assignee: Elpida Memory
    Inventors: Mitsuaki Katagiri, Satoshi Nakamura, Takashi Suga, Yoji Nishio, Satoshi Isa, Satoshi Itaya
  • Patent number: 7689944
    Abstract: A method for designing a semiconductor apparatus comprising a semiconductor package in consideration of power integrity for a semiconductor chip included in the semiconductor package is disclosed. A target variable for an adjustment target is calculated on the basis of target information about the adjustment target, wherein the target variable is represented in frequency domain, and the adjustment target includes a part of the semiconductor package. The target variable is compared with a predetermined constraint, which is represented in frequency domain, to identify a problematic section, wherein the problematic section corresponds to a frequency region at which the target variable exceeds the predetermined constraint. Design guidelines are decided to solve the identified problematic section.
    Type: Grant
    Filed: August 29, 2006
    Date of Patent: March 30, 2010
    Assignee: Elpida Memory, Inc.
    Inventors: Mitsuaki Katagiri, Satoshi Nakamura, Takashi Suga, Satoshi Isa, Yoji Nishio, Seiji Funaba, Yukitoshi Hirose
  • Patent number: 7681154
    Abstract: A method for designing a device that comprises a first semiconductor chip, a second semiconductor chip and an adjustment target is disclosed. The first semiconductor chip comprises an input pad, a first power supply pad and a first ground pad. The second semiconductor chip comprises an output pad coupled to the input pad. The adjustment target is connected to the first and the second semiconductor chips. A main target variable is calculated from an input circuit chip model, an output circuit chip model of the second semiconductor chip in frequency domain and a target impedance model of the adjustment target in frequency domain. The input circuit chip model is created by representing the first semiconductor chip in frequency domain in consideration of a first capacitor model between the input pad and the first power supply pad, a second capacitor model between the input pad and the first ground pad, and a chip internal capacitor model between the first power supply pad and the first ground pad.
    Type: Grant
    Filed: September 13, 2007
    Date of Patent: March 16, 2010
    Assignees: Elpida Memory, Inc., Hitachi, Ltd.
    Inventors: Mitsuaki Katagiri, Satoshi Nakamura, Takashi Suga, Hiroya Shimizu, Satoshi Isa, Satoshi Itaya, Yukitoshi Hirose
  • Patent number: 7604484
    Abstract: A circuit board having: a through hole to mount the circuit board to a casing or an electronic apparatus; and a coil-shaped conductive pattern provided on a plane perpendicular to the through hole so as to intersect a circumference around the through hole as a center.
    Type: Grant
    Filed: February 2, 2007
    Date of Patent: October 20, 2009
    Assignee: Hitachi, Ltd.
    Inventors: Hiroki Funato, Takashi Suga, Tsutomu Hara
  • Patent number: 7595650
    Abstract: A magnetic field probe apparatus includes a loop-like conductor and feeder lines spaced at a distance from the loop-like conductor. The shape of the loop-like conductor and the arrangement of the feeder lines are adjusted in such a manner that the resonance frequency determined by the combination of the inductance of the loop-like conductor line and the capacitance formed between the looped-conductor and the feeder lines, is matched to the frequency of the magnetic field generated by and in the vicinity of a measurement object (e.g. electronic device) or the frequency of the electric signal which generates the magnetic field. With the magnetic field probe apparatus according to this invention, the magnetic field in the vicinity of the measurement object can be measured with high sensitivity.
    Type: Grant
    Filed: January 11, 2007
    Date of Patent: September 29, 2009
    Assignee: Hitachi, Ltd.
    Inventors: Hiroki Funato, Takashi Suga, Kouichi Uesaka
  • Publication number: 20080130223
    Abstract: First and second bases and composing a coolant path structure are arranged at the middle stage of the power converter, and semiconductor modules and a capacitor are arranged on both surfaces of the coolant path structure. Furthermore, through-holes are formed in the first and second bases, and cables of DC and AC circuits are laid via the through-holes.
    Type: Application
    Filed: November 1, 2007
    Publication date: June 5, 2008
    Applicant: Hitachi, Ltd.
    Inventors: Takayoshi Nakamura, Kinya Nakatsu, Ryuichi Saito, Takashi Suga, Hiroki Funato