Patents by Inventor Takashi Taguchi

Takashi Taguchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100236587
    Abstract: An interface block is constituted by a cleaning/drying processing block and a carry-in/carry-out block. The cleaning/drying processing block includes cleaning/drying processing sections and a transport section. The transport section is provided with a transport mechanism. The carry-in/carry-out block is provided with a transport mechanism. The transport mechanism carries substrates in and out of an exposure device.
    Type: Application
    Filed: March 17, 2010
    Publication date: September 23, 2010
    Inventors: Tetsuya HAMADA, Takashi Taguchi
  • Publication number: 20100240195
    Abstract: A semiconductor device has a transparent dielectric substrate such as a sapphire substrate. To enable fabrication equipment to detect the presence of the substrate optically, the back surface of the substrate is coated with a triple-layer light-reflecting film, preferably a film in which a silicon oxide or silicon nitride layer is sandwiched between polycrystalline silicon layers. This structure provides high reflectance with a combined film thickness of less than half a micrometer.
    Type: Application
    Filed: May 13, 2010
    Publication date: September 23, 2010
    Applicant: OKI SEMICONDUCTOR CO., LTD.
    Inventors: Toshiyuki Nakamura, Satoshi Machida, Sachiko Yabe, Takashi Taguchi
  • Patent number: 7745880
    Abstract: A semiconductor device has a transparent dielectric substrate such as a sapphire substrate. To enable fabrication equipment to detect the presence of the substrate optically, the back surface of the substrate is coated with a triple-layer light-reflecting film, preferably a film in which a silicon oxide or silicon nitride layer is sandwiched between polycrystalline silicon layers. This structure provides high reflectance with a combined film thickness of less than half a micrometer.
    Type: Grant
    Filed: October 19, 2005
    Date of Patent: June 29, 2010
    Assignee: Oki Semiconductor Co., Ltd.
    Inventors: Toshiyuki Nakamura, Satoshi Machida, Sachiko Yabe, Takashi Taguchi
  • Publication number: 20100136257
    Abstract: A method of processing a substrate in a substrate processing apparatus that is arranged adjacent to an exposure device and includes first, second and third processing units, includes forming a photosensitive film on the substrate by said first processing unit before exposure processing by said exposure device and applying washing processing to the substrate by supplying a washing liquid to the substrate in said second processing unit after the formation of said photosensitive film and before the exposure processing. The method also includes applying drying processing to the substrate in said second processing unit after the washing processing by said second processing unit and before the exposure processing and applying development processing to the substrate by said third processing unit after the exposure processing. Applying the drying processing to the substrate includes the step of supplying an inert gas onto the substrate, to which the washing liquid is supplied.
    Type: Application
    Filed: February 2, 2010
    Publication date: June 3, 2010
    Applicant: Sokudo Co., Ltd.
    Inventors: Shuichi Yasuda, Masashi Kanaoka, Koji Kaneyama, Tadashi Miyagi, Kazuhito Shigemori, Toru Asano, Yukio Toriyama, Takashi Taguchi, Tsuyoshi Mitsuhashi, Tsuyoshi Okumura
  • Publication number: 20100136492
    Abstract: A method of processing a substrate in a substrate processing apparatus that is arranged adjacent to an exposure device and includes first, second and third processing units, includes the steps of: forming a photosensitive film made of a photosensitive material on the substrate by said first processing unit before exposure processing by said exposure device. The method also includes applying washing processing to the substrate by said second processing unit after the formation of said photosensitive film by said first processing unit and before the exposure processing by said exposure device and transporting the substrate after the washing processing to said exposure device. The method further includes transporting the substrate from said exposure device and applying development processing by said third processing unit to the substrate transported after the exposure processing by said exposure device.
    Type: Application
    Filed: February 2, 2010
    Publication date: June 3, 2010
    Applicant: Sokudo Co., Ltd.
    Inventors: Shuichi Yasuda, Masashi Kanaoka, Koji Kaneyama, Tadashi Miyagi, Kazuhito Shigemori, Toru Asano, Yukio Toriyama, Takashi Taguchi, Tsuyoshi Mitsuhashi, Tsuyoshi Okumura
  • Publication number: 20100129526
    Abstract: A method of processing a substrate in a substrate processing apparatus that is arranged adjacent to an exposure device and includes first, second and third processing units, includes the steps of forming a film made of a photosensitive material on the substrate by said first processing unit before exposure processing by said exposure device.
    Type: Application
    Filed: February 2, 2010
    Publication date: May 27, 2010
    Applicant: Sokudo Co., Ltd.
    Inventors: Shuichi Yasuda, Masashi Kanaoka, Koji Kaneyama, Tadashi Miyagi, Kazuhito Shigemori, Toru Asano, Yukio Toriyama, Takashi Taguchi, Tsuyoshi Mitsuhashi, Tsuyoshi Okumura
  • Patent number: 7549811
    Abstract: A forward direction-only path (first substrate transport path) is formed for transporting substrates in a forward direction to pass the substrates on to an exposing apparatus. A separate, substrate transport path (second substrate transport path) is formed exclusively for post-exposure bake (PEB). Substrate transport along each path is carried out independently of substrate transport along the other. A fourth main transport mechanism is interposed as a predetermined substrate transport mechanism between transfer points consisting of a buffer acting as a temporary storage module for temporarily storing the substrates and a post-exposure bake (PEB) unit corresponding to a predetermined treating unit. This arrangement forms the path for transporting the substrates between the buffer and the PEB unit, to allow PEB treatment of the substrates to be performed smoothly. Similarly, the substrates are transported smoothly to the buffer.
    Type: Grant
    Filed: November 30, 2007
    Date of Patent: June 23, 2009
    Assignee: Dainippon Screen Mfg. Co., Ltd.
    Inventors: Yoshihisa Yamada, Masafumi Maeda, Takashi Taguchi
  • Publication number: 20080092805
    Abstract: A forward direction-only path (first substrate transport path) is formed for transporting substrates in a forward direction to pass the substrates on to an exposing apparatus. A separate, substrate transport path (second substrate transport path) is formed exclusively for post-exposure bake (PEB). Substrate transport along each path is carried out independently of substrate transport along the other. A fourth main transport mechanism is interposed as a predetermined substrate transport mechanism between transfer points consisting of a buffer acting as a temporary storage module for temporarily storing the substrates and a post-exposure bake (PEB) unit corresponding to a predetermined treating unit. This arrangement forms the path for transporting the substrates between the buffer and the PEB unit, to allow PEB treatment of the substrates to be performed smoothly. Similarly, the substrates are transported smoothly to the buffer.
    Type: Application
    Filed: November 30, 2007
    Publication date: April 24, 2008
    Inventors: Yoshihisa Yamada, Masafumi Maeda, Takashi Taguchi
  • Patent number: 7332405
    Abstract: A semiconductor integrated circuit is fabricated in a substrate having a semiconductor layer and an underlying insulator layer. The fabrication process includes a step of locally oxidizing the semiconductor layer to form a field oxide, during which step the semiconductor layer is protected by a nitride film. The nitride film has both openings to permit local oxidization in the integrated circuit area, and an opening defining an alignment mark adjacent to the circuit area. The alignment mark may be formed either in the semiconductor and insulator layers, or in a part of the nitride film left after the nitride film is removed from the circuit area. In either case, the edge height of the alignment mark is not limited by the thickness of the semiconductor layer. Using the nitride layer to define both the alignment mark and the field oxide reduces the necessary number of fabrication steps.
    Type: Grant
    Filed: February 3, 2005
    Date of Patent: February 19, 2008
    Assignee: Oki Electric Industry Co., Ltd.
    Inventors: Sachiko Yabe, Takashi Taguchi, Minoru Watanabe
  • Patent number: 7323060
    Abstract: A forward direction-only path (first substrate transport path) is formed for transporting substrates in a forward direction to pass the substrates on to an exposing apparatus. A separate, substrate transport path (second substrate transport path) is formed exclusively for post-exposure bake (PEB). Substrate transport along each path is carried out independently of substrate transport along the other. A fourth main transport mechanism is interposed as a predetermined substrate transport mechanism between transfer points consisting of a buffer acting as a temporary storage module for temporarily storing the substrates and a post-exposure bake (PEB) unit corresponding to a predetermined treating unit. This arrangement forms the path for transporting the substrates between the buffer and the PEB unit, to allow PEB treatment of the substrates to be performed smoothly. Similarly, the substrates are transported smoothly to the buffer.
    Type: Grant
    Filed: December 10, 2004
    Date of Patent: January 29, 2008
    Assignee: Dainippon Screen Mfg. Co., Ltd.
    Inventors: Yoshihisa Yamada, Masafumi Maeda, Takashi Taguchi
  • Patent number: 7312019
    Abstract: A method of forming a linear grating is disclosed. When forming a first resist pattern covering certain surface regions of a substrate, the mask pattern position is shifted and the first resist pattern is formed such that the trench in the target region is completely filled with the first resist pattern even when an error in positioning occurs. The surface of the first resist pattern is etched, and a lower resist pattern is left to the same level as the uppermost step of the silicon substrate. On top of this, an upper resist pattern having the same pattern as the first resist pattern is formed. At this time, the mask pattern position is shifted and the exposure dose is adjusted such that one edge of the upper resist pattern is positioned on the lower resist pattern, and the other edge is positioned in a prescribed region border portion. The lower resist pattern and upper resist pattern are used as a mask to etch the silicon substrate.
    Type: Grant
    Filed: February 28, 2005
    Date of Patent: December 25, 2007
    Assignee: Oki Electric Industry Co., Ltd.
    Inventors: Suguru Sasaki, Satoshi Machida, Takashi Taguchi
  • Publication number: 20070200816
    Abstract: A semiconductor integrated circuit device includes first to k-th decoders, and a MOS transistor switch group having a hierarchical structure of first to k-th hierarchies and operated on a second voltage level. An n-bit input signal of a first voltage level is divided into k groups (k is an integral number equal to or larger than 2) and input to the first to k-th decoders. The first to k-th decoders decode the input signal, shift the decode results to the second voltage level higher than the first voltage level and output the same. The MOS transistor switch group is supplied with 2n analog inputs at the first hierarchy, selects one of the 2n analog inputs and outputs the selected analog input from the k-th hierarchy.
    Type: Application
    Filed: February 27, 2007
    Publication date: August 30, 2007
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Takashi Taguchi
  • Patent number: 7180199
    Abstract: A semiconductor device comprises a semiconductor substrate having a first surface and a second surface, and a first multilayer laminated structure film which is formed in the first surface of the semiconductor substrate and has a first layer having a first refractive index, a second layer formed on the first layer and having a second refractive index lower than the first refractive index, and a third layer formed on the second layer and having a third refractive index higher than the second refractive index, and in which the thicknesses of the respective layers are respectively thicknesses calculated by (2N+1)?/(4n) where the wavelength of light used for detecting the first multilayer laminated structure film is defined as ?, the refractive indices of the respective layers are defined as n, and N is defined as 0 or a natural number.
    Type: Grant
    Filed: February 2, 2006
    Date of Patent: February 20, 2007
    Assignee: Oki Electric Industry Co., Ltd.
    Inventors: Satoshi Machida, Takashi Taguchi, Noboru Uchida, Suguru Sasaki
  • Patent number: 7169712
    Abstract: A method for manufacturing a microlens formed on a semiconductor substrate includes the steps of preparing the semiconductor substrate, forming an insulating film, which has high etching selectivity with the semiconductor substrate, on the semiconductor substrate, forming a first resist layer, which has an opening that exposes a part of the insulating film, on the insulating film, forming a lens forming portion by eliminating a part of the insulting film, using the first resist layer as a mask, forming a second resist layer, which has roughly cylindrical shape, on the lens forming portion surrounded by the insulating film, transforming the second resist layer into a third resist layer that has roughly hemispheric shape by reflowing the second resist later with a heat treatment, and forming a lens on the semiconductor substrate by etching the third resist layer, the semiconductor substrate, and the insulating film simultaneously with anisotropic etching.
    Type: Grant
    Filed: October 12, 2005
    Date of Patent: January 30, 2007
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Takashi Taguchi
  • Publication number: 20060197237
    Abstract: A semiconductor device comprises a semiconductor substrate having a first surface and a second surface, and a first multilayer laminated structure film which is formed in the first surface of the semiconductor substrate and has a first layer having a first refractive index, a second layer formed on the first layer and having a second refractive index lower than the first refractive index, and a third layer formed on the second layer and having a third refractive index higher than the second refractive index, and in which the thicknesses of the respective layers are respectively thicknesses calculated by (2N+1)?/(4n) where the wavelength of light used for detecting the first multilayer laminated structure film is defined as ?, the refractive indices of the respective layers are defined as n, and N is defined as 0 or a natural number.
    Type: Application
    Filed: February 2, 2006
    Publication date: September 7, 2006
    Inventors: Satoshi Machida, Takashi Taguchi, Noboru Uchida, Suguru Sasaki
  • Publication number: 20060159449
    Abstract: A substrate processing apparatus comprises an indexer block, an anti-reflection film processing block, a resist film processing block, a development processing block, a drying processing block, and an interface block. An exposure device is arranged adjacent to the interface block. The drying processing block comprises a drying processing group. The interface block comprises an interface transport mechanism. A substrate is subjected to exposure processing by the exposure device, and subsequently transported to the drying processing group by the interface transport mechanism. The substrate is subjected to cleaning and drying processing by the drying processing group.
    Type: Application
    Filed: December 6, 2005
    Publication date: July 20, 2006
    Inventors: Shuichi Yasuda, Masashi Kanaoka, Koji Kaneyama, Tadashi Miyagi, Kazuhito Shigemori, Toru Asano, Yukio Toriyama, Takashi Taguchi, Tsuyoshi Mitsuhashi, Tsuyoshi Okumura
  • Publication number: 20060152693
    Abstract: A substrate processing apparatus comprises an indexer block, an anti-reflection film processing block, a resist film processing block, a development processing block, a processing block for liquid immersion exposure processing, and an interface block. An exposure device is arranged adjacent to the interface block. The processing block for liquid immersion exposure processing comprises a coating processing group for resist cover film and a removal processing group for resist cover film. The resist cover film is formed in the processing block for liquid immersion exposure processing before the exposure processing. The resist cover film is removed in the processing block for liquid immersion exposure processing after the exposure processing.
    Type: Application
    Filed: December 6, 2005
    Publication date: July 13, 2006
    Inventors: Shuichi Yasuda, Masashi Kanaoka, Koji Kaneyama, Tadashi Miyagi, Kazuhito Shigemori, Toru Asano, Yukio Toriyama, Takashi Taguchi, Tsuyoshi Mitsuhashi, Tsuyoshi Okumura
  • Publication number: 20060152694
    Abstract: A substrate processing apparatus comprises an indexer block, an anti-reflection film processing block, a resist film processing block, a development processing block, a washing processing block, and an interface block. An exposure device is arranged adjacent to the interface block. The washing processing block comprises washing processing group. A resist film is formed in the resist film processing block. Before the substrate is subjected to exposure processing by the exposure device, the substrate is subjected to washing and drying processing in the washing processing group.
    Type: Application
    Filed: December 6, 2005
    Publication date: July 13, 2006
    Inventors: Shuichi Yasuda, Masashi Kanaoka, Koji Kaneyama, Tadashi Miyagi, Kazuhito Shigemori, Toru Asano, Yukio Toriyama, Takashi Taguchi, Tsuyoshi Mitsuhashi, Tsuyoshi Okumura
  • Publication number: 20060147201
    Abstract: An interface transport mechanism employs an upper hand during the transport of a substrate to an exposure device, and employs a lower hand during the transport of the substrate that has been carried out of the exposure device. A fifth central robot employs a lower hand during the transport of a substrate after the exposure processing by an exposure device, and employs an upper hand during the transport of a substrate after the drying processing that has been carried out of a drying processing group. That is, the upper hand is employed to transport a substrate to which no liquid is attached, and the lower hand is employed to transport a substrate to which a liquid is attached after the exposure processing.
    Type: Application
    Filed: December 6, 2005
    Publication date: July 6, 2006
    Inventors: Toru Asano, Yukio Toriyama, Takashi Taguchi, Tsuyoshi Mitsuhashi, Koji Kaneyama, Tsuyoshi Okumura
  • Publication number: 20060147202
    Abstract: A substrate processing apparatus comprises an indexer block, an anti-reflection film processing block, a resist film processing block, a washing/development processing block, and an interface block. An exposure device is arranged adjacent to the interface block. A resist film is formed on a substrate by the resist film processing block. The substrate is washed and dried by the washing processing unit in the washing/development processing block before the substrate is subjected to the exposure processing by the exposure device.
    Type: Application
    Filed: December 6, 2005
    Publication date: July 6, 2006
    Inventors: Shuichi Yasuda, Masashi Kanaoka, Koji Kaneyama, Tadashi Miyagi, Kazuhito Shigemori, Toru Asano, Yukio Toriyama, Takashi Taguchi, Tsuyoshi Mitsuhashi, Tsuyoshi Okumura