Abstract: A semiconductor device has a transparent dielectric substrate such as a sapphire substrate. To enable fabrication equipment to detect the presence of the substrate optically, the back surface of the substrate is coated with a triple-layer light-reflecting film, preferably a film in which a silicon oxide or silicon nitride layer is sandwiched between polycrystalline silicon layers. This structure provides high reflectance with a combined film thickness of less than half a micrometer.

Abstract: A method for manufacturing a microlens formed on a semiconductor substrate includes the steps of preparing the semiconductor substrate, forming an insulating film, which has high etching selectivity with the semiconductor substrate, on the semiconductor substrate, forming a first resist layer, which has an opening that exposes a part of the insulating film, on the insulating film, forming a lens forming portion by eliminating a part of the insulting film, using the first resist layer as a mask, forming a second resist layer, which has roughly cylindrical shape, on the lens forming portion surrounded by the insulating film, transforming the second resist layer into a third resist layer that has roughly hemispheric shape by reflowing the second resist later with a heat treatment, and forming a lens on the semiconductor substrate by etching the third resist layer, the semiconductor substrate, and the insulating film simultaneously with anisotropic etching.

Abstract: A method of forming a linear grating is disclosed. When forming a first resist pattern covering certain surface regions of a substrate, the mask pattern position is shifted and the first resist pattern is formed such that the trench in the target region is completely filled with the first resist pattern even when an error in positioning occurs. The surface of the first resist pattern is etched, and a lower resist pattern is left to the same level as the uppermost step of the silicon substrate. On top of this, an upper resist pattern having the same pattern as the first resist pattern is formed. At this time, the mask pattern position is shifted and the exposure dose is adjusted such that one edge of the upper resist pattern is positioned on the lower resist pattern, and the other edge is positioned in a prescribed region border portion. The lower resist pattern and upper resist pattern are used as a mask to etch the silicon substrate.

Abstract: A semiconductor integrated circuit is fabricated in a substrate having a semiconductor layer and an underlying insulator layer. The fabrication process includes a step of locally oxidizing the semiconductor layer to form a field oxide, during which step the semiconductor layer is protected by a nitride film. The nitride film has both openings to permit local oxidization in the integrated circuit area, and an opening defining an alignment mark adjacent to the circuit area. The alignment mark may be formed either in the semiconductor and insulator layers, or in a part of the nitride film left after the nitride film is removed from the circuit area. In either case, the edge height of the alignment mark is not limited by the thickness of the semiconductor layer. Using the nitride layer to define both the alignment mark and the field oxide reduces the necessary number of fabrication steps.

Abstract: A forward direction-only path (first substrate transport path) is formed for transporting substrates in a forward direction to pass the substrates on to an exposing apparatus. A separate, substrate transport path (second substrate transport path) is formed exclusively for post-exposure bake (PEB). Substrate transport along each path is carried out independently of substrate transport along the other. A fourth main transport mechanism is interposed as a predetermined substrate transport mechanism between transfer points consisting of a buffer acting as a temporary storage module for temporarily storing the substrates and a post-exposure bake (PEB) unit corresponding to a predetermined treating unit. This arrangement forms the path for transporting the substrates between the buffer and the PEB unit, to allow PEB treatment of the substrates to be performed smoothly. Similarly, the substrates are transported smoothly to the buffer.

Abstract: A silicon-on-insulator (SOI) substrate has a grid-line region and a circuit region, and includes a silicon substrate having an upper surface, a first insulating layer having an upper surface and a silicon layer, and which has a grid-line region zoning a circuit region. An element isolation region is formed in the silicon layer of the circuit region of the SOI substrate, and an insulating region is formed in the silicon layer of the grid-line region of the SOI substrate. The insulating region and a portion of the first insulating layer located under the insulating region are removed to define a recess in the grid-line region.

Abstract: A D/A conversion circuit which can perform D/A conversion at high speed and with high precision is disclosed. The D/A conversion circuit comprises an analog reference power supply, an output buffer, a multiplexer, a pre-buffer, and a current changeover switch. The pre-buffer operates with a power supply voltage different from that of the analog reference power supply, and outputs a voltage substantially equal to an output voltage of the analog reference power supply. For a predetermined period after logic of digital data changes, the output voltage of the pre-buffer is supplied to the output buffer, and an input parasitic capacitor of the output buffer is charged/discharged. After the predetermined period elapses, the output voltage of the analog reference power supply is supplied to the output buffer.

Abstract: A silicon-on-insulator (SOI) substrate having a grid-line region and a circuit region, and including a silicon substrate having an upper surface, a first insulating layer having an upper surface and a silicon layer, and which has a grid-line region zoning a circuit region. An element isolation region is formed in the silicon layer of the circuit region of the SOI substrate, and an insulating region is formed in the silicon layer of the grid-line region of the SOI substrate. The insulating region and a portion of the first insulating layer located under the insulating region are removed to define a recess in the grid-line region.

Abstract: In a halftone phase shift mask including a mask substrate and a rectangular pattern having a side (L) formed on the substrate, which is defined within a large pattern which is transferred on a resist material formed on a semiconductor substrate, the rectangular pattern includes a plurality of first opaque patterns, each having a width (ML) equal to 1 to 1½ times the resolution limit of the resist material at least one transparent opening pattern, having a width (MS) less than half the resolution limit, and wherein the number (X) of the opaque patterns and transparent opening patterns is determined by a formula of: X=2P+1, where P=ROUND UP ((L−ML)/(ML+MS)).

Abstract: A liquid crystal display device significantly reduces power consumption and causes no signal delay when a liquid crystal panel performs an inversion-type drive. The liquid crystal display device comprises a digital controller, a level shift circuit, a digital-to-analog (D/A) converter, a liquid crystal panel, and a plurality of capacitors. In the D/A converter, a charging control circuit is provided corresponding to each capacitor. The charging control circuit comprises a switch, a diode and an inverter, the switch and the diode being coupled in parallel. The switch is turned on and off in response to a switching signal from the digital controller. The switch is changed to a turning- on state during a blanking period after one horizontal displaying. Upon turning-on of the switch, the capacitors are charged. Digital pixel data outputted from the digital controller undergoes a level changing depending on a voltage across the electrodes of the capacitors, according to a charge conservation.

Abstract: In an engine block structure in a multi-cylinder engine in which a piston is incorporated from the side of a crank chamber into each of a plurality of cylinders disposed in series in a cylinder block, cylinder axes of the two adjacent cylinders are disposed to extend in such directions that they are gradually spaced apart from each other as proceeding from the side of a valve operating chamber toward the crank chamber as viewed from a direction of arrangement of the cylinders. Thus, a sufficient crankshaft bearing area can be ensured without bringing an increase in number of parts and an increase in size of the engine block.

Abstract: A housing of a motor generator is integrally coupled to an end of an internal combustion engine. The internal combustion engine includes an oil pan and a cylinder block which have arcuate stiffener ribs and radial stiffener ribs on end surfaces thereof for increased mechanical strength of the internal combustion engine. The motor generator has a housing that is directly coupled to the internal combustion engine with a relatively small number of parts.

Abstract: A detected projection is integrally provided on one side of a rotor produced by pressing a plate material. A portion of a rotor is allowed to bulge from one side of the rotor by pressing. At least one end of the projection in a circumferential direction of the rotor is comprised of a shear end face steeply rising from the side of the rotor by a shearing effect during pressing. The shear end face is formed as a sensing end face for an electromagnetic pick-up. The detected projection generates a rotation detecting pulse in an electromagnetic pick-up disposed in proximity to the rotor. The accuracy in size of the projection is enhanced and moreover, when the projection is detected by the electromagnetic pick-up, a pulse wave form is generated clearly and sharply, thereby enhancing the sensing accuracy.

Abstract: A semiconductor device includes a semi-insulating substrate. A channel layer is formed on the semi-insulating substrate. An electron supply layer is formed on the semi-insulating substrate for generating a two-dimensional electron gas. The electron supply layer includes a doped superlattice layer. The superlattice layer includes layers of In.sub.X Al.sub.1-X As and layers of In.sub.Y Al.sub.1-Y As which alternate with each other, where 0.ltoreq.X.ltoreq.1.0 and 0.ltoreq.Y.ltoreq.1.0, and X differs from Y.

Abstract: In an engine for a vehicle including a bearing cap integral type oil pan which has a plurality of bearing cap sections integrally provided thereon and which is integrally coupled to a cylinder block, connecting bolts are screwed into the bearing cap sections from the cylinder block to integrally couple the cylinder block and the oil pan to each other. An oil pan chamber, which is an as-cast bore made by drawing a die in an axial direction of a crankshaft, is defined to extend continuously in the axial direction of the crankshaft between the bearing cap sections and a bottom wall of the oil pan. Thus, the oil pan can be produced simply, at a low cost, by a casting process and moreover, it is possible to reduce the weight and size of the oil pan and increase the rigidity of the oil pan.

Abstract: A manufacturing method of a shutter for a cartridge which is accommodating therein a recording medium includes the steps of punching out a plate-shaped metal material so as to provide a shutter of a developed shape having a pair of plate-shaped portions and a coupling portion for coupling the pair of plate-shaped portions, shaping the punched-out member in such a fashion that the pair of plate-shaped portions are opposed to each other across the coupling portion and that a spacing between free end sides of the pair of plate-shaped portions become narrower than a spacing of the pair of plate-shaped portions at its portion coupled by the coupling portion, and shaping the shaped member such that a spacing between free ends of the pair of plate-shaped portions of the member shaped by the second process become substantially equal to a spacing of the pair of plate-shaped portions at its portion coupled by the coupling member.

Abstract: A pseudomorphic HEMT of a structure which prevents the distribution of 2DEG in the channel layer from being concentrated near the hetero-interface relative to a doping layer and which, at the same time, enables the thickness of the channel layer to which distortion is imparted to be decreased. In an n-InAlAs/InGaAs pseudomorphic structure grown on an InP substrate 1, an InGaAs spacer layer 4 having an In composition ratio smaller than that of an InGaAs channel layer 3 is inserted in an InAlAs/InGaAs hetero-interface. The InGaAs channel layer 3 has an In composition ratio of 0.80 to exhibit a high mobility. Another InAlAs buffer layer 2, spacer layer 5 and doping layer 6 have an In composition ratio of 0.52 which is in lattice-match with the substrate, and InGaAs spacer layer 4 and cap layer 7 have an In composition ratio of 0.53 which is in lattice-match with the substrate. This constitution makes it possible to control the two-dimensional electron gas and to further increase the mobility.

Abstract: A compound semiconductor device including a semiconductor substrate having (100) plane as a crystal growth plane, a first semiconductor layer as an electron traveling layer and a second semiconductor layer for supplying electrons to the electron traveling layer. The first semiconductor layer is formed on the semiconductor substrate and has a different lattice constant from the semiconductor substrate so that a first strain is applied in the first semiconductor layer in a first strain direction. The second semiconductor layer is formed on the first semiconductor layer and has a different lattice constant from the first semiconductor layer to thereby apply a second strain to the second semiconductor layer. The second strain has a direction that is inverse to the first strain direction. In addition, the thickness of the semiconductor layer is defined so as to compensate for the first strain applied to the first semiconductor layer by the second strain applied to the second semiconductor.

Abstract: The present invention relates to a phase shifting mask for use in a photolithographic process of forming a wiring pattern. The phase shifting mask comprises a transparent base plate (11), shading layers (12) formed selectively on the transparent base plate (11), and two kinds of phase shifting layers (13a, 13b) formed on transparent portions of the transparent base plate between the adjacent shading layers, respectively. The phase difference of the two kinds of phase shifting layers (13a, 13b) relative to the transparent base plate (11) is 90.degree., and the phase difference between the phase shifting layers is 180.degree.. The transfer of an unnecessary pattern in the shifter edge portion can be obviated by using the shading layers having a phase difference of 90.degree. relative to the transparent base plate.

Abstract: A dispensing carton in which a film wound cylindrically is contained includes a bottom panel, a rear panel, a front panel, both side panels, a lid member which is hingedly joined to the rear panel, a front flange joined to an end of the lid member to overlap the front panel when said lid member is closed, and a cutter mounted along an end of the front flange. The front flange includes a convex edge including, for example, a V-shaped edge. A saw-tooth edge of the cutter mounted along the end of the front flange is arranged into a convex shape such as V-shape. A length from the tip of at least one tooth of the saw-tooth edge nearest to a base of the box to the bottom of a gullet adjacent to the tooth is longer than a length from the tip of other teeth to the bottom of gullets adjacent to the other teeth. When the film is pulled out of the carton and further pulled in the horizontal direction or twisted while being pulled, the tooth of the cutter nearest to the base of the box first cuts into the film.