Patents by Inventor Takashi Taya

Takashi Taya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9847771
    Abstract: A filter circuit for generating a filtered signal includes a first filter unit, a second filter unit, and a negative feedback resistor. The first filter unit includes a signal input unit that receives signals, a signal output unit that outputs the filtered signals, and a non-ideal integrator and a first ideal integrator that are connected in series between the signal input unit and the signal output unit. The second filter unit includes an ideal integrator that is negative feedback-connected to the non-ideal integrator or the first ideal integrator. The negative feedback resistor is connected between the signal output unit and the signal input unit of the first filter unit.
    Type: Grant
    Filed: August 3, 2016
    Date of Patent: December 19, 2017
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventor: Takashi Taya
  • Publication number: 20170201402
    Abstract: A wireless transmission device includes a reception circuit that receives a ASK or PSK designation signal designating amplitude-shift keying (ASK) or phase-shift keying (PSK), respectively, an amplitude control signal generation circuit that generates an amplitude control signal having an amplitude corresponding to a change in a signal level of the data signal, a polarity reversal circuit that generates a polarity reversal signal by reversing a polarity of a carrier wave signal according to the signal level of the data signal upon receiving a ASK designation signal, an amplifier circuit that generates a PSK signal by amplifying the polarity reversal signal at an amplification rate based on the amplitude control signal upon receiving a PSK designation signal, and generates an ASK signal by modulating an amplitude of the carrier wave signal at an amplification rate based on the amplitude control signal upon receiving the ASK designation signal.
    Type: Application
    Filed: January 6, 2017
    Publication date: July 13, 2017
    Applicant: LAPIS Semiconductor Co., Ltd.
    Inventor: Takashi TAYA
  • Publication number: 20170040972
    Abstract: A filter circuit for generating a filtered signal includes a first filter unit, a second filter unit, and a negative feedback resistor. The first filter unit includes a signal input unit that receives signals, a signal output unit that outputs the filtered signals, and a non-ideal integrator and a first ideal integrator that are connected in series between the signal input unit and the signal output unit. The second filter unit includes an ideal integrator that is negative feedback-connected to the non-ideal integrator or the first ideal integrator. The negative feedback resistor is connected between the signal output unit and the signal input unit of the first filter unit.
    Type: Application
    Filed: August 3, 2016
    Publication date: February 9, 2017
    Applicant: LAPIS Semiconductor Co., Ltd.
    Inventor: Takashi TAYA
  • Patent number: 9407146
    Abstract: A power source circuit includes a power source terminal for inputting a power source voltage; a switching regulator including a switching circuit connected to the power source terminal and a smoothing circuit connected to the switching circuit; a series regulator connected to the switching regulator in series; a switching portion; and a control portion. The smoothing circuit includes a capacitor and an inductor to output a first voltage. The series regulator is connected to the switching circuit and the smoothing circuit in series to output a second voltage. The switching portion supplies the power source voltage to the series regulator. The control portion outputs a switching signal for controlling the switching portion to turn on or off according to the power source voltage.
    Type: Grant
    Filed: August 24, 2015
    Date of Patent: August 2, 2016
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventor: Takashi Taya
  • Patent number: 9356637
    Abstract: Upon sending out a first power-supply voltage having a first value to first and second power supply lines in a first mode and sending out a second power-supply voltage having a second value lower than the first value to the second power supply line in a second mode, when switching a power-supply device from the first mode to the second mode, the value of the first power-supply voltage generated in a first power-supply circuit is changed to the second value first, the first and second power supply lines are temporarily connected together and then cut off from each other, and then the generating operation of the first power-supply voltage is stopped.
    Type: Grant
    Filed: December 23, 2014
    Date of Patent: May 31, 2016
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventor: Takashi Taya
  • Publication number: 20160065050
    Abstract: A power source circuit includes a power source terminal for inputting a power source voltage; a switching regulator including a switching circuit connected to the power source terminal and a smoothing circuit connected to the switching circuit; a series regulator connected to the switching regulator in series; a switching portion; and a control portion. The smoothing circuit includes a capacitor and an inductor to output a first voltage. The series regulator is connected to the switching circuit and the smoothing circuit in series to output a second voltage. The switching portion supplies the power source voltage to the series regulator. The control portion outputs a switching signal for controlling the switching portion to turn on or off according to the power source voltage.
    Type: Application
    Filed: August 24, 2015
    Publication date: March 3, 2016
    Inventor: Takashi TAYA
  • Patent number: 9148185
    Abstract: A receiving apparatus that includes a first and second filter circuit. The first filter performs filtering on a frequency signal with a band-pass characteristic such that a frequency band of a desired channel is included in a passband, thereby obtaining a pass frequency signal. The second filter performs filtering on the pass frequency signal with a filter characteristic such that a frequency band of a channel adjoining the desired channel is included in an attenuation band.
    Type: Grant
    Filed: April 30, 2014
    Date of Patent: September 29, 2015
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventors: Takashi Taya, Satoshi Tachi
  • Publication number: 20150188429
    Abstract: Upon sending out a first power-supply voltage having a first value to first and second power supply lines in a first mode and sending out a second power-supply voltage having a second value lower than the first value to the second power supply line in a second mode, when switching a power-supply device from the first mode to the second mode, the value of the first power-supply voltage generated in a first power-supply circuit is changed to the second value first, the first and second power supply lines are temporarily connected together and then cut off from each other, and then the generating operation of the first power-supply voltage is stopped.
    Type: Application
    Filed: December 23, 2014
    Publication date: July 2, 2015
    Applicant: LAPIS SEMICONDUCTOR CO., LTD.
    Inventor: Takashi TAYA
  • Publication number: 20140328440
    Abstract: A receiving apparatus that includes a first and second filter circuit. The first filter performs filtering on a frequency signal with a band-pass characteristic such that a frequency band of a desired channel is included in a passband, thereby obtaining a pass frequency signal. The second filter performs filtering on the pass frequency signal with a filter characteristic such that a frequency band of a channel adjoining the desired channel is included in an attenuation band.
    Type: Application
    Filed: April 30, 2014
    Publication date: November 6, 2014
    Applicant: LAPIS SEMICONDUCTOR CO., LTD.
    Inventors: Takashi TAYA, Satoshi TACHI
  • Patent number: 8872620
    Abstract: A wireless key system and location detection method determine whether a wireless key is located inside or outside a main body. A communication device in the main body transmits a wireless signal using an inner antenna and an outer antenna outside the main body having a different directivity. A wireless key measures direction of movement of the wireless key when the wireless signal is received by one of antennas having different directivities, detects one of the antennas receiving the highest signal level of the wireless signal as a first antenna, selects one of the antennas having the same directivity as the inner antenna as a second antenna according to the measured direction of movement and detected directivity of the antenna, and decides that the wireless key is inside the main body based on the signal levels of the wireless signals received by the first and second antennas.
    Type: Grant
    Filed: September 12, 2011
    Date of Patent: October 28, 2014
    Assignee: Lapis Semiconductor Co., Ltd.
    Inventors: Nobumasa Higemoto, Takashi Taya
  • Patent number: 8667353
    Abstract: A semiconductor chip having a functional block that performs a communication function includes an input circuit that supplies an oscillating test signal to the functional block, and a test circuit that detects the strength of an oscillating signal which the functional block outputs in response. A strength signal indicating the detected strength is output from the test circuit through an external terminal of the semiconductor chip to a test device. The test device evaluates the strength signal to decide whether an operating characteristic of the functional block is within a specified range. The strength information indicated by the strength signal is not affected by impedance on the signal transmission line between the semiconductor chip and the test device, so the test is not affected by impedance loss.
    Type: Grant
    Filed: May 17, 2012
    Date of Patent: March 4, 2014
    Assignee: Lapis Semiconductor Co., Ltd.
    Inventor: Takashi Taya
  • Patent number: 8508305
    Abstract: An oscillation circuit includes a resonance circuit and an amplifier circuit. The resonance circuit includes an inner capacitor to be disposed inside a semiconductor integrated circuit, and an outer capacitor and an outer inductor to be disposed outside the semiconductor integrated circuit. The amplifier circuit includes an input terminal and an output terminal both connected to the resonance circuit. Further, the resonance circuit includes a first closed circuit portion including the inner capacitor, the outer inductor, and a first wiring portion for connecting the inner capacitor and the outer inductor. The resonance circuit further includes a second closed circuit portion including the outer capacitor, the outer inductor, and a second wiring portion for connecting the outer capacitor and the outer inductor. The second closed circuit portion has a wiring resistance smaller than that of the first closed circuit portion.
    Type: Grant
    Filed: October 18, 2011
    Date of Patent: August 13, 2013
    Assignee: Lapis Semiconductor Co., Ltd.
    Inventor: Takashi Taya
  • Patent number: 8405783
    Abstract: An electronic device includes a wireless receiving circuit for receiving signals transmitted from a remote control unit, a core circuit having a digital signal processing circuit for processing input signals and configured to perform at least one of display processing and record processing based on signals processed in the digital signal processing circuit in accordance with a control signal transmitted from the remote control unit and received by the wireless receiving circuit, and a preliminary activation circuit for starting electric power supply to the digital signal processing circuit to thereby activate the digital signal processing circuit when a pre-operation state where the remote control unit is expected to be operated during stoppage of electric power supply to the core circuit has occurred.
    Type: Grant
    Filed: November 17, 2008
    Date of Patent: March 26, 2013
    Assignee: Oki Semiconductor Co., Ltd.
    Inventor: Takashi Taya
  • Publication number: 20120297263
    Abstract: A semiconductor chip having a functional block that performs a communication function includes an input circuit that supplies an oscillating test signal to the functional block, and a test circuit that detects the strength of an oscillating signal which the functional block outputs in response. A strength signal indicating the detected strength is output from the test circuit through an external terminal of the semiconductor chip to a test device. The test device evaluates the strength signal to decide whether an operating characteristic of the functional block is within a specified range. The strength information indicated by the strength signal is not affected by impedance on the signal transmission line between the semiconductor chip and the test device, so the test is not affected by impedance loss.
    Type: Application
    Filed: May 17, 2012
    Publication date: November 22, 2012
    Applicant: LAPIS Semiconductor Co., Ltd.
    Inventor: Takashi TAYA
  • Publication number: 20120286926
    Abstract: A wireless key system and location detection method determine whether a wireless key is located inside or outside a main body. A communication device in the main body transmits a wireless signal using an inner antenna and an outer antenna outside the main body having a different directivity. A wireless key measures direction of movement of the wireless key when the wireless signal is received by one of antennas having different directivities, detects one of the antennas receiving the highest signal level of the wireless signal as a first antenna, selects one of the antennas having the same directivity as the inner antenna as a second antenna according to the measured direction of movement and detected directivity of the antenna, and decides that the wireless key is inside the main body based on the signal levels of the wireless signals received by the first and second antennas.
    Type: Application
    Filed: September 12, 2011
    Publication date: November 15, 2012
    Applicant: OKI SEMICONDUCTOR CO., LTD.
    Inventors: Nobumasa Higemoto, Takashi Taya
  • Patent number: 8204162
    Abstract: The present invention aims to provide a reception frequency control circuit that is small in mounting area and unaffected by disturbance where an FSK-modulated signal is demodulated. In the reception frequency control circuit, a reception signal processing unit converts an FSK-modulated digital signal to an intermediate frequency when the FSK-modulated digital signal is received. Thereafter, a frequency voltage converting unit converts the intermediate signal to a voltage signal and outputs an output signal. At the same time, an analog frequency controlling unit detects a frequency deviation from the output signal by analog processing. A digital frequency controlling unit generates a reception frequency control signal for correcting the frequency and feeds back the same to the reception signal processing unit. Stable frequency control can be realized by performing reception frequency control by a combination of an analog circuit-digital circuit in this way.
    Type: Grant
    Filed: September 12, 2008
    Date of Patent: June 19, 2012
    Assignee: Lapis Semiconductor Co., Ltd.
    Inventors: Kazuhiko Seki, Takashi Taya
  • Publication number: 20120142283
    Abstract: A wireless communication apparatus using a frequency signal produced by a frequency synthesizer operates at a reduced power consumption and includes a reception portion comprising a first mixer mixing a signal based on the received wireless signal and the frequency signal, a second mixer mixing the first mixer output signal and a local signal, and a demodulation stage demodulating the second mixer output signal. The frequency synthesizer comprises a Voltage Controlled Oscillator (VCO) generating a frequency signal responsive to a variation of a control input voltage, and a feed back circuit receiving as a control input voltage a voltage corresponding to a phase difference between a signal obtained by frequency dividing the output frequency signal of the VCO and a reference clock signal. The VCO is operable at a high frequency that increases with an increase of a bias current.
    Type: Application
    Filed: November 29, 2011
    Publication date: June 7, 2012
    Applicant: LAPIS SEMICONDUCTOR CO., LTD.
    Inventor: Takashi TAYA
  • Publication number: 20120098608
    Abstract: An oscillation circuit includes a resonance circuit and an amplifier circuit. The resonance circuit includes an inner capacitor to be disposed inside a semiconductor integrated circuit, and an outer capacitor and an outer inductor to be disposed outside the semiconductor integrated circuit. The amplifier circuit includes an input terminal and an output terminal both connected to the resonance circuit. Further, the resonance circuit includes a first closed circuit portion including the inner capacitor, the outer inductor, and a first wiring portion for connecting the inner capacitor and the outer inductor. The resonance circuit further includes a second closed circuit portion including the outer capacitor, the outer inductor, and a second wiring portion for connecting the outer capacitor and the outer inductor. The second closed circuit portion has a wiring resistance smaller than that of the first closed circuit portion.
    Type: Application
    Filed: October 18, 2011
    Publication date: April 26, 2012
    Inventor: Takashi TAYA
  • Patent number: 7853226
    Abstract: A peak-hold circuit includes a differential amplifier having first and second transistors as a differential pair, the first transistor receiving an input signal at its gate, a third transistor connected between a first power supply and an output node connecting a gate of the second transistor, connectivity of the third transistor being controlled by the output of the differential amplifier, a capacitor for holding a peak voltage, connected between the output node and a second power supply, a resistor for discharging, which is connected in parallel to the capacitor, and a fourth transistor connected to the first transistor in parallel, the fourth transistor receiving at its gate an a reference voltage for limiting a voltage.
    Type: Grant
    Filed: November 7, 2007
    Date of Patent: December 14, 2010
    Assignee: Oki Semiconductor Co., Ltd.
    Inventors: Manabu Hirata, Takashi Taya, Kazuyuki Tajima
  • Patent number: 7769114
    Abstract: In a receiver set, a shared receiver receives a signal formed according to one of various modulation or communication systems to output a received signal. A signal intensity detector detects the electric power value, or absolute value of the amplitude, of the received signal to output a detected signal. A determiner compares the magnitude of the detected signal with threshold voltages, and generates control signals to output them to switches. The switches are operated in response to the respective control signals fed to the switches so that the received signal is selectively fed to demodulators. The demodulators demodulate the received signal according to a receiving system corresponding to the modulation or transmission systems to output demodulated signals.
    Type: Grant
    Filed: July 9, 2007
    Date of Patent: August 3, 2010
    Assignee: Oki Semiconductor Co., Ltd.
    Inventor: Takashi Taya