Patents by Inventor Takashi Yamauchi

Takashi Yamauchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210166273
    Abstract: An autonomous driving vehicle that is a mobile unit according to this disclosure is a mobile unit configured to transport a user to a facility that provides services or commercial products and, at the same time, configured to perform an advertising activity for the services or the commercial products of the facility. The mobile unit includes a control unit configured to acquire data for providing a promotion in the mobile unit and is configured to provide a promotion in the mobile unit based on the acquired data. The promotion is related to the services and the commercial products at the facility.
    Type: Application
    Filed: November 24, 2020
    Publication date: June 3, 2021
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Kentaro TAKAHASHI, Hirotaka SUNADA, Hideo HASEGAWA, Naomi KONDO, Takashi SHIOMI, Kazuya MIKASHIMA, Jun USAMI, Yasuhiko FUKUZUMI, Sayaka ISHIKAWA, Katsuhito YAMAUCHI, Tasuku KUNO
  • Publication number: 20210116856
    Abstract: A process cartridge is provided, which is configured to recover, with a developing member, developer remaining on an image bearing member after transfer of a developer image to a transfer receiving member, wherein a charging member has a shaft that is conductive and an elastic layer supported on the shaft and being in contact with the image bearing member; the elastic layer has a matrix containing a first rubber, and a plurality of domains containing a second rubber and an electron-conductive agent and interspersed within the matrix. The electric resistance of the domains is lower than the electric resistance of the matrix. The matrix is exposed on an outer surface of the elastic layer and forms multiple depressed portions, and the domains include a domains exposed at a bottom section of the depressed portion.
    Type: Application
    Filed: October 13, 2020
    Publication date: April 22, 2021
    Inventors: Takashi Mukai, Takashi Hiramatsu, Shuhei Tokiwa, Takayuki Namiki, Takumi Furukawa, Yuichi Kikuchi, Kazuhiro Yamauchi
  • Patent number: 10986729
    Abstract: A wiring substrate includes a core layer, first conductor layers including first inner, outer and intermediate conductor layers, second conductor layers including second inner, outer and intermediate conductor layers, and interlayer insulating layers interposed between the first conductor layers and between the second conductor layers. The first and/or second inner conductor layers has a first laminated structure including metal foil and plating film layers and includes first conductor pattern having a side surface curved toward inner side of the first pattern, the first and/or second outer conductor layers has the first laminated structure and includes the first conductor pattern having the side surface curved toward the inner side of the first pattern, and the first and/or second intermediate conductor layers has a second laminated structure including metal foil and plating film layers and includes second conductor pattern having a side surface curved toward outer side of the second pattern.
    Type: Grant
    Filed: March 25, 2020
    Date of Patent: April 20, 2021
    Assignee: IBIDEN CO., LTD.
    Inventors: Takenobu Nakamura, Takahiro Yamazaki, Takashi Yamauchi, Toshihide Makino
  • Patent number: 10945334
    Abstract: A wiring substrate includes a core layer, first conductor layers including first inner, outer and intermediate conductor layers, second conductor layers including second inner, outer and intermediate conductor layers, and interlayer insulating layers interposed between the first conductor layers and between the second conductor layers. The first and/or second inner conductor layers has a first laminated structure including a metal foil layer and a plating film layer, the first and/or second outer conductor layers has the first laminated structure, the first and/or second intermediate conductor layers has a second laminated structure including a metal foil layer and a plating film layer, and the first and second laminated structures are formed such that a surface of the second laminated structure on a side away from the core layer has unevenness smaller than unevenness of a surface of the first laminated structure on a side away from the core layer.
    Type: Grant
    Filed: March 24, 2020
    Date of Patent: March 9, 2021
    Assignee: IBIDEN CO., LTD.
    Inventors: Takenobu Nakamura, Takahiro Yamazaki, Takashi Yamauchi, Toshihide Makino
  • Publication number: 20200395171
    Abstract: An ignition coil includes a primary coil and a secondary coil magnetically coupled from each other; a core cover disposed around the primary coil and the secondary coil; and an outer peripheral core supported by the core cover. The core cover includes a pair of support portions that support the outer peripheral core; and at least one of the pair of support portions includes a flexible portion that elastically presses the outer peripheral core, the flexible portion having flexibility in an arrangement direction separating the pair of support portions.
    Type: Application
    Filed: June 9, 2020
    Publication date: December 17, 2020
    Inventor: Takashi YAMAUCHI
  • Publication number: 20200315012
    Abstract: A wiring substrate includes a core layer, first conductor layers including first inner, outer and intermediate conductor layers, second conductor layers including second inner, outer and intermediate conductor layers, and interlayer insulating layers interposed between the first conductor layers and between the second conductor layers. The first and/or second inner conductor layers has a first laminated structure including a metal foil layer and a plating film layer, the first and/or second outer conductor layers has the first laminated structure, the first and/or second intermediate conductor layers has a second laminated structure including a metal foil layer and a plating film layer, and the first and second laminated structures are formed such that a surface of the second laminated structure on a side away from the core layer has unevenness smaller than unevenness of a surface of the first laminated structure on a side away from the core layer.
    Type: Application
    Filed: March 24, 2020
    Publication date: October 1, 2020
    Applicant: IBIDEN CO., LTD.
    Inventors: Takenobu NAKAMURA, Takahiro YAMAZAKI, Takashi YAMAUCHI, Toshihide MAKINO
  • Publication number: 20200315009
    Abstract: A wiring substrate includes a core layer, first conductor layers including first inner, outer and intermediate layers, second conductor layers including second inner, outer and intermediate layers, interlayer insulating layers interposed between the first conductor layers and between the second conductor layers, and via conductors formed in the insulating layers such that each via conductor connects two conductor layers and is integrally formed with one of the conductor layers on side away from the core layer. The first and/or second inner conductor layers has a first conductor layer structure including metal foil and plating film layers, the first and/or second outer conductor layers has the first structure, the first and/or second intermediate conductor layers has a second conductor layer structure including metal foil and plating film layers, and the via conductors include a group integrally formed with the first structure and including constricted via conductors each having a constricted portion.
    Type: Application
    Filed: March 26, 2020
    Publication date: October 1, 2020
    Applicant: IBIDEN CO., LTD.
    Inventors: Takenobu NAKAMURA, Takahiro YAMAZAKI, Takashi YAMAUCHI, Toshihide MAKINO
  • Publication number: 20200315013
    Abstract: A wiring substrate includes a core layer, first conductor layers including first inner, outer and intermediate conductor layers, second conductor layers including second inner, outer and intermediate conductor layers, and interlayer insulating layers interposed between the first conductor layers and between the second conductor layers. The first and/or second inner conductor layers has a first laminated structure including metal foil and plating film layers and includes first conductor pattern having a side surface curved toward inner side of the first pattern, the first and/or second outer conductor layers has the first laminated structure and includes the first conductor pattern having the side surface curved toward the inner side of the first pattern, and the first and/or second intermediate conductor layers has a second laminated structure including metal foil and plating film layers and includes second conductor pattern having a side surface curved toward outer side of the second pattern.
    Type: Application
    Filed: March 25, 2020
    Publication date: October 1, 2020
    Applicant: IBIDEN CO., LTD.
    Inventors: Takenobu NAKAMURA, Takahiro YAMAZAKI, Takashi YAMAUCHI, Toshihide MAKINO
  • Publication number: 20200315002
    Abstract: A wiring substrate includes a core layer, first conductor layers including first inner, outer and intermediate conductor layers, second conductor layers including second inner, outer and intermediate conductor layers, interlayer insulating layers interposed between the first conductor layers and between the second conductor layers, and via conductors formed in the core layer such that each via conductor decreases in diameter from one of the inner conductor layers toward the other one of the inner conductor layers and that the other one of the inner conductor layers has thickness greater than thickness of the one of the inner conductor layers. The first and/or second inner conductor layers includes a first laminated structure including metal foil and plating film layers, the first and/or second outer conductor layers includes the first laminated structure, and the first and/or second intermediate conductor layers includes a second laminated structure including metal foil and plating film layers.
    Type: Application
    Filed: March 27, 2020
    Publication date: October 1, 2020
    Applicant: IBIDEN CO., LTD.
    Inventors: Takenobu Nakamura, Takahiro Yamazaki, Takashi Yamauchi, Toshihide Makino
  • Publication number: 20200315011
    Abstract: A wiring substrate includes a core layer, first conductor layers including a first inner conductor layer, a first outer conductor layer and a first intermediate conductor layer, second conductor layers including a second inner conductor layer, a second outer conductor layer and a second intermediate conductor layer, and interlayer insulating layers interposed between the first conductor layers and between the second conductor layers. The first and/or second inner conductor layers has a first laminated structure including a metal foil layer and a plating film layer, the first and/or second outer conductor layers has the first laminated structure, and the first and/or second intermediate conductor layers has a second laminated structure including a metal foil layer and a plating film layer and includes a conductor pattern formed such that an upper surface of the conductor pattern has an edge portion forming an inclined portion inclined toward the core layer.
    Type: Application
    Filed: March 24, 2020
    Publication date: October 1, 2020
    Applicant: IBIDEN CO., LTD
    Inventors: Takenobu NAKAMURA, Takahiro YAMAZAKI, Takashi YAMAUCHI, Toshihide MAKINO
  • Publication number: 20200279736
    Abstract: A technique for suppressing a metal component from remaining at a bottom of a mask pattern when the mask pattern is formed using a metal-containing resist film. A developable anti reflection film 103 is previously formed below a resist film 104. Further, after exposing and developing the wafer W, TMAH is supplied to the wafer W to remove a surface of the anti-reflection film 103 facing a bottom of the recess pattern 110 of the resist film 104. Therefore, the metal component 105 can be suppressed from remaining at the bottom of the recess pattern 110. Therefore, when the SiO2 film 102 is subsequently etched using the pattern of the resist film 104, the etching is not hindered, so that defects such as bridges can be suppressed.
    Type: Application
    Filed: October 22, 2018
    Publication date: September 3, 2020
    Inventors: Takashi YAMAUCHI, Shinichiro KAWAKAMI, Masashi ENOMOTO
  • Patent number: 10748506
    Abstract: An input display device includes: a processor to execute a program; and a memory to store the program which, when executed by the processor, results in performance of steps including: acquiring a character string; receiving a touch drawing operation; detecting a state of the touch drawing operation; generating a track image showing the track, the track image having a line width corresponding to the state of the touch drawing operation; displaying the generated track image on a display; and superimposing the acquired character string on the displayed track image in accordance with a character size corresponding to the line width of the track image.
    Type: Grant
    Filed: October 30, 2019
    Date of Patent: August 18, 2020
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Masato Hirai, Akiko Imaishi, Yoshimichi Umeki, Tsutomu Matsubara, Naoki Tsuru, Takahiro Yamaguchi, Takanori Hikima, Takashi Yamauchi
  • Publication number: 20200233308
    Abstract: A substrate processing apparatus includes a film forming processing unit configured to form a metal-containing resist film on a substrate; a heat treatment unit configured to perform a heating processing on the substrate on which the film is formed and in which an exposure processing is performed on the film; a developing processing unit configured to perform a developing processing on the film formed on the substrate on which the heating processing is performed; and an adjustment controller configured to reduce a difference between substrates in an amount of water that reacts in the film formed on the substrate during the heating processing.
    Type: Application
    Filed: January 21, 2020
    Publication date: July 23, 2020
    Inventors: Shinichiro Kawakami, Hiroshi Mizunoura, Yohei Sano, Takashi Yamauchi, Masashi Enomoto
  • Publication number: 20200066232
    Abstract: An input display device includes: a processor to execute a program; and a memory to store the program which, when executed by the processor, results in performance of steps including: acquiring a character string; receiving a touch drawing operation; detecting a state of the touch drawing operation; generating a track image showing the track, the track image having a line width corresponding to the state of the touch drawing operation; displaying the generated track image on a display; and superimposing the acquired character string on the displayed track image in accordance with a character size corresponding to the line width of the track image.
    Type: Application
    Filed: October 30, 2019
    Publication date: February 27, 2020
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Masato HIRAI, Akiko IMAISHI, Yoshimichi UMEKI, Tsutomu MATSUBARA, Naoki TSURU, Takahiro YAMAGUCHI, Takanori HIKIMA, Takashi YAMAUCHI
  • Patent number: 10510322
    Abstract: An input display device includes: a processor to execute a program; and a memory to store the program which, when executed by the processor, results in performance of steps including: receiving an input of a track by a receiving unit; generating a track image showing the track; acquiring a character string; and displaying the character string acquired in the acquiring to be superimposed on the track image. When the character string is acquired in the acquiring before the track image is generated, the displaying the character string is stood by.
    Type: Grant
    Filed: May 28, 2015
    Date of Patent: December 17, 2019
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Masato Hirai, Akiko Imaishi, Yoshimichi Umeki, Tsutomu Matsubara, Naoki Tsuru, Takahiro Yamaguchi, Takanori Hikima, Takashi Yamauchi
  • Patent number: 10034347
    Abstract: There is provided an output circuit for supplying an output current to a load coupled to an output terminal in response to an input signal. The output circuit includes an output transistor for supplying the output current to the output terminal, an output-drive circuit for driving the output transistor, a constant-current limiting circuit for generating a current control signal for limiting the output current to a predetermined current value, and a control circuit for implementing a control such that the output current is controlled on the basis of the current control signal if a voltage at the output terminal is at a predetermined voltage, or less after the input signal is supplied while the output transistor is driven by the output-drive circuit if the voltage at the output terminal is in excess of the predetermined voltage.
    Type: Grant
    Filed: August 22, 2017
    Date of Patent: July 24, 2018
    Assignee: Renesas Electronics Corporation
    Inventor: Takashi Yamauchi
  • Patent number: 9882127
    Abstract: According to one embodiment, a nonvolatile resistance change element includes a first electrode, a second electrode, a semiconductor layer and a first layer. The first electrode includes at least one of Ag, Ni, Co, Al, Zn, Ti, and Cu. The semiconductor layer is sandwiched between the first and second electrodes. The first layer is provided between the second electrode and the semiconductor layer and contains an element included in the semiconductor layer and at least one of Ag, Ni, and Co.
    Type: Grant
    Filed: July 31, 2013
    Date of Patent: January 30, 2018
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Shosuke Fujii, Hidenori Miyagawa, Takashi Yamauchi
  • Patent number: 9867264
    Abstract: A wireless communication device includes: a wired communication circuit which receives, through a wired connection, an operation signal for controlling each of luminaires from a management device which controls an operation of each of the luminaires; a radio communication circuit which converts the operation signal received by the wired communication circuit and transmits the converted operation signal to each of the luminaires over a radio wave; an infrared ray receiver which receives an infrared ray signal transmitted from outside; and a controller. When the wired communication circuit receives a signal having a predetermined pattern from the management device, the controller transitions to a state for receiving the infrared ray signal, and, based on the infrared ray signal transmitted from outside, transmits a signal relating to communication setting between the radio communication circuit and each of the luminaires to each of the plurality of luminaires via the radio communication circuit.
    Type: Grant
    Filed: May 23, 2017
    Date of Patent: January 9, 2018
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Takashi Yamauchi, Tomomi Hashimoto, Atsuo Nanahara, Yasuyuki Shimizu
  • Publication number: 20180005604
    Abstract: An input display device includes: a processor to execute a program; and a memory to store the program which, when executed by the processor, results in performance of steps including: receiving an input of a track by a receiving unit; generating a track image showing the track; acquiring a character string; and displaying the character string acquired in the acquiring to be superimposed on the track image. When the character string is acquired in the acquiring before the track image is generated, the displaying the character string is stood by.
    Type: Application
    Filed: May 28, 2015
    Publication date: January 4, 2018
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Masato HIRAI, Akiko IMAISHI, Yoshimichi UMEKI, Tsutomu MATSUBARA, Naoki TSURU, Takahiro YAMAGUCHI, Takanori HIKIMA, Takashi YAMAUCHI
  • Publication number: 20170354015
    Abstract: There is provided an output circuit for supplying an output current to a load coupled to an output terminal in response to an input signal. The output circuit includes an output transistor for supplying the output current to the output terminal, an output-drive circuit for driving the output transistor, a constant-current limiting circuit for generating a current control signal for limiting the output current to a predetermined current value, and a control circuit for implementing a control such that the output current is controlled on the basis of the current control signal if a voltage at the output terminal is at a predetermined voltage, or less after the input signal is supplied while the output transistor is driven by the output-drive circuit if the voltage at the output terminal is in excess of the predetermined voltage.
    Type: Application
    Filed: August 22, 2017
    Publication date: December 7, 2017
    Applicant: Renesas Electronics Corporation
    Inventor: Takashi YAMAUCHI