Patents by Inventor Takayoshi Matsumura

Takayoshi Matsumura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150060554
    Abstract: An RFID tag including an inlay having a sheet-like shape and including an antenna and an IC chip electrically connected to the antenna, an outer covering member that covers the inlay, the outer covering member having a planar shape and including a main surface and a rear surface, and a frame part arranged on at least one of the main surface and the rear surface. The frame part is erected in a thickness direction of the outer covering member. The frame part surrounds the IC chip in a plan view.
    Type: Application
    Filed: August 15, 2014
    Publication date: March 5, 2015
    Inventors: Takayoshi Matsumura, Kenzo NISHIDE, Shigeru Gotou, NORITSUGU OZAKI, Shunji Baba
  • Patent number: 8698633
    Abstract: In a manufacturing method of a thin and small RFID tag, an antenna metal pattern is formed on a substrate, going once around a dielectric plate, and a recess is formed on the substrate to house an IC chip. A strap on which the IC chip is mounted is connected and fastened to the substrate in the position and orientation in which the IC chip is housed in the recess.
    Type: Grant
    Filed: March 21, 2011
    Date of Patent: April 15, 2014
    Assignee: Fujitsu Limited
    Inventors: Hiroshi Kobayashi, Naoki Ishikawa, Takayoshi Matsumura, Shunji Baba
  • Publication number: 20140034738
    Abstract: There is provided an RFID tag which includes a first sheet portion including a first projection-depression portion formed in a longitudinal direction or a first groove portion formed in a direction forming an angle with the longitudinal direction, an antenna formed on a surface of the first sheet portion, the antenna being flexible and elastic, an integrated circuit chip electrically connected to the antenna, a second sheet portion including a second projection-depression portion formed in the longitudinal direction or a second groove portion formed in a direction forming an angle with the longitudinal direction, the antenna and the integrated circuit chip being covered between the first sheet portion and the second sheet portion, and a package member covering the first sheet portion and the second sheet portion, the package member being flexible and elastic.
    Type: Application
    Filed: July 31, 2013
    Publication date: February 6, 2014
    Applicant: FUJITSU LIMITED
    Inventors: Takayoshi MATSUMURA, Noritsugu OSAKI
  • Publication number: 20140021262
    Abstract: An RFID tag includes: a base sheet in which a plurality of first slits are formed to extend alternately from two opposite sides from an end of the base sheet; an antenna pattern provided on the base sheet by folding the antennal pattern to avoid the first slits; an RFID chip provided over the base sheet and electrically connected to the antenna pattern; an elastic sheet provided over any one of a top surface and a bottom surface of the base sheet; and a protective sheet provided on a surface of the elastic sheet opposite to the surface that is in contact with the base sheet and including second slits formed to correspond in position to the first slits of the base sheet.
    Type: Application
    Filed: June 20, 2013
    Publication date: January 23, 2014
    Inventors: Takayoshi MATSUMURA, Noritsugu OSAKI
  • Publication number: 20130249087
    Abstract: An electronic component includes a package substrate, a plurality of conductive pads, an insulating material and a semiconductor device. The plurality of conductive pads is disposed on the package substrate. The insulating material is disposed between the plurality of conductive pads. The insulating material includes a top surface located on an identical plane to an upper surface of the plurality of conductive pads. The semiconductor device includes a conductive bump aligned on a corresponding conductive pad of the plurality of conductive pads.
    Type: Application
    Filed: April 22, 2013
    Publication date: September 26, 2013
    Applicant: FUJITSU LIMITED
    Inventors: Kimio Nakamura, Takayoshi Matsumura, Yoshiyuki Satoh, Kuniko Ishikawa, Kenji Kobae
  • Patent number: 8395904
    Abstract: A multichip module includes a package substrate, a first semiconductor device, a second semiconductor device and a conductive bump. The first semiconductor device is flip-chip bonded to the package substrate. The first semiconductor device includes a first chip pad on a surface thereof. The second semiconductor device is mounted on the first semiconductor device. The second semiconductor device includes a second chip pad facing the first chip pad. The conductive bump connects the first chip pad to the second chip pad. The conductive bump includes a first metallic body that has a first diffusion rate and a second metallic body that has a second diffusion rate lower than the first diffusion rate.
    Type: Grant
    Filed: June 23, 2010
    Date of Patent: March 12, 2013
    Assignee: Fujitsu Limited
    Inventors: Takayoshi Matsumura, Kenji Kobae, Shuichi Takeuchi, Tetsuya Takahashi
  • Patent number: 8308071
    Abstract: An RFID tag includes an inlet on which an antenna pattern serving as an antenna for communication and an IC chip electrically connected to the antenna pattern are mounted. The RFID tag also includes an exterior body that encloses the inlet from outside and a hollow space that is formed by the inlet and the exterior body and that is filled with gas or a gel material.
    Type: Grant
    Filed: April 8, 2010
    Date of Patent: November 13, 2012
    Assignee: Fujitsu Limited
    Inventors: Shuichi Takeuchi, Kenji Kobae, Takayoshi Matsumura, Tetsuya Takahashi
  • Publication number: 20120138662
    Abstract: According to an aspect of an embodiment, a wire bonding method includes vibrating a capillary of a bonding head, the capillary having a heater attached thereto at a position corresponding to a node of vibration of the capillary generated by the vibration heating the capillary with the heater and performing a wire bonding operation while heating the capillary with the heater.
    Type: Application
    Filed: February 9, 2012
    Publication date: June 7, 2012
    Applicant: FUJITSU LIMITED
    Inventor: Takayoshi MATSUMURA
  • Patent number: 8169075
    Abstract: According to an aspect of the invention, an electronic part includes a substrate having a first planar surface, a first bump affixed to the first planar surface of the substrate, a second bump affixed to the first planar surface of the substrate a predetermined distance from the first bump, a MEMS chip including a element, the MEMS chip coupled to the first bump and the second bump, the MEMS chip distanced from the first planar surface, an adhesive region bonding with the first bump, the substrate and the MEMS chip.
    Type: Grant
    Filed: March 12, 2009
    Date of Patent: May 1, 2012
    Assignee: Fujitsu Limited
    Inventors: Tetsuya Takahashi, Kenji Kobae, Shuichi Takeuchi, Yoshiyuki Satoh, Hidehiko Kira, Takayoshi Matsumura
  • Publication number: 20120037687
    Abstract: A capillary is attached to an ultrasonic transducer of a wire-bonding apparatus. The capillary includes a first part configured to be attached to the ultrasonic transducer, and a second part other than the first part and extending from the first part. The first part has a shape different from a shape of the second part so that the first part has a flexure rigidity larger than the second part.
    Type: Application
    Filed: July 28, 2011
    Publication date: February 16, 2012
    Applicant: FUJITSU LIMITED
    Inventor: Takayoshi Matsumura
  • Publication number: 20110168789
    Abstract: In a manufacturing method of a thin and small RFID tag, an antenna metal pattern is formed on a substrate, going once around a dielectric plate, and a recess is formed on the substrate to house an IC chip. A strap on which the IC chip is mounted is connected and fastened to the substrate in the position and orientation in which the IC chip is housed in the recess.
    Type: Application
    Filed: March 21, 2011
    Publication date: July 14, 2011
    Applicant: FUJITSU LIMITED
    Inventors: Hiroshi Kobayashi, Naoki Ishikawa, Takayoshi Matsumura, Shunji Baba
  • Patent number: 7954228
    Abstract: In a manufacturing method of a thin and small RFID tag, an antenna metal pattern is formed on a substrate, going once around a dielectric plate, and a recess is formed on the substrate to house an IC chip. A strap on which the IC chip is mounted is connected and fastened to the substrate in the position and orientation in which the IC chip is housed in the recess.
    Type: Grant
    Filed: February 5, 2007
    Date of Patent: June 7, 2011
    Assignee: Fujitsu Limited
    Inventors: Hiroshi Kobayashi, Naoki Ishikawa, Takayoshi Matsumura, Shunji Baba
  • Patent number: 7936273
    Abstract: A method includes a step of preparing a strap having a connecting metal pattern formed on a base, and mounted with the circuit chip, the pattern connecting a circuit chip to a metal antenna pattern. A substrate has a concave section which houses the circuit chip and is formed on a first face. The metal antenna pattern extends over a first face and a second face of the base so as to circle them except for the concave section and to have the both ends positioned across the concave section. The method includes a connection step of positioning and directing the strap and the substrate to house the circuit chip in the concave section and covering the strap and the substrate with a covering material so as to fix the strap and the substrate in a state where the connection metal pattern is connected to the metal antenna pattern.
    Type: Grant
    Filed: November 30, 2006
    Date of Patent: May 3, 2011
    Assignee: Fujitsu Limited
    Inventors: Hiroshi Kobayashi, Naoki Ishikawa, Takayoshi Matsumura
  • Publication number: 20110079896
    Abstract: A semiconductor device fabrication method, comprising the steps of: forming a solder portion on an electrode of a substrate on which a semiconductor chip is to be mounted; applying a resin layer onto the substrate to a thickness such that a top region of the solder portion is exposed; curing the resin layer; providing a thermosetting underfill material over a region where the semiconductor chip is to be mounted; placing an electrode of the semiconductor chip face down on the solder portion in such a manner that the electrode faces the solder portion; and heating the underfill material and the solder portion.
    Type: Application
    Filed: September 28, 2010
    Publication date: April 7, 2011
    Applicant: FUJITSU LIMITED
    Inventors: Yoshiyuki SATOH, Kenji KOBAE, Kimio NAKAMURA, Takayoshi MATSUMURA, Kuniko ISHIKAWA
  • Publication number: 20110074020
    Abstract: A method for mounting a semiconductor device by mounting a semiconductor chip on a board by flip chip bonding, comprising: contacting an Au bump of the semiconductor chip with a Sn—Bi solder; and heating the Sn—Bi solder at a temperature which is not lower than the melting point thereof and which is not higher than 180° C. for 30 minutes or more.
    Type: Application
    Filed: September 28, 2010
    Publication date: March 31, 2011
    Applicant: FUJITSU LIMITED
    Inventors: Takatoyo YAMAKAMI, Takashi KUBOTA, Hidehiko KIRA, Takayoshi MATSUMURA
  • Publication number: 20100328917
    Abstract: A multichip module includes a package substrate, a first semiconductor device, a second semiconductor device and a conductive bump. The first semiconductor device is flip-chip bonded to the package substrate. The first semiconductor device includes a first chip pad on a surface thereof. The second semiconductor device is mounted on the first semiconductor device. The second semiconductor device includes a second chip pad facing the first chip pad. The conductive bump connects the first chip pad to the second chip pad. The conductive bump includes a first metallic body that has a first diffusion rate and a second metallic body that has a second diffusion rate lower than the first diffusion rate.
    Type: Application
    Filed: June 23, 2010
    Publication date: December 30, 2010
    Applicant: FUJITSU LIMITED
    Inventors: Takayoshi MATSUMURA, Kenji Kobae, Shuichi Takeuchi, Tetsuya Takahashi
  • Publication number: 20100327435
    Abstract: An electronic component includes a package substrate, a plurality of conductive pads, an insulating material and a semiconductor device. The plurality of conductive pads is disposed on the package substrate. The insulating material is disposed between the plurality of conductive pads. The insulating material includes a top surface located on an identical plane to an upper surface of the plurality of conductive pads. The semiconductor device includes a conductive bump aligned on a corresponding conductive pad of the plurality of conductive pads.
    Type: Application
    Filed: June 24, 2010
    Publication date: December 30, 2010
    Applicant: FUJITSU LIMITED
    Inventors: Kimio Nakamura, Takayoshi Matsumura, Yoshiyuki Satoh, Kuniko Ishikawa, Kenji Kobae
  • Publication number: 20100258640
    Abstract: An RFID tag includes an inlet on which an antenna pattern serving as an antenna for communication and an IC chip electrically connected to the antenna pattern are mounted. The RFID tag also includes an exterior body that encloses the inlet from outside and a hollow space that is formed by the inlet and the exterior body and that is filled with gas or a gel material.
    Type: Application
    Filed: April 8, 2010
    Publication date: October 14, 2010
    Applicant: FUJITSU LIMITED
    Inventors: Shuichi Takeuchi, Kenji Kobae, Takayoshi Matsumura, Tetsuya Takahashi
  • Publication number: 20100243743
    Abstract: A radio frequency identification tag is provided. The radio frequency identification tag includes a base, an antenna formed on the base, an integrated circuit chip electrically connected to the antenna, and a bonding layer bonding the integrated circuit chip to the base. The bonding layer includes a conductive filler. The base is configured to bend away from a surface on which the integrated circuit chip is bonded.
    Type: Application
    Filed: March 12, 2010
    Publication date: September 30, 2010
    Applicant: FUJITSU LIMITED
    Inventors: Shuichi TAKEUCHI, Kenji KOBAE, Takayoshi MATSUMURA, Tetsuya TAKAHASHI
  • Publication number: 20100126763
    Abstract: A wire bonding method which includes forming a bump on a first electrode provided in a first electronic part and bonding the bump and a second electrode provided in a second electronic part by using a wire, wherein the bump and the wire are formed using materials containing Au, and an Au purity of the material forming the bump is lower than an Au purity of the material forming the wire.
    Type: Application
    Filed: October 7, 2009
    Publication date: May 27, 2010
    Applicant: FUJITSU LIMITED
    Inventors: Takayoshi Matsumura, Takeshi Miyakoshi