Patents by Inventor Takayoshi Shimura

Takayoshi Shimura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10833166
    Abstract: A semiconductor device has an MIS structure that includes a semiconductor layer, a gate insulating film on the semiconductor layer, and a gate electrode on the gate insulating film. The gate insulating film has a layered structure that includes a base SiO2 layer and a high-k layer on the base SiO2 layer and containing Hf. The gate electrode has a portion made of a metal material having a work function of higher than 4.6 eV, the portion being in contact with at least the high-k layer.
    Type: Grant
    Filed: July 13, 2017
    Date of Patent: November 10, 2020
    Assignee: ROHM CO., LTD.
    Inventors: Kenji Yamamoto, Masatoshi Aketa, Hirokazu Asahara, Takashi Nakamura, Takuji Hosoi, Heiji Watanabe, Takayoshi Shimura, Shuji Azumo, Yusaku Kashiwagi
  • Patent number: 10804392
    Abstract: A semiconductor device includes a semiconductor layer of a first conductivity type. A well region that is a second conductivity type well region is formed on a surface layer portion of the semiconductor layer and has a channel region defined therein. A source region that is a first conductivity type source region is formed on a surface layer portion of the well region. A gate insulating film is formed on the semiconductor layer and has a multilayer structure. A gate electrode is opposed to the channel region of the well region where a channel is formed through the gate insulating film.
    Type: Grant
    Filed: December 13, 2019
    Date of Patent: October 13, 2020
    Assignee: ROHM CO., LTD.
    Inventors: Shuhei Mitani, Yuki Nakano, Heiji Watanabe, Takayoshi Shimura, Takuji Hosoi, Takashi Kirino
  • Patent number: 10772592
    Abstract: This X-ray phase contrast imaging apparatus (100) includes an X-ray source (1) that radiates continuous X-rays, a first grating (3) that forms a self-image, a second grating (4), a detector (5) that detects the continuous X-rays, and a third grating (2) arranged between the detector (5) and the first grating 3. The first grating (3), the second grating (4), and the third grating (2) are arranged so as to satisfy conditions of predetermined formulas.
    Type: Grant
    Filed: July 10, 2017
    Date of Patent: September 15, 2020
    Assignees: Shimadzu Corporation, OSAKA UNIVERSITY
    Inventors: Satoshi Sano, Koichi Tanabe, Toshinori Yoshimuta, Kenji Kimura, Hiroyuki Kishihara, Yukihisa Wada, Takuro Izumi, Taro Shirai, Takahiro Doki, Akira Horiba, Takayoshi Shimura, Heiji Watanabe, Takuji Hosoi
  • Patent number: 10755920
    Abstract: A method for manufacturing a semiconductor device includes: thermally-oxidizing a surface of a to-be-processed base made by SiC as body material to form a silicon dioxide film, by supplying gas containing oxidation agent to the surface of the to-be-processed base; exchanging ambient gas containing the oxidation agent after forming the silicon dioxide film, by decreasing a partial pressure of the oxidation agent in the ambient gas to 10 Pa or less; and after exchanging the ambient gas, lowering a temperature of the to-be-processed base.
    Type: Grant
    Filed: July 27, 2016
    Date of Patent: August 25, 2020
    Assignees: FUJI ELECTRIC CO., LTD., OSAKA UNIVERSITY
    Inventors: Heiji Watanabe, Takayoshi Shimura, Takuji Hosoi, Mitsuru Sometani
  • Patent number: 10729398
    Abstract: An X-ray phase contrast imaging device of the present invention can change an arrangement pitch of slits related to a multi-slit and an arrangement pitch of phase shift sections related to a phase grating. A positional relationship among the multi-slit 3b, the phase grating, and an FPD is determined based on the arrangement pitch of the slits related to the multi-slit, the arrangement pitch of the phase shift sections related to the phase grating, and an arrangement pitch of detection elements related to the FPD. Among these arrangement pitches, by changing the arrangement pitch of the slits and the arrangement pitch of the phase shift sections, the present invention can change the positional relationship among the multi-slit, the phase grating, and the FPD.
    Type: Grant
    Filed: July 28, 2017
    Date of Patent: August 4, 2020
    Assignees: Shimadzu Corporation, Osaka University
    Inventors: Satoshi Sano, Koichi Tanabe, Toshinori Yoshimuta, Kenji Kimura, Hiroyuki Kishihara, Yukihisa Wada, Takuro Izumi, Taro Shirai, Takahiro Doki, Akira Horiba, Takayoshi Shimura, Heiji Watanabe, Takuji Hosoi
  • Patent number: 10732132
    Abstract: [PROBLEM TO BE SOLVED] To provide a radiation phase contrast imaging device having a small device configuration [SOLVING MEANS] The present invention focused on the findings that the distance between the phase grating 5 and the FPD 4 does not need to be the Talbot distance. The distance between the phase grating 5 and the FPD 4 can be more freely set. However, a self-image cannot be detected unless the self-image is sufficiently magnified with respect to the phase grating 5. The degree on how much the self-image is magnified on the FPD 4 with respect to the original phase grating 5 is determined by a magnification ratio X2/X1. Therefore, in the present invention, the magnification ratio is set to be the same as the magnification ratio in a conventional configuration. With this, even if the distance X2 between the radiation source 3 and the FPD 4 is reduced, a situation in which the self-image cannot be detected by the FPD 4 due to the excessively small size thereof does not occur.
    Type: Grant
    Filed: February 22, 2017
    Date of Patent: August 4, 2020
    Assignees: Shimadzu Corporation, OSAKA UNIVERSITY
    Inventors: Takahiro Doki, Koichi Tanabe, Toshinori Yoshimuta, Kenji Kimura, Akihiro Nishimura, Taro Shirai, Satoshi Sano, Akira Horiba, Takayoshi Shimura, Heiji Watanabe, Takuji Hosoi
  • Publication number: 20200158662
    Abstract: This X-ray phase contrast imaging apparatus (100) includes an X-ray source (1), a first grating (3) that forms a self-image, a second grating (4), a detector (5) that detects X-rays, an adjustment mechanism (6), and a controller (7) that controls the adjustment mechanism (6) to adjust a misalignment of the first grating (3) or a misalignment of the second grating (4) based on Moire fringes detected by the detector (5).
    Type: Application
    Filed: July 10, 2017
    Publication date: May 21, 2020
    Inventors: Akira HORIBA, Koichi TANABE, Toshinori YOSHIMUTA, Kenji KIMURA, Hiroyuki KISHIHARA, Yukihisa WADA, Takuro IZUMI, Taro SHIRAI, Takahiro DOKI, Satoshi SANO, Takayoshi SHIMURA, Heiji WATANABE, Takuji HOSOI
  • Publication number: 20200135876
    Abstract: A semiconductor device including: a metal-insulator-semiconductor (MIS) structure that includes a nitride semiconductor layer, a gate insulator film, and a gate electrode stacked in stated order; and a source electrode and a drain electrode that are disposed to sandwich the gate electrode in a plan view and contact the nitride semiconductor layer. The gate insulator film includes a threshold value control layer that includes an oxynitride film.
    Type: Application
    Filed: January 2, 2020
    Publication date: April 30, 2020
    Applicants: Panasonic Corporation, OSAKA UNIVERSITY
    Inventors: Hong-An Shih, Satoshi Nakazawa, Naohiro Tsurumi, Yoshiharu Anda, Heiji Watanabe, Takayoshi Shimura, Takuji Hosoi, Mikito Nozaki, Takahiro Yamada
  • Publication number: 20200119192
    Abstract: A semiconductor device includes a semiconductor layer of a first conductivity type. A well region that is a second conductivity type well region is formed on a surface layer portion of the semiconductor layer and has a channel region defined therein. A source region that is a first conductivity type source region is formed on a surface layer portion of the well region. A gate insulating film is formed on the semiconductor layer and has a multilayer structure. A gate electrode is opposed to the channel region of the well region where a channel is formed through the gate insulating film.
    Type: Application
    Filed: December 13, 2019
    Publication date: April 16, 2020
    Inventors: Shuhei MITANI, Yuki NAKANO, Heiji WATANABE, Takayoshi SHIMURA, Takuji HOSOI, Takashi KIRINO
  • Patent number: 10546954
    Abstract: A semiconductor device includes a semiconductor layer of a first conductivity type. A well region that is a second conductivity type well region is formed on a surface layer portion of the semiconductor layer and has a channel region defined therein. A source region that is a first conductivity type source region is formed on a surface layer portion of the well region. A gate insulating film is formed on the semiconductor layer and has a multilayer structure. A gate electrode is opposed to the channel region of the well region where a channel is formed through the gate insulating film.
    Type: Grant
    Filed: May 21, 2019
    Date of Patent: January 28, 2020
    Assignee: ROHM CO., LTD.
    Inventors: Shuhei Mitani, Yuki Nakano, Heiji Watanabe, Takayoshi Shimura, Takuji Hosoi, Takashi Kirino
  • Publication number: 20190355828
    Abstract: A semiconductor device has an MIS structure that includes a semiconductor layer, a gate insulating film on the semiconductor layer, and a gate electrode on the gate insulating film. The gate insulating film has a layered structure that includes a base SiO2 layer and a high-k layer on the base SiO2 layer and containing Hf. The gate electrode has a portion made of a metal material having a work function of higher than 4.6 eV, the portion being in contact with at least the high-k layer.
    Type: Application
    Filed: July 13, 2017
    Publication date: November 21, 2019
    Applicant: ROHM CO., LTD.
    Inventors: Kenji YAMAMOTO, Masatoshi AKETA, Hirokazu ASAHARA, Takashi NAKAMURA, Takuji HOSOI, Heiji WATANABE, Takayoshi SHIMURA, Shuji AZUMO, Yusaku KASHIWAGI
  • Publication number: 20190343472
    Abstract: An X-ray phase contrast imaging device of the present invention can change an arrangement pitch of slits related to a multi-slit and an arrangement pitch of phase shift sections related to a phase grating. A positional relationship among the multi-slit 3b, the phase grating, and an FPD is determined based on the arrangement pitch of the slits related to the multi-slit, the arrangement pitch of the phase shift sections related to the phase grating, and an arrangement pitch of detection elements related to the FPD. Among these arrangement pitches, by changing the arrangement pitch of the slits and the arrangement pitch of the phase shift sections, the present invention can change the positional relationship among the multi-slit, the phase grating, and the FPD.
    Type: Application
    Filed: July 28, 2017
    Publication date: November 14, 2019
    Inventors: Satoshi SANO, Koichi TANABE, Toshinori YOSHIMUTA, Kenji KIMURA, Hiroyuki KISHIHARA, Yukihisa WADA, Takuro IZUMI, Taro SHIRAI, Takahiro DOKI, Akira HORIBA, Takayoshi SHIMURA, Heiji WATANABE, Takuji HOSOI
  • Publication number: 20190273158
    Abstract: A semiconductor device includes a semiconductor layer of a first conductivity type. A well region that is a second conductivity type well region is formed on a surface layer portion of the semiconductor layer and has a channel region defined therein. A source region that is a first conductivity type source region is formed on a surface layer portion of the well region. A gate insulating film is formed on the semiconductor layer and has a multilayer structure. A gate electrode is opposed to the channel region of the well region where a channel is formed through the gate insulating film.
    Type: Application
    Filed: May 21, 2019
    Publication date: September 5, 2019
    Inventors: Shuhei MITANI, Yuki NAKANO, Heiji WATANABE, Takayoshi SHIMURA, Takuji HOSOI, Takashi KIRINO
  • Patent number: 10319853
    Abstract: A semiconductor device includes a semiconductor layer of a first conductivity type. A well region that is a second conductivity type well region is formed on a surface layer portion of the semiconductor layer and has a channel region defined therein. A source region that is a first conductivity type source region is formed on a surface layer portion of the well region. A gate insulating film is formed on the semiconductor layer and has a multilayer structure. A gate electrode is opposed to the channel region of the well region where a channel is formed through the gate insulating film.
    Type: Grant
    Filed: January 11, 2018
    Date of Patent: June 11, 2019
    Assignee: ROHM CO., LTD.
    Inventors: Shuhei Mitani, Yuki Nakano, Heiji Watanabe, Takayoshi Shimura, Takuji Hosoi, Takashi Kirino
  • Publication number: 20190167219
    Abstract: This X-ray phase contrast imaging apparatus (100) includes an X-ray source (1) that radiates continuous X-rays, a first grating (3) that forms a self-image, a second grating (4), a detector (5) that detects the continuous X-rays, and a third grating (2) arranged between the detector (5) and the first grating 3. The first grating (3), the second grating (4), and the third grating (2) are arranged so as to satisfy conditions of predetermined formulas.
    Type: Application
    Filed: July 10, 2017
    Publication date: June 6, 2019
    Inventors: Satoshi SANO, Koichi TANABE, Toshinori YOSHIMUTA, Kenji KIMURA, Hiroyuki KISHIHARA, Yukihisa WADA, Takuro IZUMI, Taro SHIRAI, Takahiro DOKI, Akira HORIBA, Takayoshi SHIMURA, Heiji WATANABE, Takuji HOSOI
  • Publication number: 20190056336
    Abstract: [PROBLEM TO BE SOLVED] To provide a radiation phase contrast imaging device having a small device configuration [SOLVING MEANS] The present invention focused on the findings that the distance between the phase grating 5 and the FPD 4 does not need to be the Talbot distance. The distance between the phase grating 5 and the FPD 4 can be more freely set. However, a self-image cannot be detected unless the self-image is sufficiently magnified with respect to the phase grating 5. The degree on how much the self-image is magnified on the FPD 4 with respect to the original phase grating 5 is determined by a magnification ratio X2/X1. Therefore, in the present invention, the magnification ratio is set to be the same as the magnification ratio in a conventional configuration. With this, even if the distance X2 between the radiation source 3 and the FPD 4 is reduced, a situation in which the self-image cannot be detected by the FPD 4 due to the excessively small size thereof does not occur.
    Type: Application
    Filed: February 22, 2017
    Publication date: February 21, 2019
    Applicants: SHIMADZU CORPORATION, OSAKA UNIVERSITY
    Inventors: Takahiro DOKI, Koichi TANABE, Toshinori YOSHIMUTA, Kenji KIMURA, Akihiro NISHIMURA, Taro SHIRAI, Satoshi SANO, Akira HORIBA, Takayoshi SHIMURA, Heiji WATANABE, Takuji HOSOI
  • Patent number: 10103232
    Abstract: A semiconductor device (100) includes a base layer (10), an interface layer (20), and a deposition layer (30). The base layer (10) includes a nitride semiconductor that contains gallium. The interface layer (20) is adjacent to the base layer (10). The interface layer (20) contains gallium oxide. The deposition layer (30) is adjacent to the interface layer (20). The deposition layer (30) has a wider band gap than the interface layer (20). The interface layer (20) preferably has crystallinity. The interface layer (20) preferably contains ?-phase Ga2O3.
    Type: Grant
    Filed: August 25, 2017
    Date of Patent: October 16, 2018
    Assignee: OSAKA UNIVERSITY
    Inventors: Heiji Watanabe, Takahiro Yamada, Mikito Nozaki, Takuji Hosoi, Takayoshi Shimura
  • Publication number: 20180138313
    Abstract: A semiconductor device includes a semiconductor layer of a first conductivity type. A well region that is a second conductivity type well region is formed on a surface layer portion of the semiconductor layer and has a channel region defined therein. A source region that is a first conductivity type source region is formed on a surface layer portion of the well region. A gate insulating film is formed on the semiconductor layer and has a multilayer structure. A gate electrode is opposed to the channel region of the well region where a channel is formed through the gate insulating film.
    Type: Application
    Filed: January 11, 2018
    Publication date: May 17, 2018
    Applicant: ROHM CO., LTD.
    Inventors: Shuhei MITANI, Yuki NAKANO, Heiji WATANABE, Takayoshi SHIMURA, Takuji HOSOI, Takashi KIRINO
  • Publication number: 20180061954
    Abstract: A semiconductor device (100) includes a base layer (10), an interface layer (20), and a deposition layer (30). The base layer (10) includes a nitride semiconductor that contains gallium. The interface layer (20) is adjacent to the base layer (10). The interface layer (20) contains gallium oxide. The deposition layer (30) is adjacent to the interface layer (20). The deposition layer (30) has a wider band gap than the interface layer (20). The interface layer (20) preferably has crystallinity. The interface layer (20) preferably contains ?-phase Ga2O3.
    Type: Application
    Filed: August 25, 2017
    Publication date: March 1, 2018
    Applicant: OSAKA UNIVERSITY
    Inventors: Heiji WATANABE, Takahiro YAMADA, Mikito NOZAKI, Takuji HOSOI, Takayoshi SHIMURA
  • Patent number: 9893180
    Abstract: A semiconductor device includes a semiconductor layer of a first conductivity type. A well region that is a second conductivity type well region is formed on a surface layer portion of the semiconductor layer and has a channel region defined therein. A source region that is a first conductivity type source region is formed on a surface layer portion of the well region. A gate insulating film is formed on the semiconductor layer and has a multilayer structure. A gate electrode is opposed to the channel region of the well region where a channel is formed through the gate insulating film.
    Type: Grant
    Filed: September 22, 2016
    Date of Patent: February 13, 2018
    Assignee: ROHM CO., LTD.
    Inventors: Shuhei Mitani, Yuki Nakano, Heiji Watanabe, Takayoshi Shimura, Takuji Hosoi, Takashi Kirino