Patents by Inventor Takayuki Hashimoto
Takayuki Hashimoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11551354Abstract: An interlobar position specifying unit specifies an interlobar position in a lung field area included in a three-dimensional image. An expansion unit expands a plane area at the interlobar position in a thickness direction to generate an expansion area including an interlobar membrane. A projection processing unit processes the expansion area by a projection method that emphasizes the interlobar membrane to generate a projection image. The display control unit displays the projection image on a display.Type: GrantFiled: July 21, 2020Date of Patent: January 10, 2023Assignee: FUJIFILM CorporationInventor: Takayuki Hashimoto
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Publication number: 20220321738Abstract: A signal processing apparatus includes first and second processors that read and execute a program, and a memory. The first processor is configured to process plural color signals at one time and output the plural color signals in parallel. The memory is configured to temporarily store the plural color signals output from the first processor. The second processor is configured to sequentially read and process plural color signals processable at one time from the memory. The first and second processors are configured to process the plural color signals in units of bands including plural lines; after completion of processing of a first band, processing of a second band starts; and the first processor is configured to start processing the second band at a time point before completion of processing of the first band by the second processor, and at which color signals of the first band remain in the memory.Type: ApplicationFiled: August 24, 2021Publication date: October 6, 2022Applicant: FUJIFILM BUSINESS INNOVATION CORP.Inventors: Masaki NUDEJIMA, Takayuki HASHIMOTO, Daiki TAKAZAWA
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Publication number: 20220284567Abstract: According to one aspect of the present invention, a method of generating teacher data for image recognition includes acquiring image data by capturing an image of a workpiece, and segmenting the image data into a plurality of first areas, marking whether predetermined information is included in each of the plurality of first areas, and generating a plurality of pieces of teacher data.Type: ApplicationFiled: April 5, 2022Publication date: September 8, 2022Inventors: Takeru Ohya, Kazuya Hizume, Yuta Okabe, Takayuki Hashimoto
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Patent number: 11418674Abstract: An image processing apparatus includes a processing unit that shifts plural pieces of pixel data so as to suppress deviation in a sub-scanning direction at the time of image formation; a storage unit that stores the plural pieces of pixel data; and a converting unit that converts addresses of the plural pieces of pixel data such that a predetermined number of pieces of pixel data which are a unit of processing of the shift process are stored in a cache memory used by the storage unit at once.Type: GrantFiled: December 5, 2018Date of Patent: August 16, 2022Assignee: FUJIFILM Business Innovation Corp.Inventors: Suguru Oue, Daiki Takazawa, Takayuki Hashimoto, Masaki Nudejima, Tomoyuki Ono
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Patent number: 11410898Abstract: A manufacturing method of a mounting structure, the method including: a step of preparing a mounting member including a first circuit member and a plurality of second circuit members placed on the first circuit member via bumps, the mounting member having a space between the first circuit member and the second circuit member; a step of preparing a sheet having a space maintaining layer; a disposing step of disposing the sheet on the mounting member such that the space maintaining layer faces the second circuit members; and a sealing step of pressing the sheet against the first circuit member and heating the sheet, to seal the second circuit members so as to maintain the space, and to cure the sheet. The bumps are solder bumps. The space maintaining layer after curing has a glass transition temperature of higher than 125° C., and a coefficient of thermal expansion at 125° C. or lower of 20 ppm/K or less.Type: GrantFiled: October 30, 2018Date of Patent: August 9, 2022Assignee: NAGASE CHEMTEX CORPORATIONInventors: Takayuki Hashimoto, Takuya Ishibashi, Kazuki Nishimura
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Patent number: 11412588Abstract: A control apparatus of a light emitting diode includes a storage unit that stores table information indicating a combination of a magnitude and a cycle of luminance and the number of times of the combinations; and a control section that controls the light emitting diode in accordance with a control pattern in which the combination of the magnitude and the cycle of the luminance indicated in the table information is repeated up to the number of times of the combinations.Type: GrantFiled: December 4, 2018Date of Patent: August 9, 2022Assignee: FUJIFILM Business Innovation Corp.Inventors: Tomoyuki Ono, Masaki Nudejima, Takayuki Hashimoto, Suguru Oue, Daiki Takazawa
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Patent number: 11315804Abstract: A manufacturing method of a mounting structure, the method including a step of preparing a mounting member including a first circuit member and a plurality of second circuit members placed on the first circuit member; a disposing step of disposing a thermosetting sheet and a thermoplastic sheet on the mounting member, with the thermosetting sheet interposed between the thermoplastic sheet and the first circuit member; a first sealing step of pressing a stack of the thermosetting sheet and the thermoplastic sheet against the first circuit member, and heating the stack, to seal the second circuit members and to cure the thermosetting sheet into a first cured layer; a removal step of removing the thermoplastic sheet from the first cured layer; and a coating film formation step of forming a coating film on the first cured layer, after the removal step.Type: GrantFiled: December 13, 2018Date of Patent: April 26, 2022Assignee: NAGASE CHEMTEX CORPORATIONInventors: Eiichi Nomura, Yutaka Miyamoto, Takayuki Hashimoto
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Publication number: 20210403765Abstract: A curable resin composition includes: a first epoxy resin having a polyoxyalkylene chain; a second epoxy resin different from the first epoxy resin; a thermoplastic resin having a weight average molecular weight of 300,000 or less, and having a reactive functional group; at least one selected from the group consisting of a curing agent and a curing accelerator; and an inorganic filler.Type: ApplicationFiled: July 12, 2019Publication date: December 30, 2021Applicant: NAGASE CHEMTEX CORPORATIONInventors: Takayuki HASHIMOTO, Eiichi NOMURA, Katsushi KAN, Daisuke MORI, Yosuke OI, Yukio YADA, Takashi HIRAOKA, Takeyuki KITAGAWA
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Publication number: 20210241016Abstract: A display control unit displays a medical image from which at least one region of interest is extracted on a display unit. A correction unit corrects a boundary of the region of interest according to a correction instruction for the boundary of the region of interest extracted from the displayed medical image. An image generation unit generates a weighted image in which each pixel in the medical image has, as a pixel value of each pixel, a weight coefficient representing a weight of being within the region of interest, by setting an initial weight coefficient for the extracted region of interest and setting a corrected weight coefficient for a corrected region for which the correction instruction is given in the medical image.Type: ApplicationFiled: April 22, 2021Publication date: August 5, 2021Applicant: FUJIFILM CorporationInventor: Takayuki HASHIMOTO
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Patent number: 11080574Abstract: An image processing apparatus includes a processor configured to process an image; a reading direct memory access controller (DMAC) configured to read data from the memory; a writing DMAC configured to write data to the memory, each DMAC configured to control direct memory access to a memory; an upper first-in first-out (FIFO) unit connected to the reading and writing DMACs and includes FIFOs of the number equal to the number of channels of each of the reading and writing DMACs and a lower FIFO unit connected between the upper FIFO unit and the processor and includes FIFOs that correspond to the FIFOs of the upper FIFO unit at a ratio of 1 upper FIFO unit to F lower FIFO units (F being an integer equal to 2 or larger).Type: GrantFiled: March 20, 2020Date of Patent: August 3, 2021Assignee: FUJIFILM BUSINESS INNOVATION CORP.Inventors: Masaki Nudejima, Tomoyuki Ono, Takayuki Hashimoto, Daiki Takazawa
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Patent number: 10983927Abstract: An electronic device includes a memory, plural master circuits, a transmission path, a detection unit, and a reset control unit. The plural master circuits read and write data from and into the memory. Plural instructions and data are transmitted through the transmission path while buffering and arbitrating the instructions and the data. The detection unit detects a buffer overrun in the transmission path. The reset control unit performs reset control for a portion of the transmission path affected by the buffer overrun and master circuits, of the plural master circuits, affected by the buffer overrun.Type: GrantFiled: June 27, 2018Date of Patent: April 20, 2021Assignee: FUJI XEROX CO., LTD.Inventors: Tomoyuki Ono, Masaki Nudejima, Takayuki Hashimoto, Suguru Oue
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Patent number: 10977763Abstract: An information processing device includes: a first processing unit that processes plural color signals at a time and outputs a processed plural color signals in parallel; a memory that temporarily stores the processed plural color signals outputted in parallel from the first processing unit; and a second processing unit that reads the processed plural color signals from the memory in order by a processable number at a time, the second processing unit being able to process a smaller number of color signals than the first processing unit at a time, wherein a reading speed from the memory is faster than a writing speed to the memory.Type: GrantFiled: June 21, 2018Date of Patent: April 13, 2021Assignee: FUJI XEROX CO., LTD.Inventors: Masaki Nudejima, Tomoyuki Ono, Takayuki Hashimoto, Suguru Oue, Daiki Takazawa
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Publication number: 20210084775Abstract: A manufacturing method of a mounting structure includes: a step of preparing a mounting member including a first circuit member and a plurality of second circuit members placed on the first circuit member; a disposing step of disposing a thermosetting sheet and a thermoplastic sheet on the mounting member, with the thermosetting sheet interposed between the thermoplastic sheet and the first circuit member; a first sealing step of pressing a stack of the thermosetting sheet and the thermoplastic sheet against the first circuit member, and heating the stack, to seal the second circuit members and to cure the thermosetting sheet into a cured layer; and a removal step of removing the thermoplastic sheet from the cured layer. At least one of the second circuit members is a hollow member having a space from the first circuit member, and in the first sealing step, the second circuit members are sealed so as to maintain the space.Type: ApplicationFiled: December 13, 2018Publication date: March 18, 2021Applicant: NAGASE CHEMTEX CORPORATIONInventors: Eiichi NOMURA, Yutaka MIYAMOTO, Takayuki HASHIMOTO
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Publication number: 20210056368Abstract: An image processing apparatus includes a processor configured to process an image; a reading direct memory access controller (DMAC) configured to read data from the memory; a writing DMAC configured to write data to the memory, each DMAC configured to control direct memory access to a memory; an upper first-in first-out (FIFO) unit connected to the reading and writing DMACs and includes FIFOs of the number equal to the number of channels of each of the reading and writing DMACs and a lower FIFO unit connected between the upper FIFO unit and the processor and includes FIFOs that correspond to the FIFOs of the upper FIFO unit at a ratio of 1 upper FIFO unit to F lower FIFO units (F being an integer equal to 2 or larger).Type: ApplicationFiled: March 20, 2020Publication date: February 25, 2021Applicant: FUJI XEROX CO., LTD.Inventors: Masaki NUDEJIMA, Tomoyuki ONO, Takayuki HASHIMOTO, Daiki TAKAZAWA
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Patent number: 10910391Abstract: A semiconductor memory device comprises a substrate, first semiconductor films extending in a first direction crossing a surface of the substrate and arranged in a second direction and in a third direction, a conductive layer which covers peripheral faces of the first semiconductor films on a cross-section crossing the first direction, and a contact which extends in the first direction. Here, when straight lines disposed at equal intervals in the second direction on the cross-section and perpendicular to the second direction are defined as first to third straight lines, a first number of the first semiconductor films are provided on the first straight line, a second number less than the first number of the first semiconductor films are provided on the second straight line, a third number less than the second number of the first semiconductor films are provided on the third straight line.Type: GrantFiled: August 27, 2019Date of Patent: February 2, 2021Assignee: TOSHIBA MEMORY CORPORATIONInventors: Takayuki Hashimoto, Ayaha Hachisuga, Jun Nishimura
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Publication number: 20200388509Abstract: A manufacturing method of a mounting structure, the method including a step of preparing a mounting member including a first circuit member and a plurality of second circuit members placed on the first circuit member; a disposing step of disposing a thermosetting sheet and a thermoplastic sheet on the mounting member, with the thermosetting sheet interposed between the thermoplastic sheet and the first circuit member; a first sealing step of pressing a stack of the thermosetting sheet and the thermoplastic sheet against the first circuit member, and heating the stack, to seal the second circuit members and to cure the thermosetting sheet into a first cured layer; a removal step of removing the thermoplastic sheet from the first cured layer; and a coating film formation step of forming a coating film on the first cured layer, after the removal step.Type: ApplicationFiled: December 13, 2018Publication date: December 10, 2020Applicant: NAGASE CHEMTEX CORPORATIONInventors: Eiichi NOMURA, Yutaka MIYAMOTO, Takayuki HASHIMOTO
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Publication number: 20200357713Abstract: A manufacturing method of a mounting structure, the method including: a step of preparing a mounting member including a first circuit member and a plurality of second circuit members placed on the first circuit member via bumps, the mounting member having a space between the first circuit member and the second circuit member; a step of preparing a sheet having a space maintaining layer; a disposing step of disposing the sheet on the mounting member such that the space maintaining layer faces the second circuit members; and a sealing step of pressing the sheet against the first circuit member and heating the sheet, to seal the second circuit members so as to maintain the space, and to cure the sheet. The bumps are solder bumps. The space maintaining layer after curing has a glass transition temperature of higher than 125° C., and a coefficient of thermal expansion at 125° C. or lower of 20 ppm/K or less.Type: ApplicationFiled: October 30, 2018Publication date: November 12, 2020Applicant: NAGASE CHEMTEX CORPORATIONInventors: Takayuki HASHIMOTO, Takuya ISHIBASHI, Kazuki NISHIMURA
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Publication number: 20200349703Abstract: An interlobar position specifying unit specifies an interlobar position in a lung field area included in a three-dimensional image. An expansion unit expands a plane area at the interlobar position in a thickness direction to generate an expansion area including an interlobar membrane. A projection processing unit processes the expansion area by a projection method that emphasizes the interlobar membrane to generate a projection image. The display control unit displays the projection image on a display.Type: ApplicationFiled: July 21, 2020Publication date: November 5, 2020Applicant: FUJIFILM CorporationInventor: Takayuki HASHIMOTO
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Publication number: 20200287518Abstract: A manufacturing method of a mounting structure, the method including: a step of preparing a mounting member including a first circuit member and a plurality of second circuit members placed on the first circuit member, the mounting member having a space between the first circuit member and the second circuit member; a step of preparing a laminate sheet including a first thermal-conductive layer and a second thermal-conductive layer, the first thermal-conductive layer disposed at least on one outermost side; a disposing step of disposing the laminate sheet on the mounting member such that the first thermal-conductive layer faces the second circuit members; and a sealing step of pressing the laminate sheet against the first circuit member and heating the laminate sheet, to seal the second circuit members so as to maintain the space, and to cure the laminate sheet.Type: ApplicationFiled: September 28, 2018Publication date: September 10, 2020Applicant: NAGASE CHEMTEX CORPORATIONInventors: Takayuki HASHIMOTO, Takuya ISHIBASHI, Kazuki NISHIMURA
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Publication number: 20200266797Abstract: A manufacturing method of a mounting structure, the method including: a step of preparing a mounting member including a first circuit member and a plurality of second circuit members placed on the first circuit member; a step of preparing a sheet having thermosetting property; a disposing step of disposing the sheet on the mounting member so as to face the second circuit members; and a sealing step of pressing the sheet against the first circuit member and heating the sheet, to seal the second circuit members and to cure the sheet, wherein the second circuit members include a reference member, and a first adjacent member and a second adjacent member each adjacent to the reference member, a separation distance D1 between the reference member and the first adjacent member is different from a separation distance D2 between the reference member and the second adjacent member, at least one of the plurality of the second circuit members is a hollow member to be provided with a space from the first circuit member, aType: ApplicationFiled: September 28, 2018Publication date: August 20, 2020Applicant: NAGASE CHEMTEX CORPORATIONInventors: Takayuki HASHIMOTO, Takuya ISHIBASHI, Hiroyuki OKADA, Kazuki NISHIMURA