Patents by Inventor Takayuki Hashimoto

Takayuki Hashimoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9986124
    Abstract: A copying apparatus includes a capturing unit that divides an image on a document into plural regions and captures an image of each region, a storage unit that stores data representing the image of the region, a forming unit that reads the data and forms an image represented by the data on a medium, and an instruction unit that determines a capture start time on the basis of a size of the data and instructs the capturing unit to start capturing the image at the capture start time.
    Type: Grant
    Filed: February 5, 2016
    Date of Patent: May 29, 2018
    Assignee: FUJI XEROX CO., LTD.
    Inventors: Akira Misumi, Takayuki Hashimoto, Yuichi Sugiyama
  • Publication number: 20180084131
    Abstract: A client device includes a supply section that supplies guide screen information to a specified device in response to selection of a specific type of paper, the guide screen information representing a guide screen related to supply of the paper to a printer, and a transmitting section that transmits print data to the printer.
    Type: Application
    Filed: February 28, 2017
    Publication date: March 22, 2018
    Applicant: FUJI XEROX CO., LTD.
    Inventor: Takayuki HASHIMOTO
  • Patent number: 9870326
    Abstract: A transfer apparatus includes first and second communication paths, an accepting unit, a registration unit, an acquisition unit, and a transfer unit. The accepting unit accepts a request for data. The registration unit detects and registers a range that has been specified for writing. The acquisition unit acquires the data from a memory controller via the first communication path in a case where the request is issued for a registered range, and acquires the data from the arbitration device via the second communication path in a case where the request is issued for an unregistered range. The transfer unit transfers the acquired data. In a case where a first range detected from the arbitration device overlaps at least a portion of or is adjacent to a second range, which has been registered, the registration unit combines the first and second ranges into a continuous range and registers the continuous range.
    Type: Grant
    Filed: August 31, 2015
    Date of Patent: January 16, 2018
    Assignee: FUJI XEROX CO., LTD.
    Inventors: Takayuki Hashimoto, Akira Misumi, Yuichi Sugiyama
  • Publication number: 20170373599
    Abstract: An apparatus is adapted to drive an insulating gate-type semiconductor element by a first control voltage and a second control voltage, that are supplied to a first insulating gate and a second insulating gate, respectively, and includes a first noise filter inputting a signal about current that passes through the insulating gate-type semiconductor element, a first comparator making a comparison between an output signal of the first noise filter and a first reference signal and outputting a first comparison result, a first control voltage output circuit, and a second control voltage output circuit, the second control voltage output circuit being adapted to reduce the second control voltage when it is determined from the first comparison result that overcurrent passes through the insulating gate-type semiconductor element, the first control voltage output circuit being adapted to reduce the first control voltage after the second control voltage is reduced.
    Type: Application
    Filed: September 8, 2017
    Publication date: December 28, 2017
    Inventors: Takayuki HASHIMOTO, Mutsuhiro MORI
  • Patent number: 9780660
    Abstract: An apparatus is adapted to drive an insulating gate-type semiconductor element by a first control voltage and a second control voltage, that are supplied to a first insulating gate and a second insulating gate, respectively, and includes a first noise filter inputting a signal about current that passes through the insulating gate-type semiconductor element, a first comparator making a comparison between an output signal of the first noise filter and a first reference signal and outputting a first comparison result, a first control voltage output circuit, and a second control voltage output circuit, the second control voltage output circuit being adapted to reduce the second control voltage when it is determined from the first comparison result that overcurrent passes through the insulating gate-type semiconductor element, the first control voltage output circuit being adapted to reduce the first control voltage after the second control voltage is reduced.
    Type: Grant
    Filed: May 10, 2013
    Date of Patent: October 3, 2017
    Assignee: Hitachi, Ltd.
    Inventors: Takayuki Hashimoto, Mutsuhiro Mori
  • Publication number: 20170141677
    Abstract: The present invention provides a switching device (100) for power conversion in which a first gate electrode (6), a p-type channel layer (2) having an n-type emitter region (3), a second gate electrode (13), and a p-type floating layer (15) are repeatedly arranged in order on the surface side of an n?type semiconductor substrate (1). An interval a between the two gates (6, 13) that sandwich the p-type channel layer (2) is configured to be smaller than an interval b between the two gates (13, 6) that sandwich the p-type floating layer (15). The first gate electrode (6) and the second gate electrode (13) are both supplied with drive signals having a time difference in drive timing.
    Type: Application
    Filed: January 31, 2017
    Publication date: May 18, 2017
    Inventors: Takayuki HASHIMOTO, Mutsuhiro MORI, Masahiro MASUNAGA
  • Publication number: 20170117874
    Abstract: A circuit member including: an element having a functional region; a tabular cover disposed opposite to the functional region; and a rib formed to surround the functional region, for providing a space between the functional region and the cover. The cover includes a sheet S having a thickness of 100 ?m or less. The sheet S has a tensile elastic modulus Es at 175° C. of 10 GPa or more. The tensile elastic modulus Es at 175° C. of the sheet S is preferably 20 GPa or more.
    Type: Application
    Filed: March 31, 2015
    Publication date: April 27, 2017
    Applicant: NAGASE CHEMTEX CORPORATION
    Inventors: Takuya ISHIBASHI, Masatoshi FUJIMOTO, Takayuki HASHIMOTO
  • Patent number: 9595602
    Abstract: The present invention provides a switching device (100) for power conversion in which a first gate electrode (6), a p-type channel layer (2) having an n-type emitter region (3), a second gate electrode (13), and a p-type floating layer (15) are repeatedly arranged in order on the surface side of an n-type semiconductor substrate (1). An interval a between the two gates (6, 13) that sandwich the p-type channel layer (2) is configured to be smaller than an interval b between the two gates (13, 6) that sandwich the p-type floating layer (15). The first gate electrode (6) and the second gate electrode (13) are both supplied with drive signals having a time difference in drive timing.
    Type: Grant
    Filed: September 7, 2012
    Date of Patent: March 14, 2017
    Assignee: Hitachi, Ltd.
    Inventors: Takayuki Hashimoto, Mutsuhiro Mori, Masahiro Masunaga
  • Publication number: 20170026542
    Abstract: A copying apparatus includes a capturing unit that divides an image on a document into plural regions and captures an image of each region, a storage unit that stores data representing the image of the region, a forming unit that reads the data and forms an image represented by the data on a medium, and an instruction unit that determines a capture start time on the basis of a size of the data and instructs the capturing unit to start capturing the image at the capture start time.
    Type: Application
    Filed: February 5, 2016
    Publication date: January 26, 2017
    Applicant: FUJI XEROX CO., LTD.
    Inventors: Akira MISUMI, Takayuki HASHIMOTO, Yuichi SUGIYAMA
  • Publication number: 20170003958
    Abstract: A non-transitory computer-readable recording medium storing an information processing program causing a computer to execute a process including obtaining a name of a variable usable for a software program and a configuration value of the variable, obtaining a compressed string into which the name of the variable is compressed, writing, to a configuration file, the compressed string and the obtained configuration value so that the compressed string and the obtained configuration value are associated each other, and outputting a configuration value corresponding to an inquiry when the inquiry is received, the inquiry including a designation of a name of a specified variable and a request to obtain a configuration value corresponding to the specified variable, the configuration value corresponding to the specified variable being specified based on a compressed string obtained by compressing the designated name of the specified variable.
    Type: Application
    Filed: June 28, 2016
    Publication date: January 5, 2017
    Applicant: FUJITSU LIMITED
    Inventors: Kimihiro Okubo, Osamu OYAMADA, Masahiro Takeda, Takayuki Hashimoto, KOHSHI YAMAMOTO, Kohei Uno, Yasunori Shibata
  • Publication number: 20160343838
    Abstract: This semiconductor element drive apparatus switches an insulating gate at a positive voltage to at a negative voltage just before recovery when an anode current is large, and holds the insulating gate at the positive voltage when the anode current is small in a semiconductor element that is provided with: a first conductivity type first semiconductor layer (n? type drift layer); a second conductivity type second semiconductor layer (p type anode layer) that is adjacent to the first semiconductor layer and is exposed on one main surface (anode side); a first conductivity type third semiconductor layer (n type cathode layer) that is adjacent to the first semiconductor layer, is exposed on the other main surface (cathode side), and has an impurity concentration higher than that of the first semiconductor layer (n? type drift layer); and the insulating gate on the other main surface (cathode side).
    Type: Application
    Filed: January 31, 2014
    Publication date: November 24, 2016
    Applicant: Hitachi, Ltd.
    Inventor: Takayuki HASHIMOTO
  • Publication number: 20160283414
    Abstract: A transfer apparatus includes first and second communication paths, an accepting unit, a registration unit, an acquisition unit, and a transfer unit. The accepting unit accepts a request for data. The registration unit detects and registers a range that has been specified for writing. The acquisition unit acquires the data from a memory controller via the first communication path in a case where the request is issued for a registered range, and acquires the data from the arbitration device via the second communication path in a case where the request is issued for an unregistered range. The transfer unit transfers the acquired data. In a case where a first range detected from the arbitration device overlaps at least a portion of or is adjacent to a second range, which has been registered, the registration unit combines the first and second ranges into a continuous range and registers the continuous range.
    Type: Application
    Filed: August 31, 2015
    Publication date: September 29, 2016
    Applicant: FUJI XEROX CO., LTD.
    Inventors: Takayuki HASHIMOTO, Akira MISUMI, Yuichi SUGIYAMA
  • Patent number: 9349847
    Abstract: A semiconductor device of this invention (an IGBT with a built-in diode) includes: an n?-type drift layer 1; a p-type channel region 2 that is arranged in contact with the surface side of this n?-type drift layer 1; a gate electrode 5 that is provided in a trench T provided so as to penetrate this p-type channel region 2 and reach to the n?-type drift layer 1 through a gate insulating film 3; an n-type source region 4 that is provided so as to contact the trench T on the surface side of the p-type channel region 2; a high-concentration n-type region 6 that is arranged in contact with the back side of the n?-type drift layer 1; and a high-concentration p-type region 7 that is arranged in contact with the back side of this high-concentration n-type region 6; in which a junction of the high-concentration n-type region 6 and the high-concentration p-type region 7 is a tunnel junction. According to this semiconductor device, it is possible to form the IGBT and the diode on a single chip.
    Type: Grant
    Filed: December 15, 2011
    Date of Patent: May 24, 2016
    Assignee: Hitachi, Ltd.
    Inventors: Takayuki Hashimoto, Mutsuhiro Mori
  • Publication number: 20160118891
    Abstract: An apparatus is adapted to drive an insulating gate-type semiconductor element by a first control voltage and a second control voltage, that are supplied to a first insulating gate and a second insulating gate, respectively, and includes a first noise filter inputting a signal about current that passes through the insulating gate-type semiconductor element, a first comparator making a comparison between an output signal of the first noise filter and a first reference signal and outputting a first comparison result, a first control voltage output circuit, and a second control voltage output circuit, the second control voltage output circuit being adapted to reduce the second control voltage when it is determined from the first comparison result that overcurrent passes through the insulating gate-type semiconductor element, the first control voltage output circuit being adapted to reduce the first control voltage after the second control voltage is reduced.
    Type: Application
    Filed: May 10, 2013
    Publication date: April 28, 2016
    Inventors: Takayuki HASHIMOTO, Mutsuhiro MORI
  • Patent number: 9306047
    Abstract: There is provided a semiconductor device including a first emitter layer of a first conductivity type, a drift layer of a second conductivity type, adjacent to the first emitter layer, a channel layer of the first conductivity type, adjacent to the drift layer, a second emitter layer of the second conductivity type, adjacent to the channel layer, a collector electrode electrically coupled to the first emitter layer, an emitter electrode electrically coupled to the second emitter layer, a first trench-gate electrode for controlling on and off of an electric current flowing between the collector electrode and the emitter electrode, and a second trench-gate electrode for controlling a turn-off power loss. The semiconductor device further includes a thyristor unit made up of the first emitter layer, the drift layer, the channel layer, and the second emitter layer.
    Type: Grant
    Filed: October 5, 2012
    Date of Patent: April 5, 2016
    Assignee: Hitachi, Ltd.
    Inventors: Takayuki Hashimoto, Mutsuhiro Mori, Masahiro Masunaga
  • Patent number: 9252137
    Abstract: A semiconductor substrate capable of detecting operating current of a MOSFET and diode current in a miniaturized MOSFET such as a trench-gate type MOSFET is provided. A semiconductor substrate includes a main current region and a current sensing region in which current smaller than main current flowing in the main current region flows. The main current region has a source electrode disposed on a main surface, the source electrode being in contact with a p-type semiconductor region (body) and an n+-type semiconductor region (source), and the current sensing region has a MOSFET current detecting electrode and a diode current detecting electrode on a main surface, the MOSFET current detecting electrode being in contact with the p-type semiconductor region (body) and the n+-type semiconductor region (source), the diode current detecting electrode being in contact with the p-type semiconductor region (body).
    Type: Grant
    Filed: September 2, 2014
    Date of Patent: February 2, 2016
    Assignee: Renesas Electronics Corporation
    Inventor: Takayuki Hashimoto
  • Publication number: 20160013300
    Abstract: A semiconductor device according to the present invention includes: a first semiconductor layer of a first conductivity type; a second semiconductor layer of the first conductivity type adjacent to the first semiconductor layer and having an impurity concentration lower than the first semiconductor layer; a third semiconductor layer of a second conductivity type adjacent to the second semiconductor layer; a fourth semiconductor layer of the first conductivity type located within the third semiconductor layer; a first electrode coupled to the third semiconductor layer and the fourth semiconductor layer; a second electrode coupled to the first semiconductor layer; and an insulated gate provided over the respective surfaces of the third semiconductor layer and the fourth semiconductor layer, wherein peak value of the impurity concentration of the third semiconductor layer is in the range of 2×1016 cm?3 or more and 5×1018 cm?3 or less.
    Type: Application
    Filed: February 25, 2013
    Publication date: January 14, 2016
    Inventors: Takayuki HASHIMOTO, Mutsuhiro MORI
  • Publication number: 20160013299
    Abstract: A semiconductor device according to the present invention includes: a first semiconductor layer of a first conductivity type; a second semiconductor layer of the first conductivity type, which is adjacent to the first semiconductor layer and has an impurity concentration lower than the first semiconductor layer; a third semiconductor layer adjacent to the second semiconductor layer; a first electrode electrically coupled to the third semiconductor layer; a second electrode electrically coupled to the first semiconductor layer; and an insulated gate provided over the surface of the third semiconductor layer. Then, an end portion of the insulated gate is located at a position distant from the junction part between the second semiconductor layer and the third semiconductor layer within the surface of the third semiconductor layer.
    Type: Application
    Filed: February 25, 2013
    Publication date: January 14, 2016
    Applicant: Hitachi, Ltd.
    Inventors: Takayuki HASHIMOTO, Mutsuhiro MORI
  • Publication number: 20150324026
    Abstract: A processing apparatus generates a command in accordance with a size of the coordinate input area and a distance between two touch inputs on the coordinate input area. When a distance between two touch inputs on a first coordinate input area larger than a second coordinate input area changes to a first distance, a command corresponding to a second distance longer than the first distance is generated. When a distance between two touch inputs on the second coordinate input area smaller than the first coordinate input area changes to a third distance, a command corresponding to the third distance is generated.
    Type: Application
    Filed: April 24, 2015
    Publication date: November 12, 2015
    Inventors: Takayuki Hashimoto, Katsuyuki Kobayashi
  • Publication number: 20150303288
    Abstract: The present invention provides a switching device (100) for power conversion in which a first gate electrode (6), a p-type channel layer (2) having an n-type emitter region (3), a second gate electrode (13), and a p-type floating layer (15) are repeatedly arranged in order on the surface side of an n-type semiconductor substrate (1). An interval a between the two gates (6, 13) that sandwich the p-type channel layer (2) is configured to be smaller than an interval b between the two gates (13, 6) that sandwich the p-type floating layer (15). The first gate electrode (6) and the second gate electrode (13) are both supplied with drive signals having a time difference in drive timing.
    Type: Application
    Filed: September 7, 2012
    Publication date: October 22, 2015
    Applicant: Hitachi, Ltd.
    Inventors: Takayuki HASHIMOTO, Mutsuhiro MORI, Masahiro MASUNAGA