Patents by Inventor Takayuki Ikeda

Takayuki Ikeda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210327865
    Abstract: A display device with high resolution is provided. A display device with high display quality is provided. The display device includes a substrate, an insulating layer, a plurality of transistors, and a plurality of light-emitting diodes. The plurality of light-emitting diodes are provided in a matrix over the substrate. Each of the plurality of transistors is electrically connected to at least one of the plurality of light-emitting diodes. The plurality of light-emitting diodes are positioned closer to the substrate than the plurality of transistors are. The plurality of light-emitting diodes emit light toward the substrate. Each of the plurality of transistors includes a metal oxide layer and a gate electrode. The metal oxide layer includes a channel formation region. The top surface of the gate electrode is substantially level with the top surface of the insulating layer.
    Type: Application
    Filed: August 22, 2019
    Publication date: October 21, 2021
    Inventors: Shunpei YAMAZAKI, Koji KUSUNOKI, Shingo EGUCHI, Takayuki IKEDA
  • Publication number: 20210324671
    Abstract: A sensor unit manufacturing method includes: a core metal insertion process of inserting a core metal member having a length dimension smaller than a length dimension of a core metal accommodation portion into a predetermined location (a section of a curving portion) extending along a longitudinal direction of the core metal accommodation portion; and a bending process of bending the section (the section of the curving portion) of a fixation base portion, into which the core metal member is inserted, following a curved shape of a sensor bracket.
    Type: Application
    Filed: May 15, 2019
    Publication date: October 21, 2021
    Applicant: MITSUBA Corporation
    Inventors: TAKAYUKI IKEDA, TSUYOSHI MARUYAMA, AKIHIRO IINO, YASUHIRO TSUKAHARA, YOHEI INAGAKI, Takao Fueki
  • Patent number: 11152366
    Abstract: A semiconductor device with a large storage capacity per unit area is provided. A semiconductor device includes a memory cell. The memory cell includes a first conductor; a first insulator over the first conductor; a first oxide over the first insulator and including a first region, a second region, and a third region positioned between the first region and the second region; a second insulator over the first oxide; a second conductor over the second insulator; a third insulator positioned in contact with a side surface of the first region; and a second oxide positioned on the side surface of the first region, with the third insulator therebetween. The first region includes a region overlapping the first conductor. The third region includes a region overlapped by the second conductor. The first region and the second region have a lower resistance than the third region.
    Type: Grant
    Filed: May 29, 2018
    Date of Patent: October 19, 2021
    Inventors: Shunpei Yamazaki, Hajime Kimura, Takayuki Ikeda, Kiyoshi Kato, Yuta Endo, Junpei Sugao
  • Publication number: 20210318856
    Abstract: A semiconductor device that updates a weight coefficient used for arithmetic operation by an artificial neural network is provided. Each of the first to third memory cells draws a current corresponding to data of its retention node and changes the data in accordance with the potentials of first and second wirings. When a weight coefficient and first and second reference data are held in the retention nodes of the first to third memory cells, the first circuit supplies, to a third wiring, a constant currents drawn by the second and third memory cells. When input data is input to the first wiring, a difference current between the constant current and a current drawn by the first memory cell is changed, and the second circuit outputs arithmetic result data corresponding to the change. The third circuit inputs update data corresponding to the arithmetic result data to the second wiring.
    Type: Application
    Filed: April 15, 2019
    Publication date: October 14, 2021
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Takayuki IKEDA, Roh YAMAMOTO, Shuichi KATSUI
  • Patent number: 11146771
    Abstract: There is provided a display control device, display control method, and program capable of executing control such that information can be displayed more appropriately and efficiently according to an environment in which information is displayed or a situation of displayed information, the display control device including: a display control unit configured to decide a display region of a display object to be displayed on a display surface according to information regarding a real object on the display surface.
    Type: Grant
    Filed: September 2, 2014
    Date of Patent: October 12, 2021
    Assignee: SONY CORPORATION
    Inventors: Tetsuo Ikeda, Takayuki Sakamoto, Tomohiro Ishii, Atsushi Izumihara, Masayuki Yamada, Yohei Fukuma, Yuzuru Kimura, Yasushi Okumura, Takashi Shibuya, Katsuya Hyodo
  • Patent number: 11143987
    Abstract: An intermediate transfer belt includes a base layer that has ionic conductivity and is a thickest layer out of multiple layers making up the intermediate transfer belt with respect to the thickness direction of the intermediate transfer belt, and an inner layer having electronic conductivity and a lower electrical resistance than the base layer.
    Type: Grant
    Filed: November 2, 2018
    Date of Patent: October 12, 2021
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Tsuguhiro Yoshida, Masaru Shimura, Shinji Katagiri, Eiichi Hamana, Takahiro Ikeda, Takayuki Tanaka, Shuichi Tetsuno
  • Patent number: 11139327
    Abstract: In a CMOS image sensor in which a plurality of pixels is arranged in a matrix, a transistor in which a channel formation region includes an oxide semiconductor is used for each of a charge accumulation control transistor and a reset transistor which are in a pixel portion. After a reset operation of the signal charge accumulation portion is performed in all the pixels arranged in the matrix, a charge accumulation operation by the photodiode is performed in all the pixels, and a read operation of a signal from the pixel is performed per row. Accordingly, an image can be taken without a distortion.
    Type: Grant
    Filed: October 3, 2019
    Date of Patent: October 5, 2021
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yoshiyuki Kurokawa, Takayuki Ikeda, Hikaru Tamura, Munehiro Kozuma, Masataka Ikeda, Takeshi Aoki
  • Patent number: 11137813
    Abstract: The power consumption of an analog arithmetic circuit is reduced. The analog arithmetic circuit includes a plurality of first circuits. An output terminal of the k-th (k is a natural number) first circuit is connected to an input terminal of the k+1-th first circuit. Each of the first circuits includes a memory circuit which holds an analog signal, a second circuit which performs arithmetic processing using the analog signal, a switch which controls power supply to the second circuit, and a controller. The conduction state of the switch included in the k-th first circuit is controlled by the controller included in the k+1-th first circuit. The arithmetic processing performed by the second circuit included in the k+1-th first circuit is started by the controller included in the k+1-th first circuit.
    Type: Grant
    Filed: February 28, 2019
    Date of Patent: October 5, 2021
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yoshiyuki Kurokawa, Takayuki Ikeda, Shunpei Yamazaki
  • Publication number: 20210297775
    Abstract: A semiconductor device with a novel structure which can identify the sound source is provided. The semiconductor device includes a microphone array, delay circuits, and a signal processing circuit. The delay circuit includes a first selection circuit, which selects a microphone, signal retention circuits, which retain voltages depending on the sound signal, and a second selection circuit, which selects a signal retention circuit. Each signal retention circuit includes a transistor which includes a semiconductor layer including an oxide semiconductor in its channel formation region. The first selection circuit writes the voltage of discreet sound signals to the signal retention circuit. The second selection circuit selects at different timings the voltages which are retained in the signal retention circuit and generates the output signal corresponding to the delayed sound signal.
    Type: Application
    Filed: August 23, 2019
    Publication date: September 23, 2021
    Inventors: Takayuki IKEDA, Kiyotaka KIMURA, Takeya HIROSE
  • Publication number: 20210291771
    Abstract: An occupant protection device which can protect an occupant without delay is provided. An image taken by an imaging device is analyzed to judge whether there is an object approaching the subject car. In the case where a collision between the object and the subject car is judged to be inevitable, an airbag device is activated before the collision, whereby the occupant can be protected without delay. By using selenium for a light-receiving element of the imaging device, an accurate image can be obtained even under low illuminance. Imaging in a global shutter system leads to an accurate image with little distortion. This enables more accurate image analysis.
    Type: Application
    Filed: June 3, 2021
    Publication date: September 23, 2021
    Inventors: Shunpei YAMAZAKI, Takayuki IKEDA, Yoshiyuki KUROKAWA
  • Publication number: 20210295780
    Abstract: A high-definition display device is provided. A small display device is provided. In the display device, a first layer and a second layer are stacked and provided. The first layer includes a gate driver circuit and a source driver circuit, and the second layer includes a display portion. The gate driver circuit and the source driver circuit are provided to include a region overlapping with the display portion. The gate driver circuit and the source driver circuit have an overlap region where they are not strictly separated from each other. Five or more gate driver circuits and five or more source driver circuits can be provided.
    Type: Application
    Filed: May 9, 2019
    Publication date: September 23, 2021
    Inventors: Takayuki IKEDA, Hidetomo KOBAYASHI, Hideaki SHISHIDO, Kiyotaka KIMURA, Takashi NAKAGAWA, Kosei NEI
  • Patent number: 11105693
    Abstract: A torque sensor includes a first region, a second region, a plurality of third regions connecting the first and second regions, a first strain generation part and a second strain generation part. The first strain generation part of which a first end is provided on the first region, and of which a first intermediate portion is provided on a second structure. The second strain generation part of which a third end is provided on the first region, of which a second intermediate portion is provided on the second region, and of which a fourth end is provided near a second end of the first strain generation part. A strain body provided with a resistor connects the second end of the first strain generation part and the fourth end of the second strain generation part.
    Type: Grant
    Filed: April 25, 2019
    Date of Patent: August 31, 2021
    Assignee: NIDEC COPAL ELECTRONICS CORPORATION
    Inventors: Takashi Suzuki, Takao Ikeda, Takashi Kanai, Takayuki Endo
  • Patent number: 11107287
    Abstract: An information processing apparatus includes an acquisition unit that acquires three-dimensional information on a real object including one or more real objects. The information processing apparatus further includes a control unit that controls a method of interaction between a user and a virtual object mapped and displayed on a surface of the real object, based on the three-dimensional information on the real object.
    Type: Grant
    Filed: August 22, 2018
    Date of Patent: August 31, 2021
    Assignee: SONY CORPORATION
    Inventors: Tetsuo Ikeda, Takayuki Sakamoto, Takuo Ikeda
  • Publication number: 20210264998
    Abstract: An electronic device applicable to an artificial neuron network. The electronic device includes a first circuit, a second circuit, and first to sixth wirings. The first circuit includes a first transistor, a second transistor, and a capacitor. The second circuit includes a third transistor. A gate of the third transistor is electrically connected to the third wiring. The capacitor capacitively couples the third wiring and the gate of the second transistor. The first circuit is capable of storing a weight as an analog value. The first transistor is typically an oxide semiconductor transistor.
    Type: Application
    Filed: May 7, 2021
    Publication date: August 26, 2021
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takayuki Ikeda, Yoshiyuki Kurokawa
  • Patent number: 11101302
    Abstract: An imaging device capable of image processing is provided. The imaging device can retain analog data (image data) obtained by an image-capturing operation in a pixel and perform a product-sum operation of the analog data and a predetermined weight coefficient in the pixel to convert the data into binary data. When the binary data is taken in a neural network or the like, processing such as image recognition can be performed. Since enormous volumes of image data can be retained in pixels in the state of analog data, processing can be performed efficiently.
    Type: Grant
    Filed: May 16, 2018
    Date of Patent: August 24, 2021
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takayuki Ikeda, Yoshiyuki Kurokawa, Shintaro Harada, Hidetomo Kobayashi, Roh Yamamoto, Kiyotaka Kimura, Takashi Nakagawa, Yusuke Negoro
  • Publication number: 20210249703
    Abstract: A semiconductor device capable of charging that is less likely to cause deterioration of a power storage device is provided. The amount of a charging current is adjusted in accordance with the ambient temperature. Charging under low-temperature environments is performed with a reduced charging current. When the ambient temperature is too low or too high, the charging is stopped. Measurement of the ambient temperature is performed with a memory element using an oxide semiconductor. The use of a memory element using an oxide semiconductor enables measurement of the ambient temperature and retention of the temperature information to be performed at the same time.
    Type: Application
    Filed: July 3, 2019
    Publication date: August 12, 2021
    Inventors: Takayuki IKEDA, Munehiro KOZUMA, Takanori MATSUZAKI, Ryota TAJIMA, Shunpei YAMAZAKI
  • Patent number: 11085227
    Abstract: A vehicle opening and closing apparatus that opens and closes an opening and closing body provided on a vehicle includes: an electric motor that drives the opening and closing body; a position detection part that detects a position of the opening and closing body; a measurement part that measures a current value which flows in the electric motor when the opening and closing body arrives at a predetermined position; a counter that counts up a count value based on the current value; and a determination part that stops, for a predetermined period of time, the next and subsequent opening and closing operation of the opening and closing body when the count value exceeds a first threshold value.
    Type: Grant
    Filed: May 26, 2016
    Date of Patent: August 10, 2021
    Assignee: Mitsuba Corporation
    Inventors: Hitoshi Roppongi, Takayuki Ikeda, Masahiro Fueki, Yasunori Noro
  • Publication number: 20210225912
    Abstract: An imaging panel is provided. The imaging panel includes a photoelectric conversion element, a pixel, a first conductive film, a second conductive film, a third conductive film, a fourth conductive film, and a fifth conductive film. The pixel includes a pixel circuit and supplies an image signal. The first conductive film is supplied with the image signal and the photoelectric conversion element includes a first terminal connected to the second conductive film and a second terminal connected to the pixel circuit. The pixel circuit includes a first switch, a second switch, a third switch, a transistor, and a capacitor. The first switch includes a terminal connected to the second terminal of the photoelectric conversion element and a terminal connected to a node. The transistor includes a gate electrode connected to the node and a first electrode connected to the third conductive film.
    Type: Application
    Filed: July 10, 2019
    Publication date: July 22, 2021
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Takayuki IKEDA
  • Publication number: 20210225910
    Abstract: An object is to provide a pixel structure of a display device including a photosensor which prevents changes in an output of the photosensor and a decrease in imaging quality. The display device has a pixel layout structure in which a shielding wire is disposed between an FD and an imaging signal line (a PR line, a TX line, or an SE line) or between the FD and an image-display signal line in order to reduce or eliminate parasitic capacitance between the FD and a signal line for the purpose of suppressing changes in the potential of the FD. An imaging power supply line, image-display power supply line, a GND line, a common line, or the like whose potential is fixed, such as a common potential line, is used as a shielding wire.
    Type: Application
    Filed: April 6, 2021
    Publication date: July 22, 2021
    Inventors: Takeshi AOKI, Yoshiyuki KUROKAWA, Takayuki IKEDA, Hikaru TAMURA
  • Publication number: 20210225310
    Abstract: A semiconductor device with a small circuit area that consumes low power is provided. The semiconductor device includes a shift register, a sample-and-hold circuit, a first buffer circuit, and a second buffer circuit. The sample-and-hold circuit includes a first input terminal, a second input terminal, and an output terminal. An output terminal of the first buffer circuit is electrically connected to the first input terminal. The shift register is electrically connected to the second input terminal. An input terminal of the second buffer circuit is electrically connected to the output terminal of the sample-and-hold circuit. In the semiconductor device, the potential of an input analog signal is retained in the sample-and-hold circuit and the analog signal is output from an output terminal of the second buffer circuit.
    Type: Application
    Filed: April 7, 2021
    Publication date: July 22, 2021
    Inventors: Yoshiyuki KUROKAWA, Takayuki IKEDA, Tatsunori INOUE