Patents by Inventor Takayuki Ikeda

Takayuki Ikeda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240062724
    Abstract: A high-definition display device is provided. A small display device is provided. In the display device, a first layer and a second layer are stacked and provided. The first layer includes a gate driver circuit and a source driver circuit, and the second layer includes a display portion. The gate driver circuit and the source driver circuit are provided to include a region overlapping with the display portion. The gate driver circuit and the source driver circuit have an overlap region where they are not strictly separated from each other. Five or more gate driver circuits and five or more source driver circuits can be provided.
    Type: Application
    Filed: October 16, 2023
    Publication date: February 22, 2024
    Inventors: Takayuki IKEDA, Hidetomo KOBAYASHI, Hideaki SHISHIDO, Kiyotaka KIMURA, Takashi NAKAGAWA, Kosei NEI
  • Patent number: 11908850
    Abstract: A display device with high resolution is provided. A display device with high display quality is provided. The display device includes a substrate, an insulating layer, a plurality of transistors, and a plurality of light-emitting diodes. The plurality of light-emitting diodes are provided in a matrix over the substrate. Each of the plurality of transistors is electrically connected to at least one of the plurality of light-emitting diodes. The plurality of light-emitting diodes are positioned closer to the substrate than the plurality of transistors are. The plurality of light-emitting diodes emit light toward the substrate. Each of the plurality of transistors includes a metal oxide layer and a gate electrode. The metal oxide layer includes a channel formation region. The top surface of the gate electrode is substantially level with the top surface of the insulating layer.
    Type: Grant
    Filed: August 22, 2019
    Date of Patent: February 20, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Koji Kusunoki, Shingo Eguchi, Takayuki Ikeda
  • Patent number: 11909397
    Abstract: The power of a semiconductor device is reduced. The semiconductor device includes a latch circuit composed of a dynamic circuit. The latch circuit includes a first circuit having a decoding function, a plurality of capacitors, a plurality of clock input terminals, a signal input terminal, a first output terminal, and a second output terminal. In a period during which “H” is supplied to a first clock signal, the potential of the first capacitor is updated on the basis of the results of decoding performed by the first circuit. In a period during which “H” is supplied to a second clock signal, the potential of the second capacitor is updated on the basis of the potential of the first capacitor, and the potential of the second capacitor is supplied as a first output signal to the first output terminal.
    Type: Grant
    Filed: October 17, 2019
    Date of Patent: February 20, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shintaro Harada, Takayuki Ikeda
  • Publication number: 20240057404
    Abstract: A high-resolution display device is provided. A display device with both high display quality and high resolution is provided. The display device includes a first light-emitting element and a second light-emitting element. The first light-emitting element includes a first pixel electrode, a first EL layer, and a common electrode. The second light-emitting element includes a second pixel electrode, a second EL layer, and the common electrode. An insulating layer is included between the first pixel electrode and the second pixel electrode. The insulating layer includes a first region overlapping with the first EL layer, a second region overlapping with the second EL layer, and a third region positioned between the first region and the second region. A side surface of the first EL layer and a side surface of the second EL layer are positioned over the insulating layer and are provided to face each other.
    Type: Application
    Filed: January 17, 2022
    Publication date: February 15, 2024
    Inventors: Shunpei YAMAZAKI, Takayuki IKEDA, Kenichi OKAZAKI, Yasumasa YAMANE
  • Publication number: 20240057428
    Abstract: A high-resolution or high-definition display device is provided.
    Type: Application
    Filed: January 7, 2022
    Publication date: February 15, 2024
    Inventors: Shunpei YAMAZAKI, Takayuki IKEDA, Kenichi OKAZAKI, Yasumasa YAMANE, Hajime KIMURA, Tatsuya ONUKI
  • Publication number: 20240057382
    Abstract: A novel display device is provided. The display device includes a first layer, a second layer, and a third layer. The first layer, the second layer, and the third layer are provided in different layers. The first layer includes a driver circuit and a functional circuit. The second layer includes a pixel circuit. The third layer includes a display element. The pixel circuit has a function of controlling light emission of the display element. The driver circuit has a function of controlling the pixel circuit. The functional circuit has a function of controlling the driver circuit. The first layer includes a first transistor with a semiconductor layer containing silicon in a channel formation region. The second layer includes a second transistor with a semiconductor layer containing a metal oxide in a channel formation region.
    Type: Application
    Filed: January 6, 2022
    Publication date: February 15, 2024
    Inventors: Shunpei YAMAZAKI, Takayuki IKEDA, Tatsuya ONUKI
  • Patent number: 11901822
    Abstract: A semiconductor device in which an increase in circuit area is inhibited is provided. The semiconductor device includes a first circuit layer and a second circuit layer over the first circuit layer; the first circuit layer includes a first transistor; the second circuit layer includes a second transistor; a gate of the second transistor is electrically connected to one of a source and a drain of the first transistor; a source and a drain of the second transistor are electrically connected to the other of the source and the drain of the first transistor; and a semiconductor layer of the second transistor contains a metal oxide.
    Type: Grant
    Filed: May 19, 2020
    Date of Patent: February 13, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yuto Yakubo, Hitoshi Kunitake, Takayuki Ikeda
  • Publication number: 20240047774
    Abstract: One embodiment of the present invention is to provide a highly safe monitoring system for a secondary battery which ensures safety by warning a user when detecting an abnormality in the secondary battery, for example, when detecting a phenomenon that impairs safety of the secondary battery in an early stage. The monitoring system uses an imaging device which captures images of an external view of the secondary battery. Furthermore, for facilitating an abnormality detection, temperature sensitive paint is either sprayed or applied on at least part of a surface of an exterior body of the secondary battery. In addition, a light source for irradiating the temperature sensitive paint with light is also provided. With this structure, the abnormal portion can emit light (or exhibit a color) in the case where abnormal heat generation occurs locally, whereby the imaging device can distinguish an abnormal portion from image data by the imaging device.
    Type: Application
    Filed: December 2, 2021
    Publication date: February 8, 2024
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takeshi OSADA, Yosuke TSUKAMOTO, Takayuki IKEDA
  • Patent number: 11894040
    Abstract: To provide a semiconductor device with a novel structure. The semiconductor device includes a plurality of constant current circuits each given a digital signal. The constant current circuits each include a first transistor to a third transistor. The first transistor has a function of making a first current corresponding to set analog potential flow therethrough. The second transistor has a function of controlling the first current flowing between a source and a drain of the first transistor, in response to the digital signal. The third transistor has a function of holding the analog potential supplied to a gate of the first transistor, by being turned off. The first transistor to the third transistor each include a semiconductor layer including an oxide semiconductor in a channel formation region.
    Type: Grant
    Filed: June 30, 2020
    Date of Patent: February 6, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takayuki Ikeda, Hitoshi Kunitake
  • Patent number: 11888446
    Abstract: A semiconductor device with a novel structure is provided. The semiconductor device includes a mixer circuit including a digital-analog converter circuit, a control circuit for controlling the digital-analog converter circuit, a power source control switch, and a plurality of Gilbert circuits. The plurality of Gilbert circuits each include an analog potential holding circuit for holding an analog potential output from the digital-analog converter circuit. The control circuit has a function of outputting a signal for controlling the analog potential holding circuit and the digital-analog converter circuit. The power source control switch has a function of stopping supply of a power source voltage to the control circuit in a period during which the analog potential held in the analog potential holding circuit is not updated. The analog potential holding circuit includes a first transistor. The first transistor includes a semiconductor layer including an oxide semiconductor in a channel formation region.
    Type: Grant
    Filed: April 27, 2020
    Date of Patent: January 30, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kiyotaka Kimura, Takeya Hirose, Hidetomo Kobayashi, Takayuki Ikeda
  • Publication number: 20240029636
    Abstract: A novel display apparatus is provided. The display apparatus includes a display portion and a peripheral circuit for driving the display portion, and the display portion is provided to overlap with and above the peripheral circuit. The display portion include a plurality of pixels arranged in a matrix, and the plurality of pixels each have a function of emitting light. The peripheral circuit includes a first transistor, and the pixel includes a second transistor. A semiconductor layer included in the first transistor and a semiconductor layer included in the second transistor are formed using materials having different compositions.
    Type: Application
    Filed: November 29, 2021
    Publication date: January 25, 2024
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei YAMAZAKI, Takayuki IKEDA, Hajime KIMURA, Tatsuya ONUKI
  • Publication number: 20240027060
    Abstract: An interior lighting for vehicle includes a housing installed in an interior of a vehicle and including a radar-wave-transmittable portion configured to transmit radar waves and including a light transmittable part in the radar-wave-transmittable portion, a light emission unit installed in the housing and configured to emit visible light and configured to illuminate the interior of the vehicle by the emitted visible light coming out from the housing through the light transmittable part, and a radar unit installed in the housing and configured to emit radar wave and configured to detect a presence of a person in the interior of the vehicle by the radar wave transmitted from the radar-wave-transmittable portion.
    Type: Application
    Filed: July 18, 2023
    Publication date: January 25, 2024
    Applicant: Yazaki Corporation
    Inventors: Takayuki IKEDA, Takashi WAKASUGI
  • Patent number: 11874981
    Abstract: A display device with excellent visibility can be provided. The display device includes a display region displayed by a light-emitting element. In the display region, a point touched by a user is a first point, a point which has been touched by the user prior to the first point is a second point, a vector that starts at the first point and ends at the second point is a first vector, a vector obtained by multiplying the first vector by k (k is a real number) is a second vector, and a point that is the second vector away from the first point is a third point, the display region includes a first region and a second region obtained by excluding the first region from the display region. The first region includes a first circle and a second circle, the center of the first circle is the first point, and the center of the second circle is the third point. The luminance in the first region is higher than the luminance in the second region.
    Type: Grant
    Filed: November 29, 2021
    Date of Patent: January 16, 2024
    Inventors: Takayuki Ikeda, Yuki Okamoto, Kei Takahashi, Shunpei Yamazaki
  • Patent number: 11868877
    Abstract: An arithmetic device and an electronic device having small power consumption is provided. An arithmetic device and an electronic device capable of high-speed operation is provided. An arithmetic device and an electronic device capable of suppressing heat generation is provided. The arithmetic device includes a first arithmetic portion and a second arithmetic portion. The first arithmetic portion includes a first CPU core and a second CPU core. The second arithmetic portion includes a first GPU core and a second GPU core. The CPU cores each have a power gating function and each include a first data retention circuit electrically connected to a flip-flop. The first GPU core includes a second data retention circuit capable of retaining an analog value and reading out the analog value as digital data of two or more bits. The second GPU core includes a third data retention circuit capable of retaining a digital value and reading out the digital value as digital data of one bit.
    Type: Grant
    Filed: January 31, 2022
    Date of Patent: January 9, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takahiko Ishizu, Takayuki Ikeda, Atsuo Isobe, Atsushi Miyaguchi, Shunpei Yamazaki
  • Patent number: 11867503
    Abstract: An anomaly detection system that outputs an anomaly detection signal before a safety valve of a secondary battery is opened is provided. The anomaly detection system includes a strain sensor, a memory, and a comparator. The memory has a function of retaining an analog potential, and the comparator has a function of comparing a potential output by the strain sensor and the analog potential retained by the memory. The strain sensor is attached to the secondary battery before use, and a predetermined potential is retained in the memory. When a housing of the secondary battery expands while the secondary battery is used, and the potential output by the strain sensor becomes higher (or lower) than the predetermined potential, an anomaly detection signal is output.
    Type: Grant
    Filed: July 24, 2019
    Date of Patent: January 9, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takayuki Ikeda, Ryota Tajima, Yuki Okamoto, Shunpei Yamazaki
  • Publication number: 20240006424
    Abstract: An object is to provide a pixel structure of a display device including a photosensor which prevents changes in an output of the photosensor and a decrease in imaging quality. The display device has a pixel layout structure in which a shielding wire is disposed between an FD and an imaging signal line (a PR line, a TX line, or an SE line) or between the FD and an image-display signal line in order to reduce or eliminate parasitic capacitance between the FD and a signal line for the purpose of suppressing changes in the potential of the FD. An imaging power supply line, image-display power supply line, a GND line, a common line, or the like whose potential is fixed, such as a common potential line, is used as a shielding wire.
    Type: Application
    Filed: August 10, 2023
    Publication date: January 4, 2024
    Inventors: Takeshi AOKI, Yoshiyuki KUROKAWA, Takayuki IKEDA, Hikaru TAMURA
  • Publication number: 20240006682
    Abstract: A power storage device that can be discharged safely and easily is provided. The power storage device includes a secondary battery covered with an exterior body, a radiator plate in contact with a surface of the exterior body, and a projection. The projection has conductivity and is held over the exterior body in the normal condition. When the projection penetrates the exterior body to be inserted into the secondary battery, the secondary battery can be short-circuited and discharged. Heat can be efficiently released from the projection to the radiator plate. Thus, the secondary battery can be discharged safely at high speed without thermal runaway.
    Type: Application
    Filed: June 27, 2023
    Publication date: January 4, 2024
    Inventors: Takeshi OSADA, Yosuke TSUKAMOTO, Takayuki IKEDA
  • Publication number: 20240006674
    Abstract: A sensor capable of detecting local expansion or the like is provided, and a storage battery system including a safety system such as the sensor and a secondary battery is provided. The storage battery system includes a first secondary battery and a second secondary battery each including an exterior body holding an electrolyte solution, a positive electrode, and a negative electrode; a sensor member provided to be in contact with part of the exterior body; and a detection circuit controlling the sensor member. The first secondary battery includes a memory unit storing data collected with gas introduction into the second secondary battery, a learning model constructed on the basis of the data, and an estimated value obtained using the learning model; and a unit providing information based on the estimated value.
    Type: Application
    Filed: December 2, 2021
    Publication date: January 4, 2024
    Inventors: Takeshi OSADA, Takayuki IKEDA, Yosuke TSUKAMOTO, Hiroki INOUE, Kiyotaka KIMURA, Shunsuke SATO, Toshiki MIZUGUCHI
  • Patent number: 11856804
    Abstract: An imaging display device which can quickly display a captured image is provided. The imaging display device includes an imaging portion on a first surface and a display portion on a second surface that is opposite to the first surface. The imaging portion includes a photoelectric conversion element configured to receive light delivered to the first surface. The display portion includes a light-emitting element configured to emit light in a direction opposite to the first surface. A pixel in the imaging portion is electrically connected to a pixel in the display portion. An image signal obtained at the imaging portion can be directly input to the display portion. Accordingly, the time delay due to data conversion can be eliminated, so that a captured image can be displayed in a moment.
    Type: Grant
    Filed: December 28, 2021
    Date of Patent: December 26, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takayuki Ikeda, Naoto Kusumoto
  • Publication number: 20230408595
    Abstract: Provided is a power storage system, a secondary battery control system, a secondary battery measurement circuit, or the like that consumes low power. Provided is a power storage system, a secondary battery control system, a secondary battery measurement circuit, or the like that is highly integrated. The power storage system includes a secondary battery and a measurement circuit; the measurement circuit includes a resistor, a capacitor, and an inductor; one terminal of the resistor is electrically connected to one electrode of the capacitor; the other terminal of the resistor is electrically connected to one terminal of the inductor; one terminal of the inductor is electrically connected to a positive electrode of the secondary battery; and the measurement circuit has a function of measuring impedance of the secondary battery by measuring current of the resistor.
    Type: Application
    Filed: November 12, 2021
    Publication date: December 21, 2023
    Inventors: Takayuki IKEDA, Yosuke TSUKAMOTO, Takeshi OSADA, Hiroki INOUE, Kiyotaka KIMURA, Shunsuke SATO, Toshiki MIZUGUCHI