Patents by Inventor Takayuki Ishikawa
Takayuki Ishikawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9462986Abstract: A medical image processing apparatus includes, an unit (12) extracting a blood vessel wall region from the image in a range including an aneurysm in an object, an unit (13) calculating the blood vessel diameter change rates of the neck portions of the aneurysm, blood vessel curvature, and blood vessel flattening ratio at each of discrete points on a blood vessel region based on the extracted blood vessel region, an unit (14) extracting, from discrete points, feature points at each of which at least one of a blood vessel diameter change rate, blood vessel curvature, and blood vessel flattening ratio exceeds a corresponding one of thresholds and decide a range for the indwelling of a stent graft in accordance with the extracted feature points, and a display unit (19) superimposing and display unrecommended ranges on a stored image.Type: GrantFiled: August 8, 2014Date of Patent: October 11, 2016Assignee: Toshiba Medical Systems CorporationInventors: Kazuo Imagawa, Ryuji Zaiki, Takayuki Ishikawa, Masaki Kobayashi
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Publication number: 20160276410Abstract: According to one embodiment, a memory device includes a first layer, a second layers, a third layer provided between the first layer and the second layer, and first electrodes. The first layer includes first interconnections and a first insulating portion provided between the first interconnections. The second layer includes second interconnections and a second insulating portion provided between the second interconnections. The third layer includes first and second portions including silicon oxide. The first portion is provided between the first and the second interconnections. The second portion is provided between the first and the second insulating portions. The first electrodes are provided between the first interconnections and the first portion, and include a first material. The second interconnections include a second material. The first material is easier to ionize than the second material. A density of the first portion is lower than a density of the second portion.Type: ApplicationFiled: March 14, 2016Publication date: September 22, 2016Applicant: Kabushiki Kaisha ToshibaInventors: Harumi SEKI, Takayuki ISHIKAWA, Masumi SAITOH
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Patent number: 9441503Abstract: A waste heat utilization apparatus is provided with a Rankine cycle and a power transmission mechanism that transmits power regenerated by an expander to an engine. The power transmission mechanism includes an expander clutch that interrupts or permits the transmission of the power from the expander to the engine. The expander includes a rotational speed sensor that detects a rotational speed of the expander. An increase in friction of the expander is detected on the basis of an increase in the rotational speed of the expander detected by the rotational speed sensor when the expander clutch is disconnected.Type: GrantFiled: August 14, 2012Date of Patent: September 13, 2016Assignee: SANDEN HOLDINGS CORPORATIONInventors: Takayuki Ishikawa, Shinichiro Mizoguchi, Hiroyuki Nagai, Riyako Iwahashi, Satoshi Ogihara, Tomonori Haraguchi
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Patent number: 9412937Abstract: According to one embodiment, a memory device includes a first electrode, a second electrode and a variable resistance layer. The second electrode includes a metal. The metal is more easily ionizable than a material of the first electrode. The variable resistance layer is disposed between the first electrode and the second electrode. The variable resistance layer includes a first layer and a second layer. The first layer has a relatively high crystallization rate. The second layer contacts the first layer. The second layer has a relatively low crystallization rate. The first layer and the second layer are stacked along a direction connecting the first electrode and the second electrode.Type: GrantFiled: October 23, 2015Date of Patent: August 9, 2016Assignee: Kabushiki Kaisha ToshibaInventors: Masumi Saitoh, Takayuki Ishikawa, Shosuke Fujii, Hidenori Miyagawa, Chika Tanaka, Ichiro Mizushima
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Publication number: 20160155574Abstract: Provided are a photoelectric conversion element module in which sufficient power generation performance can be obtained, and a method for manufacturing the photoelectric conversion element module. A photoelectric conversion element module obtained by electrically connecting two or more photoelectric conversion elements obtained by stacking a substrate, a first electrode, a photoelectric conversion layer containing a semiconductor and a sensitizing dye, a hole transportation layer having a conductive polymer, and a second electrode in the sequence listed, in which the hole transportation layer is formed by bringing the photoelectric conversion layer into contact with a conductive polymer precursor and then irradiating the sensitizing dye with light in the presence of an oxidizer, whereby the conductive polymer precursor is polymerized.Type: ApplicationFiled: June 19, 2014Publication date: June 2, 2016Inventors: Takayuki ISHIKAWA, Kazuya ISOBE
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Publication number: 20160141493Abstract: According to one embodiment, a nonvolatile memory device includes a first metal layer, a second metal layer, a first layer, a second layer, and a third layer. The first metal layer contains at least one first metal selected from the group consisting of Al, Ni, Ti, Co, Mg, Cr, Mn, Zn, and In. The second metal layer contains at least one second metal selected from the group consisting of Ag, Cu, Fe, Sn, Pb, and Bi. The first layer is provided between the first metal layer and the second metal layer, and contains a first oxide. The second layer is provided between the first layer and the second metal layer, and contains a second oxide. The third layer is provided between the first layer and the second layer, and contains one of a silicon oxide, a silicon nitride, and a silicon oxynitride.Type: ApplicationFiled: November 18, 2015Publication date: May 19, 2016Applicant: Kabushiki Kaisha ToshibaInventors: Harumi SEKI, Takayuki ISHIKAWA, Shosuke FUJII, Masumi SAITOH
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Patent number: 9328632Abstract: A Rankine cycle includes an waste-heat recovery device that is configured to exchange heat between cooling water coming out from an engine and exhaust gas exhausted from the engine, a heat exchanger including an evaporator through which the cooling water coming out from the engine flows to recover waste-heat of the engine to refrigerant, and a superheater through which the cooling water coming out from the waste-heat recovery device flows to recover the waste-heat of the engine to the refrigerant, an expander that is configured to generate power using the refrigerant coming out from the heat exchanger, a condenser that is configured to condense the refrigerant coming out from the expander, and a refrigerant pump that is configured to supply the refrigerant coming out from the condenser to the heat exchanger by being driven by the expander. The cooling water coming out from the superheater is returned to the engine after being joined with the cooling water coming out from the evaporator.Type: GrantFiled: August 14, 2012Date of Patent: May 3, 2016Assignee: NISSAN MOTOR CO., LTD.Inventors: Hiroyuki Nagai, Tomohiko Saitou, Takayuki Ishikawa, Shinichiro Mizoguchi
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Patent number: 9305645Abstract: An element according to an embodiment can transit between at least two states including a low-resistance state and a high-resistance state. The element comprises a first electrode, a second electrode, a first layer and a second layer. The first electrode includes metal elements. The first layer is located between the first electrode and the second electrode while contacting with the first electrode. The second layer is located between the first layer and the second electrode. At the low-resistance state, a density of the metal elements in the first layer is higher than that of the metal elements in the second layer. The density of the metal elements in the first layer at the low-resistance state is higher than that of the metal elements in the first layer at the high-resistance state. A relative permittivity of the second layer is higher than a relative permittivity of the first layer.Type: GrantFiled: October 2, 2013Date of Patent: April 5, 2016Assignee: Kabushiki Kaisha ToshibaInventors: Reika Ichihara, Daisuke Matsushita, Takayuki Ishikawa, Hiroki Tanaka
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Patent number: 9305646Abstract: A semiconductor memory device according to an embodiment comprises a memory cell and a control circuit, the control circuit performing write of data to the memory cell. The memory cell includes a second resistance varying layer sandwiched between a first resistance varying layer and a third resistance varying layer. The second resistance varying layer has a resistance value which is smaller than that of the other resistance varying layers. The control circuit applies to the memory cell a first voltage pulse, and then applies to the memory cell a second voltage pulse that has a rise time which is shorter than that of the first voltage pulse.Type: GrantFiled: July 28, 2014Date of Patent: April 5, 2016Assignee: KABUSHIKI KAISHA TOSHIBAInventors: Reika Ichihara, Shosuke Fujii, Hidenori Miyagawa, Takayuki Ishikawa
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Patent number: 9291074Abstract: An engine-waste-heat utilization device includes a Rankine cycle with a heat exchanger that is configured to recover engine-waste-heat to refrigerant, an expander that is configured to generate power using the refrigerant coming out from the heat exchanger, a condenser that is configured to condense the refrigerant coming out from the expander and a refrigerant pump that is configured to supply the refrigerant coming out from the condenser to the heat exchanger by being driven by the expander, a power transmission mechanism (crank pulley, pump pulley, belt) that is configured to transmit surplus power to the engine when the expander has spare power even if the refrigerant pump is driven, a clutch that is configured to connect and disconnecting power transmission by the power transmission mechanism, and a case provided near a high-temperature part of the engine such that a shaft of the expander and that of the refrigerant pump are coaxially arranged, the clutch, the refrigerant pump and the expander are integrType: GrantFiled: August 6, 2012Date of Patent: March 22, 2016Assignees: NISSAN MOTOR CO., LTD., SANDEN CORPORATIONInventors: Hiroyuki Nagai, Takayuki Ishikawa, Shinichiro Mizoguchi, Riyako Iwahashi, Shinji Nakamura
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Publication number: 20160064661Abstract: According to one embodiment, a resistive random access memory device includes a first electrode and a second electrode. The resistive random access memory device also includes a resistance change layer connected between the first electrode and the second electrode. The resistive random access memory device also includes a conductive layer connected in series to the resistance change layer between the first electrode and the second electrode. The resistive random access memory device in which the conductive layer includes a plurality of first material layers including a first material and a plurality of second material layers including a second material which is different from the first material.Type: ApplicationFiled: February 25, 2015Publication date: March 3, 2016Applicant: Kabushiki Kaisha ToshibaInventors: Tomohito KAWASHIMA, Takahiro NONAKA, Yusuke ARAYASHIKI, Takayuki ISHIKAWA
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CAPSULE ENDOSCOPE, CAPSULE ENDOSCOPE SYSTEM, AND METHOD FOR CONTROLLING POSTURE OF CAPSULE ENDOSCOPE
Publication number: 20160058272Abstract: A capsule endoscope includes a capsule enclosure having an external wall surface; an image pickup device provided inside the capsule enclosure; a light source provided inside the capsule enclosure; a plurality of electrode structures each including an electrode, a water repellent layer, and a dielectric layer positioned between the electrode and the water repellent layer, the plurality of electrode structures being provided on the external wall surface of the capsule enclosure such that the electrode is positioned on an external wall surface side of the capsule enclosure; a power supply provided inside the capsule enclosure; at least one reference electrode provided on the external wall surface of the capsule enclosure and connected to reference potential of the power supply; and a drive circuit configured to apply a drive voltage to the plurality of electrode structures based on the power supply.Type: ApplicationFiled: June 5, 2015Publication date: March 3, 2016Inventors: ATSUSHI OMOTE, TAKAYUKI ISHIKAWA, KENJI TAGASHIRA, MASATO ISHINO, KENICHI NISHIUCHI -
Publication number: 20160043311Abstract: According to one embodiment, a memory device includes a first electrode, a second electrode and a variable resistance layer. The second electrode includes a metal. The metal is more easily ionizable than a material of the first electrode. The variable resistance layer is disposed between the first electrode and the second electrode. The variable resistance layer includes a first layer and a second layer. The first layer has a relatively high crystallization rate. The second layer contacts the first layer. The second layer has a relatively low crystallization rate. The first layer and the second layer are stacked along a direction connecting the first electrode and the second electrode.Type: ApplicationFiled: October 23, 2015Publication date: February 11, 2016Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Masumi SAITOH, Takayuki Ishikawa, Shosuke Fujii, Hidenori Miyagawa, Chika Tanaka, Ichiro Mizushima
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Patent number: 9241418Abstract: A surface mount device in which a pin adapter that is integrally formed with a plurality of pins connects a base board and a main board is provided to enable an automatic mounting, to enable a reflow soldering, to increase the flexibility of design, and to satisfy requirements of customers. In the surface mount device, a pin adapter 5 that is formed integrally with a plurality of pins 6 is placed on a base board 1, the base board 1 and the main board 2 are connected by inserting the tips of the pins 6 into the corresponding locations of the main board 2, the leg portions of the pin adapter 5 are folded toward inside, and opening sections 52 are formed at the leg portions.Type: GrantFiled: June 13, 2013Date of Patent: January 19, 2016Assignee: NIHON DEMPA KOGYO CO., LTD.Inventors: Takayuki Ishikawa, Shinichi Sato, Kazuo Akaike
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Patent number: 9221946Abstract: Provided is technology that causes polybutylene terephthalate resin to react with a reactive compound and reduces the thermal decomposition of the polybutylene terephthalate resin, when performing reactive processing method using the polybutylene terephthalate resin. During production of polybutylene terephthalate resin pellets, the polybutylene terephthalate resin (A) and a reactive compound (B) that reacts with the polybutylene terephthalate resin (A) are reacted such that the difference between the intrinsic viscosity of a polybutylene terephthalate resin composition configuring the polybutylene terephthalate resin pellets and the intrinsic viscosity of a polybutylene terephthalate resin composition configuring a polybutylene terephthalate resin molded article is no more than 0.05 dL/g, and the amount of carboxylic group ends in the resin included in the polybutylene terephthalate resin pellets is adjusted so as to be no more than 25 meq/kg.Type: GrantFiled: November 20, 2012Date of Patent: December 29, 2015Assignee: WINTECH POLYMER LTD.Inventors: Kunihiro Hirata, Kazuhito Suzuki, Takayuki Ishikawa
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Patent number: 9202845Abstract: A memory device includes a first electrode, a second electrode and a variable resistance layer. The second electrode includes a metal. The metal is more easily ionizable than a material of the first electrode. The variable resistance layer is disposed between the first electrode and the second electrode. The variable resistance layer includes a first layer and a second layer. The first layer has a relatively high crystallization rate. The second layer contacts the first layer. The second layer has a relatively low crystallization rate. The first layer and the second layer are stacked along a direction connecting the first electrode and the second electrode.Type: GrantFiled: July 30, 2014Date of Patent: December 1, 2015Assignee: Kabushiki Kaisha ToshibaInventors: Masumi Saitoh, Takayuki Ishikawa, Shosuke Fujii, Hidenori Miyagawa, Chika Tanaka, Ichiro Mizushima
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Patent number: 9202636Abstract: A photoelectric conversion element comprising: a substrate; a first electrode; a photoelectric conversion layer comprising a semiconductor layer containing a dye and a semiconductor and a charge transport layer; and a second electrode, in this order, wherein the photoelectric conversion layer comprises a compound represented by Formula (1), wherein R1 and R2 each represent a hydrogen atom or an alkyl group which may have a substituent, X, Y and Z each represent a hydrogen atom or a substituent, wherein at least one of X, Y and Z is an electron withdrawing group.Type: GrantFiled: December 9, 2011Date of Patent: December 1, 2015Assignee: KONICA MINOLTA BUSINESS TECHNOLOGIES, INC.Inventors: Takayuki Ishikawa, Kazuya Isobe, Hidekazu Kawasaki
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Publication number: 20150333258Abstract: A non-volatile memory device of an embodiment includes: a first conductive layer; a second conductive layer; a ferroelectric film provided between the first conductive layer and the second conductive layer; and a paraelectric film provided between one of the first conductive layer and the second conductive layer, and the ferroelectric film, the paraelectric film having film thickness of 1.5 nm or more and 10 nm or less, and the paraelectric film having a dielectric constant higher than the ferroelectric film.Type: ApplicationFiled: July 24, 2015Publication date: November 19, 2015Applicant: Kabushiki Kaisha ToshibaInventors: Shosuke FUJII, Takayuki Ishikawa
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Patent number: 9190454Abstract: A memory device according to an embodiment, includes a substrate, two or more resistance change memory cells stacked on the substrate, two or more transistors stacked on the substrate, and two or more wirings stacked on the substrate. One of the memory cells and one of the transistors are connected to each other via one of the wirings.Type: GrantFiled: July 24, 2013Date of Patent: November 17, 2015Assignee: Kabushiki Kaisha ToshibaInventors: Masumi Saitoh, Takayuki Ishikawa, Shosuke Fujii, Kiyohito Nishihara
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Publication number: 20150320378Abstract: According to one embodiment, an X-ray diagnosis apparatus includes a couch where a subject is placed, a projector, a display controller, and a system controller. The projector includes an X-ray tube having a cathode and an anode that receives electrons from the cathode and irradiates X-rays to the subject, and a first detector configured to detect X-rays that have passed through the subject and are incident on the detection surface. The display controller displays a first image generated based on first detection data from the projector on a display. Having received an enlargement instruction to display an enlarged image of part of the subject illustrated in the first image, the system controller controls the display controller to display a second image generated based on second detection data obtained by detecting X-rays incident on the partial detection surface corresponding to the anode side in the detection surface as the enlarged image.Type: ApplicationFiled: July 23, 2015Publication date: November 12, 2015Applicants: Kabushiki Kaisha Toshiba, Toshiba Medical Systems CorporationInventors: Manabu TANAKA, Yoshinori SHIMIZU, Takayuki ISHIKAWA, Teruomi GUNJI