Patents by Inventor Takehiko Umeyama

Takehiko Umeyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160134159
    Abstract: A semiconductor integrated circuit included a power supply circuit having a first input terminal, a second input terminal, and an output terminal, wherein the power supply circuit includes a measurement circuit and a switch circuit, wherein the measurement circuit compares a first voltage supplied to the first input terminal with a second voltage supplied to the second input terminal, outputs a determination signal as the comparing result and operates on the first voltage, wherein the switch circuit selects the first input terminal or the second input terminal and couples the selected terminal with the output terminal in response to the determination signal, wherein a main power supply voltage from a main power supply can be supplied to the first input terminal, and wherein an auxiliary power supply voltage from an auxiliary power supply can be supplied to the second input terminal.
    Type: Application
    Filed: January 13, 2016
    Publication date: May 12, 2016
    Inventor: Takehiko Umeyama
  • Patent number: 9252750
    Abstract: The present invention is made to not only reduce voltage drop when a power supply circuit makes a selection between a power supply voltage from a main power supply and a backup power supply voltage from an auxiliary power supply, but also reduce the power consumption of the auxiliary power supply. The power supply circuit, which is in a semiconductor integrated circuit, includes a measurement circuit, a switch control circuit, and a switch circuit. The switch circuit includes a first switch element and a second switch element. The first switch element is coupled between an output terminal and a first input terminal. The second switch element is coupled between the output terminal and a second input terminal. The measurement circuit operates on the main power supply voltage at the first input terminal and compares the main power supply voltage with the auxiliary power supply voltage.
    Type: Grant
    Filed: April 17, 2014
    Date of Patent: February 2, 2016
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventor: Takehiko Umeyama
  • Publication number: 20140346878
    Abstract: The present invention is made to not only reduce voltage drop when a power supply circuit makes a selection between a power supply voltage from a main power supply and a backup power supply voltage from an auxiliary power supply, but also reduce the power consumption of the auxiliary power supply. The power supply circuit, which is in a semiconductor integrated circuit, includes a measurement circuit, a switch control circuit, and a switch circuit. The switch circuit includes a first switch element and a second switch element. The first switch element is coupled between an output terminal and a first input terminal. The second switch element is coupled between the output terminal and a second input terminal. The measurement circuit operates on the main power supply voltage at the first input terminal and compares the main power supply voltage with the auxiliary power supply voltage.
    Type: Application
    Filed: April 17, 2014
    Publication date: November 27, 2014
    Applicant: Renesas Electronics Corporation
    Inventor: Takehiko Umeyama
  • Patent number: 8786162
    Abstract: The disclosed invention provides a device for driving a piezoelectric element, making it possible to make an output voltage follow a control voltage during a discharging action. A charging circuit charges a piezo element through a first node. A discharging circuit discharges electric charge charged in the piezo element through the first node. A control circuit makes switching to cause the discharging circuit to perform a discharging action or cause the charging circuit to perform a charging action, based on a comparison between the magnitude of a voltage being applied to the piezo element and the magnitude of a control voltage.
    Type: Grant
    Filed: February 17, 2012
    Date of Patent: July 22, 2014
    Assignee: Renesas Electronics Corporation
    Inventors: Shingo Tajima, Shoji Tsuchioka, Takehiko Umeyama
  • Patent number: 8344654
    Abstract: A driving circuit supplies a suppression current (I4) which reduces a decrease in a driving current (Idrive) immediately after occurrence of an overshoot at the time of the rise of the driving current (Idrive) to a laser diode (1). The driving circuit draws a suppression current (I5) which reduces an increase in the driving current (Idrive) immediately after occurrence of an undershoot at the time of the fall of the driving current (Idrive) from the driving current (Idrive).
    Type: Grant
    Filed: December 13, 2011
    Date of Patent: January 1, 2013
    Assignee: Renesas Electronics Corporation
    Inventors: Tsuyoshi Horiuchi, Takehiko Umeyama
  • Publication number: 20120212099
    Abstract: The disclosed invention provides a device for driving a piezoelectric element, making it possible to make an output voltage follow a control voltage during a discharging action. A charging circuit charges a piezo element through a first node. A discharging circuit discharges electric charge charged in the piezo element through the first node. A control circuit makes switching to cause the discharging circuit to perform a discharging action or cause the charging circuit to perform a charging action, based on a comparison between the magnitude of a voltage being applied to the piezo element and the magnitude of a control voltage.
    Type: Application
    Filed: February 17, 2012
    Publication date: August 23, 2012
    Inventors: Shingo TAJIMA, Shoji Tsuchioka, Takehiko Umeyama
  • Publication number: 20120081021
    Abstract: A driving circuit supplies a suppression current (I4) which reduces a decrease in a driving current (Idrive) immediately after occurrence of an overshoot at the time of the rise of the driving current (Idrive) to a laser diode (1). The driving circuit draws a suppression current (I5) which reduces an increase in the driving current (Idrive) immediately after occurrence of an undershoot at the time of the fall of the driving current (Idrive) from the driving current (Idrive).
    Type: Application
    Filed: December 13, 2011
    Publication date: April 5, 2012
    Applicant: Renesas Electonics Corporation
    Inventors: Tsuyoshi Horiuchi, Takehiko Umeyama
  • Patent number: 8098023
    Abstract: A driving circuit supplies a suppression current (I4) which reduces a decrease in a driving current (Idrive) immediately after occurrence of an overshoot at the time of the rise of the driving current (Idrive) to a laser diode (1). The driving circuit draws a suppression current (I5) which reduces an increase in the driving current (Idrive) immediately after occurrence of an undershoot at the time of the fall of the driving current (Idrive) from the driving current (Idrive).
    Type: Grant
    Filed: July 30, 2010
    Date of Patent: January 17, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Tsuyoshi Horiuchi, Takehiko Umeyama
  • Patent number: 8064300
    Abstract: In order to cancel an offset caused by a variation of a signal inputted from an optical pickup, variations of elements in an integrated circuit, etc., a calibration circuit which generates and feeds back an offset adjustment amount that makes the offset zero by a comparison with a reference value, and an offset adjustment circuit that makes the offset zero using the fed-back control signal are provided in an analog front-end LSI. The offset adjustment by the calibration circuit is automatically done in response to commands supplied from a digital signal processing LSI, a host control device, etc. On the other hand, as for a signal on which arithmetic processing such as gain control, addition and subtraction, is performed, the offset adjustment is performed by sending the offset adjustment amount obtained by an arithmetic operation performed by software processing of the digital signal processing LSI to the analog front-end.
    Type: Grant
    Filed: August 25, 2005
    Date of Patent: November 22, 2011
    Assignee: Renesas Electronics Corporation
    Inventors: Hiroshi Abe, Takehiko Umeyama
  • Publication number: 20100295461
    Abstract: A driving circuit supplies a suppression current (I4) which reduces a decrease in a driving current (Idrive) immediately after occurrence of an overshoot at the time of the rise of the driving current (Idrive) to a laser diode (1). The driving circuit draws a suppression current (I5) which reduces an increase in the driving current (Idrive) immediately after occurrence of an undershoot at the time of the fall of the driving current (Idrive) from the driving current (Idrive).
    Type: Application
    Filed: July 30, 2010
    Publication date: November 25, 2010
    Applicant: Renesas Technology Corp.
    Inventors: Tsuyoshi Horiuchi, Takehiko Umeyama
  • Patent number: 7791288
    Abstract: A driving circuit supplies a suppression current (I4) which reduces a decrease in a driving current (Idrive) immediately after occurrence of an overshoot at the time of the rise of the driving current (Idrive) to a laser diode (1). The driving circuit draws a suppression current (I5) which reduces an increase in the driving current (Idrive) immediately after occurrence of an undershoot at the time of the fall of the driving current (Idrive) from the driving current (Idrive).
    Type: Grant
    Filed: February 7, 2008
    Date of Patent: September 7, 2010
    Assignee: Renesas Technology Corp.
    Inventors: Tsuyoshi Horiuchi, Takehiko Umeyama
  • Patent number: 7643261
    Abstract: There is provided a semiconductor device capable of supplying an analog input signal higher than or equal to an operating power supply voltage. An electrostatic discharge protection circuit corresponding to the analog input signal is provided for an external terminal that is supplied with an analog input signal generated with a first power supply voltage. A voltage divider resistor divides the analog input signal passing through the electrostatic discharge protection circuit into a voltage corresponding to a second power supply voltage lower that the first power supply voltage. An input circuit operating on the second power supply voltage receives the analog input signal divided by the voltage divider resistor to form an internal analog signal. There are provided first and second unidirectional elements. The first unidirectional element passes current from the input circuit's input terminal to the second power supply voltage.
    Type: Grant
    Filed: December 27, 2006
    Date of Patent: January 5, 2010
    Assignee: Renesas Technology Corp.
    Inventors: Hiroshi Ide, Satoshi Fujita, Takehiko Umeyama
  • Publication number: 20090147633
    Abstract: In order to cancel an offset caused by a variation of a signal inputted from an optical pickup, variations of elements in an integrated circuit, etc., a calibration circuit which generates and feeds back an offset adjustment amount that makes the offset zero by a comparison with a reference value, and an offset adjustment circuit that makes the offset zero using the fed-back control signal are provided in an analog front-end LSI. The offset adjustment by the calibration circuit is automatically done in response to commands supplied from a digital signal processing LSI, a host control device, etc. On the other hand, as for a signal on which arithmetic processing such as gain control, addition and subtraction, is performed, the offset adjustment is performed by sending the offset adjustment amount obtained by an arithmetic operation performed by software processing of the digital signal processing LSI to the analog front-end.
    Type: Application
    Filed: August 25, 2005
    Publication date: June 11, 2009
    Inventors: Hiroshi Abe, Takehiko Umeyama
  • Publication number: 20080272708
    Abstract: A driving circuit supplies a suppression current (I4) which reduces a decrease in a driving current (Idrive) immediately after occurrence of an overshoot at the time of the rise of the driving current (Idrive) to a laser diode (1). The driving circuit draws a suppression current (I5) which reduces an increase in the driving current (Idrive) immediately after occurrence of an undershoot at the time of the fall of the driving current (Idrive) from the driving current (Idrive).
    Type: Application
    Filed: February 7, 2008
    Publication date: November 6, 2008
    Applicant: Renesas Technology Corp.
    Inventors: Tsuyoshi Horiuchi, Takehiko Umeyama
  • Patent number: 7372882
    Abstract: A driving circuit supplies a suppression current (I4) which reduces a decrease in a driving current (Idrive) immediately after occurrence of an overshoot at the time of the rise of the driving current (Idrive) to a laser diode (1). The driving circuit draws a suppression current (I5) which reduces an increase in the driving current (Idrive) immediately after occurrence of an undershoot at the time of the fall of the driving current (Idrive) from the driving current (Idrive).
    Type: Grant
    Filed: April 27, 2005
    Date of Patent: May 13, 2008
    Assignee: Renesas Technology Corp.
    Inventors: Tsuyoshi Horiuchi, Takehiko Umeyama
  • Publication number: 20070177328
    Abstract: There is provided a semiconductor device capable of supplying an analog input signal higher than or equal to an operating power supply voltage. An electrostatic discharge protection circuit corresponding to the analog input signal is provided for an external terminal that is supplied with an analog input signal generated with a first power supply voltage. A voltage divider resistor divides the analog input signal passing through the electrostatic discharge protection circuit into a voltage corresponding to a second power supply voltage lower that the first power supply voltage. An input circuit operating on the second power supply voltage receives the analog input signal divided by the voltage divider resistor to form an internal analog signal. There are provided first and second unidirectional elements. The first unidirectional element passes current from the input circuit's input terminal to the second power supply voltage.
    Type: Application
    Filed: December 27, 2006
    Publication date: August 2, 2007
    Inventors: Hiroshi IDE, Satoshi Fujita, Takehiko Umeyama
  • Patent number: 7187513
    Abstract: Magneto-resistive (MR) head pre-amplifiers for single polarity power supply applications are presented. An exemplary pre-amplifier includes a bias network coupled to first and second input terminals of the pre-amplifier, the input terminals for receiving signals corresponding to variations in magnetic fields from an MR head. At least one gain stage having first and second input terminals and first and second output terminals for amplifying the received signals is included. A pair of coupling capacitors, each capacitor being connected between a respective input terminal of the pre-amplifier and a corresponding respective input terminal of the at least one gain stage, are further included in the pre-amplifier design. Finally, the exemplary pre-amplifier includes a pair of feedback capacitors, each capacitor being connected between respective input and output terminals of the at least one gain stage. The pre-amplifier is powered by a single polarity power supply.
    Type: Grant
    Filed: June 14, 2002
    Date of Patent: March 6, 2007
    Assignee: Renesas Technology America, Inc.
    Inventors: Takehiko Umeyama, Robert B. Ross, Masashige Tada
  • Patent number: 6998733
    Abstract: An N-transistor switches a current of a first constant current source by a positive input pulse to generate an output pulse current where an overshoot and an undershoot appear. A P-transistor switches a current of a second constant current source by a negative correction pulse applied at timing of occurrence of the overshoot to generate a correction pulse current. Another N-transistor switches a current of a third constant current source by a positive correction pulse applied at timing of occurrence of the undershoot to generate a correction pulse current. These correction pulse currents are added to the output pulse current to obtain a current as a wavelength where the overshoot and undershoot are largely reduced.
    Type: Grant
    Filed: October 8, 2002
    Date of Patent: February 14, 2006
    Assignee: Renesas Technology Corp.
    Inventors: Taiji Kabayama, Motokuni Saeki, Takehiko Umeyama
  • Publication number: 20050243879
    Abstract: A driving circuit supplies a suppression current (I4) which reduces a decrease in a driving current (Idrive) immediately after occurrence of an overshoot at the time of the rise of the driving current (Idrive) to a laser diode (1). The driving circuit draws a suppression current (I5) which reduces an increase in the driving current (Idrive) immediately after occurrence of an undershoot at the time of the fall of the driving current (Idrive) from the driving current (Idrive).
    Type: Application
    Filed: April 27, 2005
    Publication date: November 3, 2005
    Applicant: Renesas Technology Corp.
    Inventors: Tsuyoshi Horiuchi, Takehiko Umeyama
  • Patent number: 6783274
    Abstract: A device for measuring temperature of a semiconductor integrated circuit includes first and second current mirror circuits, an N channel transistor connected to an output terminal of the second cur rent mirror circuit, an npn transistor connected to an output terminal of the first current mirror circuit and the N channel transistor, and an operational transistor connected to a node between the second current circuit and the N channel transistor. Currents that flow from the second current mirror circuit to the N channel transistor and from the N channel transistor to the npn transistor have different temperature coefficients. The operational amplifier corrects the difference in the temperature coefficients of these currents to output a voltage of ground electric potential standard.
    Type: Grant
    Filed: March 20, 2003
    Date of Patent: August 31, 2004
    Assignee: Renesas Technology Corp.
    Inventors: Takehiko Umeyama, Kazuyuki Ohmi